STY60NK30Z STMICROELECTRONICS | Alldatasheet

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Technical content

N-CHANNEL 300V - 0.033Ω - 60A Max247 Zener-Protected SuperMESH™Power MOSFET I TYPICAL R DS (on) = 0.033Ω I EXTREMELY HIGH dv/dt CAPABILITY I 100% AVALANCHE TESTED I GATE CHARGE MINIMIZED I VERY LOW INTRINSIC CAPACITANCES I VERY GOOD MANUFACTURING REPEATIBILITY

DESCRIPTION

The SuperMESH™ series is obtained through an extreme optimization of ST’s well established strip- based PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is tak- en to ensure a very good dv/dt capability for the most demanding applications. Such series comple- ments ST full range of high voltage MOSFETs in- cluding revolutionary MDmesh™ products.

APPLICATIONS

I HIGH CURRENT, HIGH EFFICIENCY SWITCHING DC/DC CONVETERS FOR PLASMA TV’s I IDEAL FOR OFF-LINE POWER SUPPLIES, ADAPTORS AND PFC

ORDERING INFORMATION

TYPE V DSS R DS(on) ID Pw STY60NK30Z 300 V < 0.045 Ω 60 A 450 W SALES TYPE MARKING PACKAGE PACKAGING STY60NK30Z Y60NK30Z Max247 TUBE Max247 INTERNAL SCHEMATIC DIAGRAM

(/circle6 ) Pulse width limited by safe operating area (1) ISD ≤60A, di/dt≤200A/µs, VDD ≤ V(BR)DSS ,Tj≤ TJMAX. THERMAL DATA AVALANCHE CHARACTERISTICS GATE-SOURCE ZENER DIODE PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. Symbol Parameter Value Unit VDS Drain-source Voltage (VGS =0 ) 300 V VDGR Drain-gate Voltage (RGS =2 0kΩ ) 300 V VGS Gate- source Voltage ± 30 V ID Drain Current (continuous) at TC = 25°C 60 A ID Drain Current (continuous) at TC = 100°C 37.5 A IDM (/circle6 ) Drain Current (pulsed) 240 A PTOT Total Dissipation at TC = 25°C 450 W Derating Factor 3.57 W/°C VESD(G-S) Gate source ESD(HBM-C=100 pF, R=1.5 KΩ) 6000 V dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns Tj Tstg Operating Junction Temperature Storage Temperature -55 to 150 °C Rthj-case Thermal Resistance Junction-case Max 0.28 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 30 °C/W Tl Maximum Lead Temperature For Soldering Purpose 300 °C Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tjmax) 60 A EAS Single Pulse Avalanche Energy (starting Tj=2 5° C ,ID =IAR ,VDD =5 0V ) 0.7 J Symbol Parameter Test Conditions Min. Typ. Max. Unit BV GSO Gate-Source Breakdown Voltage Igs=± 1mA (Open Drain) 30 V

ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) ON/OFF DYNAMIC SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. C oss eq.is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS . Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID =1m A ,VGS = 0 300 V IDSS Zero Gate Voltage Drain Current (VGS =0 ) VDS =M a xR a t i n g VDS =M a xR a t i n g ,TC = 125 °C µA µA IGSS Gate-body Leakage Current (VDS =0 ) VGS = ± 20 V ±10 µA VGS(th) Gate Threshold Voltage VDS =V GS ,ID = 100 µA 3 3.75 4.5 V R DS(on) Static Drain-source On Resistance VGS =1 0 V ,ID = 30 A 0.033 0.045 Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs(1) Forward Transconductance V DS =1 5V,ID =3 0A 2 9 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS =2 5 V ,f=1M H z ,VGS = 0 7200 1070 250 pF pF pF C oss eq.(3) Equivalent Output Capacitance VGS =0 V ,VDS = 0V to 240V 880 pF Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD =1 5 0V ,ID =3 0A R G =4 . 7Ω , VGS =1 0V (Resistive Load see, Figure 3) ns ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD =2 4 0V ,ID =6 0A , VGS =1 0V 220 123 nC nC nC Symbol Parameter Test Conditions Min. Typ. Max. Unit t d(off) tf Turn-off Delay Time Fall Time VDD =1 5 0V ,ID =3 0A R G =4 . 7Ω ,VGS =1 0V (Resistive Load see, Figure 3) 150 ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time V DD =2 4 0V ,ID =6 0A , R G =4 . 7Ω, VGS = 10V (Inductive Load see, Figure 5) 110 ns ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit I SD ISDM (2) Source-drain Current Source-drain Current (pulsed) 240 A A VSD (1) F o r w a r dO nV o l t a g eISD =6 0A ,VGS =0 1.6 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD =6 0A ,d i / d t=1 0 0A / µ s VR = 100 V, Tj=1 5 0 ° C (see test circuit, Figure 5) 475 6.4 ns µC A

Transconductance Static Drain-source On Resistance Transfer CharacteristicsOutput Characteristics Safe Operating Area Thermal Impedance

Source-drain Diode Forward Characteristics Normalized On Resistance vs TemperatureNormalized Gate Thereshold Voltage vs Temp. Capacitance VariationsGate Charge vs Gate-source Voltage

Fig. 5:Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4:Gate Charge test Circuit Fig. 2:Unclamped Inductive WaveformFig. 1:Unclamped Inductive Load Test Circuit Fig. 3:Switching Times Test Circuit For Resistive Load

DIM. mm inch A 4.70 5.30 A1 2.20 2.60 b 1.00 1.40 b1 2.00 2.40 b2 3.00 3.40 c 0.40 0.80 D 19.70 20.30 e 5.35 5.55 E 15.30 15.90 L 14.20 15.20 L1 3.70 4.30 P025Q Max247 MECHANICAL DATA

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