ST8016S

ST8016S SITRONIX | Alldatasheet

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Note:6This6is6not6a6final6specification.66 Some6parameters6are6subject6to6change. Version 0.24 2009/10/01

6 ST8016S 6

Preliminary66Ver60.246 Page62/266 2009/10/016 1. FEATURES /square66 Number6of6LCD6drive6outputs:61606 /square66 Supply6voltage6for6LCD6drive:6+15.06to6+30.06V6 /square66 Supply6voltage6for6the6logic6system:6+2.56to6+5.56V6 /square66 Low6power6consumption6 /square66 Low6output6impedance6 (Segment6mode)6 /square66 Shift6clock6frequency6 )6206MHz6(MAX.):6V )6156MHz6(MAX.):6V DD 6=6+3.06to6+64.56V6 )6126MHz6(MAX.):6V DD 6=6+2.56to6+63.06V6 /square66 Adopts6a6data6bus6system6 /square66 4)bit/8)bit6parallel6input6modes6are6 selectable6with6a6mode6(MD)6pin6 /square66 Automatic6transfer6function6of6an6 enable6signal6 /square66 Automatic6counting6function6which,6in6 the6chip6selection6mode,6causes6the6 internal6clock6to6be6stopped6by6 automatically6counting61606bits6of6 input6data6 /square66 Line6latch6circuits6are6reset6when6 /DISPOFF6active6 (Common6mode)6 /square66 Shift6clock6frequency:646MHz6(MAX.)6 /square66 Built)in6160)bit6bi)directional6shift6 register6(divisible6into6806bits6x62)6 /square66 Available6in6a6single6mode6(160)bit6 shift6register)6or6in6a6dual6mode6 (80)bit6shift6register6x62)6 /head2right6Y 1)>Y 160 6Single6mode6 /head2right6Y160 )>Y 16Single6mode6 /head2right6Y1)>Y 80 ,6Y 81 )>Y 160 6Dual6mode6 /head2right6Y160 )>Y 81 ,6Y 80 )>Y 16Dual6mode6 The6above646shift6directions6are6 pin)selectable6 /square66 Shift6register6circuits6are6reset6when6 /DISPOFF6active6 2. DESCRIPTION The6ST8016S6is6a6160)output6segment/common6driver6IC6suitable6for6driving6large/medium6scale6 dot6matrix6LCD6panels,6and6is6used6in6personal6computers/work6stations.6The6ST8016S6is6good6 both6as6a6segment6driver6and6a6common6driver,6and6it6can6create6a6low6power6consuming,6 high)resolution6LCD. 66

Preliminary66Ver60.246 Page63/266 2009/10/016 3. BLOCK DIAGRAM 4. FUNCTIONAL OPERATIONS OF EACH BLOCK BLOCK FUNCTION Active6Control6 In6case6of6segment6mode,6controls6the6selection6or6non)selection6of6the6chip.66 Following6an6LP6signal6input,6and6after6the6chip6selection6signal6is6input,6a6selection6 signal6is6generated6internally6until61606bits6of6data6have6been6read6in.6 Once6data6input6has6been6completed,6a6selection6signal6for6cascade6connection6is6 output,6and6the6chip6is6non)selected.66 In6case6of6common6mode,6controls6the6input/output6data6of6bi)directional6pins.6 SP6Conversion6 &6Data6Control6 In6case6of6segment6mode,6keeps6input6data6which6are626clocks6of6XCK6at64)bit6parallel6 input6mode6in6latch6circuit,6or6keeps6input6data6which6are616clock6of6XCK6at68)bit6parallel6 input6mode6in6latch6circuit;6after6that6they6are6put6on6the6internal6data6bus686bits6at6a6time. Data6Latch6Control6 In6case6of6segment6mode,6selects6the6state6of6the6data6latch6which6reads6in6the6data6bus6 signals.6The6shift6direction6is6controlled6by6the6control6logic.6For6every6166bits6of6data6 read6in,6the6selection6signal6shifts6one6bit6based6on6the6state6of6the6control6circuit.6 Data6Latch6 In6case6of6segment6mode,6latc hes6the6data6on6the6data6bus.6The6latch6state6of6each6LCD666 drive6output6pin6is6controlled6by6the6control6logic6and6the6data6latch6control;61606bits6of6 data6are6read6in6206sets6of686bits.6 Line6Latch/6 Shift6Register6 In6case6of6segment6mode,6all61606bits6which6have6been6read6into6the6data6latch6are6 simultaneously6latched6at6the6falling6edge6of6the6LP6signal,6and6are6output6to6the6level6 shifter6block.6In6case6of6common6mode,6shifts6data6from6the6data6input6pin6at6the6falling6 edge6of6the6LP6signal.6 Level6Shifter6 The6logic6voltage6signal6is6level)shifted6to6the6LCD6drive6voltage6level,6and6is6output6to6 the6driver6block.6 4)Level6Driver6 Drives6the6LCD6drive6output6pins6from6the6line6latch/shift6register6data,6and6selects6one6of6 46levels6(V 0,6V 12 ,6V 43 6or6V SS )6based6on6the6S/C,6FR6and6/DISPOFF6signals.6 Control6Logic6 Controls6the6operation6of6each6block.6In6case6of6segment6mode,6when6an6LP6signal6has6 been6input,6all6blocks6are6reset6and6the6control6logic6waits6for6the6selection6signal6output6 from6the6active6control6block.6Once6the6selection6signal6has6been6output,6operation6of6the6 data6latch6and6data6transmission6is6controlled,61606bits6of6data6are6read6in,6and6the6chip6 is6non)selected.6In6case6of6common6mode,6controls6the6direction6of6data6shift.6 160)BIT64)LEVEL6DRIVER 160)BIT6LEVEL6SHIFTER 160)BIT6LINE6LATCH/SHIFT6REGISTER DATA6LATCH6CONTROL SP6CONVERSION6&6DATA6CONTROL (46to686or686to68) CONTROL LOGIC ACTIVE CONTROL LEVEL SHIFTER 86BIT DATA LATCH DI0 DI1 DI2 DI3 DI4 DI5 DI6 DI7 V DD V SS V 43L V 12L V 0L Y 160 Y 159 Y 2Y 1V 43R V 12R V 0R FR /DISPOFF EIO 1 EIO 2 LP XCK L/R MD S/C 16 16 16 160 160 V SS V SS

Preliminary66Ver60.246 Page64/266 2009/10/016 5. INPUT/OUTPUT CIRCUITS I VDD To6Internal6Circuit GND6(0V) Applicable6Pins L/R6,6S/C6,6DI 6~DI 06, /DISPOFF6,6LP6,6FR6,6MD

66666666666666666666666666666666 Figure616Input6Circuit6(1)

I VDD To6Internal6Circuit Applicable6Pins DI 76,6XCK GND6(0V) GND6(0V) Control6Signal

66666666666666666666666666666666 Figure626Input6Circuit6(2)

Preliminary66Ver60.246 Page65/266 2009/10/016 VDD I/O To6Internal Circuit GND6(0V) GND6(0V) Control6Signal GND(0V) VDD Output6Signal Control6Signal Application6Pins EIO 16,6EIO 2 66666666666666666666666666666 Figure636Input/Output6Circuit O GND(0V) Control6Signal61 Control6Signal63 Control6Signal62 Control6Signal64 V0 V12 V43 VSS GND6(0V) Application6Pins Y1~Y 160

6666666666666666666666666666 Figure646LCD6Drive6Output6Circuit6

Preliminary66Ver60.246 Page66/266 2009/10/016 6. FUNCTIONAL DESCRIPTION

6.1 Pin Functions

(Segment6mode)6 SYMBOL FUNCTION VDD 6 Logic6system6power6supply6pin6 /circle46Connected6to6+2.56to6+5.56V.6 GND6 Ground6pin6 LGND6 Logic6system6power6ground6pin6 /circle46Do6not6short6LGND6with6GND6and6Vss6by6ITO6on6LCD6panel6 /circle46Connect6it6to6GND6on6PCB6or6FPC.6 VSS 6 Connect6to6GND6by6ITO6on6LCD6panel.6 V0L,6V 0R6 V12L ,6V 12R 6 V43L ,6V 43R 6 Bias6power6supply6pins6for6LCD6drive6voltage6 /circle46Normally6use6the6bias6voltages6set6by6a6resistor6divider6 /circle46Ensure6that6voltages6are6set6such6that6V SS 6<6V43 6<6V12 6<6V 0.66 /circle46ViL 6and6V iR 6(i6=60,12,643)6must6connect6to6an6external6power6supply,6and6supply6regular6 voltage6which6is6assigned6by6specification6for6each6power6pin6 DI 7)DI06 Input6pins6for6display6data6 /circle46In64)bit6parallel6mode,6DI3)DI06are6the6display6data6input6pins,6and6DI7)DI46must6be6 connected6to6LGND6or6V DD .6 /circle46In68)bit6parallel6mode,6All6DI7)Dl06pins6are6the6display6data6input6pins.6 /circle46Refer6to6section66.2.2.6 XCK6 Clock6input6pin6for6taking6display6data6 /circle46Data6is6read6at6the6falling6edge6of6the6clock6pulse.6 LP6 Latch6pulse6input6pin6for6display6data6 /circle46Data6is6latched6at6the6falling6edge6of6the6clock6pulse.6 L/R6 Input6pin6for6selecting6the6reading6direction6of6display6data6 /circle46When6set6to6LGND6level6"L",6data6is6read6sequentially6from6Y 160 6to6Y 1.6 /circle46When6set6to6V DD 6level6"H",6data6is6read6sequentially6from6Y 16to6Y 160 .6 /circle46Refer6to6section66.2.2.6 /DISPOFF6 Control6input6pin6for6output6of6non)select6level6 /circle46The6input6signal6is6level)shifted6from6logic6voltage6level6to6LCD6drive6voltage6level,6and6 controls6the6LCD6drive6circuit.6 /circle46When6set6to6LGND6level6"L",6the6LCD6drive6output6pins6(Y 1)Y160 )6are6set6to6level6Vss.6 /circle46When6set6to6"L",6the6contents6of6the6line6latch6are6reset,6but6the6display6data6are6read6in6 the6 data6latch6regardless6of6the6condition6of6/DISPOFF.6When6the6/DISPOFF6function6is6 canceled66 the6driver6outputs6non)select6level6(V 12 6or6V 43 ),6then6outputs6the6contents6of6the6data6 latch6at6the6next6falling6edge6of6the6LP.6At6that6time,6if6/DISPOFF6removal6time6does6not6 correspond6to6what6is6shown6in6AC6characteristics,6it6cannot6output6the6reading6data6 correctly.6 /circle46Table6of6truth)values6is6shown6in6"TRUTH6TABLE"6in6Functional6Operations.6 FR6 AC6signal6input6pin6for6LCD6drive6waveform6 /circle46The6input6signal6is6level)shifted6from6logic6voltage6level6to6LCD6drive6voltage6level,6and6 controls6the6LCD6drive6circuit.6 /circle46Normally6it6inputs6a6frame6inversion6signal.6 /circle46The6LCD6drive6output6pins'6output6voltage6levels6can6be6set6using6the6line6latch6output6 signal6and6the6FR6signal.6 /circle46Table6of6truth)values6is6shown6in6"TRUTH6TABLE"6in6Functional6Operations.66 MD6 Mode6selection6pin6 /circle46When6set6to6LGND6level6"L",64)bit6parallel6input6mode6is6set.6 /circle46When6set6to6V DD 6level6"H",68)bit6parallel6input6mode6is6set.6 /circle46Refer6to6section66.2.2.6 S/C6 Segment6mode/common6mode6selection6pin6 /circle46When6set6to6V DD 6level6"H",6segment6mode6is6set.6 ElO 1,6EIO 26 Input/output6pins6for6chip6selection6 /circle46When6L/R6input6is6at6LGND6level6"L",6ElO 16is6set6for6output,6and6EIO 26is6set6for6input.6

Preliminary66Ver60.246 Page67/266 2009/10/016 /circle46When6L/R6input6is6at6V DD 6level6"H",6ElO 16is6set6for6input,6and6EIO 26is6set6for6output.6 /circle46During6output,6set6to6"H"6while6LP6•6XCK6is6"H"6and6after61606bits6of6data6have6been6 read,6set6 6to6"L”6for6one6cycle6(from6falling6edge6to6failing6edge6of6XCK),6after6which6it6returns6to6 "H".6 /circle46During6input,6the6chip6is6selected6while6El6is6set6to6"L"6after6the6LP6signal6is6input.6The6 chip6is6non)selected6after61606bits6of6data6have6been6read.6 Y16)Y160 6 LCD6drive6output6pins6 /circle46Corresponding6directly6to6each6bit6of6the6data6latch,6one6level6(V 0,6V 1266or6V43 )6is6 selected6and6output.6 /circle46Table6of6truth6values6is6shown6in6"TRUTH6TABLE"6in6Functional6Operations.6 6(Common6mode)66 SYMBOL FUNCTION VDD 6 Logic6system6power6supply6pin6 /circle46Connected6to6+2.56to6+5.56V.6 GND6 Ground6pin6 LGND6 Logic6system6power6ground6pin6 /circle46Do6not6short6LGND6with6GND6and6Vss6by6ITO6on6LCD6panel6 /circle46Connect6it6to6GND6on6PCB6or6FPC.6 VSS 6 Connect6to6GND6by6ITO6on6LCD6panel.6 V0L ,6V 0R 6 V12L ,6V 12R 6 V43L ,6V 43R6 Bias6power6supply6pins6for6LCD6drive6voltage6 /circle46Normally6use6the6bias6voltages6set6by6a6resistor6divider.6 /circle46Ensure6that6voltages6are6set6such6that6V SS 6<6V 43 6<6V 12 6<6V 0.6 /circle46ViL 6and6V iR6(i6=60,12,643)6must6connect6to6an6external6power6supply,6and6supply6regular6 voltage6that6is6assigned6by6specification6for6each6power6pin.6 ElO 16 Shift6data6input/output6pin6for6bi)directional6shift6register6 /circle46Output6pin6when6L/R6is6at6LGND6level6"L',6input6pin6when6L/R6is6at6V DD 6level6"H".6 /circle46When6L/R6=6H,6ElO 16is6used6as6input6pin,6it6will6be6pulled6down.6 /circle46When6L/R6=6L,6ElO 16is6used6as6output6pin,6it6won't6be6pulled6down.6 /circle46Refer6to6section66.2.2.6 EIO 26 Shift6data6input/output6pin6for6bi)directional6shift6register6 /circle46Input6pin6when6L/R6is6at6LGND6level6"L",6output6pin6when6L/R6is6at6V DD 6level6"H".6 /circle46When6L/R6=6L,6EIO 26is6used6as6input6pin,6it6will6be6pulled6down.6 /circle46When6L/R6=6H,6EIO 26is6used6as6output6pin,6it6won't6be6pulled6down.6 /circle46Refer6to6section66.2.2.6 LP6 Shift6clock6pulse6input6pin6for6bi)directional6shift6register6 /circle46*6Data6is6shifted6at6the6falling6edge6of6the6clock6pulse.6 L/R6 Input6pin6for6selecting6the6shift6direction6of6bi)directional6shift6register6 /circle46Data6is6shifted6from6Y 160 6to6Y 16when6set6to6LGND6level6"L",6and6data6is6shifted6from6Y 16to 6 Y160 6when6set6to6V DD 6level6"H".6 /circle46Refer6to6section66.2.2.6 /DISPOFF6 Control6input6pin6for6output6of6non)select6level6 /circle46The6input6signal6is6level)shifted6from6logic6voltage6level6to6LCD6drive6voltage6level,6and6 controls6the6LCD6drive6circuit.6 /circle46When6set6to6LGND6level6"L",6the6LCD6drive6output6pins6(Y 1)Y160 )6are6set6to6level6Vss.6 /circle46When6set6to6"L”,6the6contents6of6the6shift6register6are6reset6to6not6reading6data.6When6 the6/DISPOFF6function6is6canceled,6the6driver6outputs6non)select6level6(V 12 6or6V43 ),6and6 the6shift6data6is6read6at6the6next6falling6edge6of6the6LP.6At6that6time,6if6/DISPOFF6 removal6time6does6not6correspond6to6what6is6shown6in6AC6characteristics,6the6shift6data6 is6not6read6correctly.6 /circle46Table6of6truth)values6is6shown6in6"TRUTH6TABLE"6in6Functional6Operations.6 FR6 AC6signal6input6pin6for6LCD6drive6waveform6 /circle46The6input6signal6is6level)shifted6from6logic6voltage6level6to6LCD6drive6voltage6level,6and6 controls6the6LCD6drive6circuit.6 /circle46Normally6it6inputs6a6frame6inversion6signal.6 /circle46The6LCD6drive6output6pins'6output6voltage6levels6can6be6set6using6the6shift6register6 output6signal6and6the6FR6signal.6 /circle46Table6of6truth)values6is6shown6in6"TRUTH6TABLE"6in6Functional6Operations.6

Preliminary66Ver60.246 Page68/266 2009/10/016 MD6 Mode6selection6pin6 /circle46When6set6to6LGND6level6"L",6single6mode6operation6is6selected;6when6set6to6V DD 6level6 "H"6dual6mode6operation6is6selected.6 /circle46Refer6to6section66.2.2.6 DI76 Dual6mode6data6input6pin6 /circle46According6to6the6data6shift6direction6of6the6data6shift6register,6data6can6be6input6starting6 from6the681st6bit.6 When6the6chip6is6used6in6dual6mode,6DI 76will6be6pulled6down.6 When6the6chip6is6used6in6single6mode,6DI76won't6be6pulled6down(Connect6to6LGND6or6 VDD ,6avoiding6floating.).6 /circle46Refer6to6section66.2.2.6 S/C6 Segment6mode/common6mode6selection6pin6 /circle46When6set6to6LGND6level6"L",6common6mode6is6set.6 DI6)DI06 Not6used6 /circle46Connect6DI6)DI06to6LGND6or6V DD ,6avoiding6floating.6 XCK6 Not6used6 /circle46XCK6is6pulled6down6in6common6mode,6so6connect6to6LGND6or6open.6 Y16)Y160 6 LCD6drive6output6pins6 /circle46Corresponding6directly6to6each6bit6of6the6shift6register,6one6level6(V 0,6V 12 ,6V 43 ,6or6V SS )6is6 selected6and6output.6 /circle46Table6of6truth)values6is6shown6in6"TRUTH6TABLE"6in6Functional6Operations.6

6.2 Functional Operations

6.2.1 Truth table

(Segment6Mode)6 FR LATCH DATA /DISPOFF LCD DRIVE OUTPUT VOLTAGE LEVEL (Y1-Y160) L6 L6 H6 V 43 6 L6 H6 H6 V SS 6 H6 L6 H6 V 12 6 H6 H6 H6 V 06 X6 X6 L6 V SS 6 (Common6Mode)6 FR LATCH DATA /DISPOFF LCD DRIVE OUTPUT VOLTAGE LEVEL (Y1-Y160) L6 L6 H6 V 43 6 L6 H6 H6 V 06 H6 L6 H6 V 12 6 H6 H6 H6 V SS 6 X6 X6 L6 V SS 6 NOTES:6 /circle46VSS 6<6V43 6<6V 12 6<6V 06 6 /circle46L6:6LGND6(06V),6H6:6VDD 6(+2.56to6+5.56V),6X6:6Don't6care6 /circle46"Don't6care"6should6be6fixed6to6"H"6or6"L",6avoiding6floating.6 There6are6two6kinds6of6power6supply6(logic6level6voltage6and6LCD6drive6voltage)6for6the6LCD6driver.6 Supply6regular6voltage6that6is6assigned6by6specification6for6each6power6pin.6

Preliminary66Ver60.246 Page69/266 2009/10/016

6.2.2 Relationship between the display data and LCD drive output Pins

(Segment6Mode)6 (a) 4-bit Parallel Input Mode NUMBER OF CLOCKS MD L/R EIO1 EIO2 DATA INPUT 40 CLOCK CLOCK CLOCK … 3 CLOCK 2 CLOCK 1 CLOCK DI 06 Y 16 Y 56 Y 96 … 6 Y149 6 Y 153 6 Y 157 6 Dl16 Y 26 Y 66 Y 10 6 … 6 Y1506 Y 154 6 Y 1586 DI 26 Y 36 Y 76 Y 11 6 … 6 Y151 6 Y 1556 Y 159 6L6 L6 Output 6 Input 6 DI 36 Y 46 Y 86 Y 12 6 … 6 Y152 6 Y 156 6 Y 160 6 DI 06 Y 160 6 Y 156 6 Y 152 6 … 6 Y12 6 Y 86 Y 46 Dl16 Y 1596 Y 155 6 Y 151 6 … 6 Y11 6 Y 76 Y 36 DI 26 Y 158 6 Y 154 6 Y 150 6 … 6 Y10 6 Y 66 Y 26L6 H6 Input 6 Output 6 DI 36 Y 157 6 Y 153 6 Y 149 6 … 6 Y96 Y 56 Y 16 (b) 8-bit Parallel Input Mode NUMBER OF CLOCKS MD L/R EIO 1 EIO2 DATA INPUT 20 CLOCK CLOCK CLOCK … 3 CLOCK 2 CLOCK 1 CLOCK DI 06 Y 16 Y 96 Y 17 6 … 6 Y137 6 Y 1456 Y 1536 Dl16 Y 26 Y 10 6 Y 18 6 … 6 Y1386 Y 1466 Y 1546 DI 26 Y 36 Y 11 6 Y 19 6 … 6 Y1396 Y 1476 Y 1556 DI 36 Y 46 Y 12 6 Y 206 … 6 Y1406 Y 1486 Y 1566 DI 46 Y 56 Y 13 6 Y 21 6 6 Y141 6 Y 1496 Y 157 6 DI 56 Y 66 Y 14 6 Y 22 6 6 Y1426 Y 1506 Y 1586 DI 66 Y 76 Y 15 6 Y 23 6 6 Y143 6 Y 1516 Y 159 6 H6 L6 Output 6 Input 6 DI 76 Y 86 Y 16 6 Y 24 6 6 Y1446 Y 1526 Y 160 6 DI 06 Y 160 6 Y 152 6 Y 144 6 … 6 Y24 6 Y 16 6 Y 86 Dl16 Y 159 6 Y 151 6 Y 143 6 … 6 Y23 6 Y 15 6 Y 76 DI 26 Y 158 6 Y 150 6 Y 142 6 … 6 Y22 6 Y 14 6 Y 66 DI 36 Y 1576 Y 149 6 Y 141 6 … 6 Y21 6 Y 13 6 Y 56 DI 46 Y 156 6 Y 148 6 Y 140 6 … 6 Y20 6 Y 12 6 Y 46 Dl56 Y 155 6 Y 147 6 Y 139 6 … 6 Y19 6 Y 11 6 Y 36 DI 66 Y 154 6 Y 146 6 Y 138 6 … 6 Y18 6 Y 10 6 Y 26 H6 H6 Input 6 Output 6 DI 76 Y 153 6 Y 145 6 Y 137 6 … 6 Y17 6 Y 96 Y 16 (Common6Mode)6 MD L/R DATA TRANSFER DIRECTION EIO 1 EIO 2 DI 7 L6 Y160 6→6Y16 Output6 Input6 X6L6 (Single)6 H6 Y16→6Y160 6 Input6 Output6 X6 Y160 6→6Y81 6L6 Y80 6→6Y16 Output6 Input6 Input6 Y16→6Y80 6 (Dual)6 H6 Y81 6→6Y160 6 Input6 Output6 Input6 NOTES:6 /circle46L6:6LGND6(06V),6H6:6V DD 6(+2.56to6+5.56V),6X6:6Don't6care6 /circle46"Don't6care"6should6be6fixed6to6"H"6or6"L",6avoiding6floating.6

Preliminary66Ver60.246 Page610/266 2009/10/016

6.2.3 Connection examples of plural segment drivers

(a) When L/R = “L” (b) When L/R = “H” Y160 Y160 Y160 Y1 Y1Y1 EIO2 EIO2 EIO2 EIO1 EIO1 EIO1 XCK LP MD FR DI 7)DI 0 XCK LP MD FR DI7)DI0 L/R L/R L/R VDD Top6data Last6data Data flow XCK LP MD FR DI7)DI0 XCK LP MD FR DI7)DI0 LGND Y160 Y160 Y160 Y1 Y1Y1 EIO2 EIO2 EIO2 EIO1 EIO1 EIO1 XCK LP MD FR DI 7)DI 0 XCK LP MD FR DI7)DI0 XCK LP MD FR DI7)DI0 XCK LP MD FR DI7)DI0 L/R L/R L/R LGND Top6data Last6data Data flow

Preliminary66Ver60.246 Page611/266 2009/10/016

6.2.4 Timing chart of 4-device cascade connection of segment drivers

n* n* n* n* n* 1 1111 2 2 2 2 2 device A device B device C device D TOP DATA LAST DATA *n = 40 in 4-bit parallel input mode *n = 20 in 8-bit parallel input mode EO (device C) EO (device B) EO (device A) EI (device A) DI 7 - DI 0 XCK LP FR

Preliminary66Ver60.246 Page612/266 2009/10/016

6.2.5 Connection examples for plural common drivers

(a) Single Mode (L/R = ”L”) Y160 Y160 Y160 Y1 Y1Y1 EIO2 EIO2 EIO2 EIO1 EIO1 EIO1 LP LGND FR /DISPOFF L/R LP MD FR DI7 LGND (V DD ) First Last FLM /DISPOFF L/R LP MD FR DI7 /DISPOFF L/R LP MD FR DI7 /DISPOFF (b) Single Mode (L/R = “H”) Y160 Y160 Y160 Y1 Y1Y1 EIO2 EIO2 EIO2 EIO1 EIO1 EIO1 FR L/R /DISPOFF MD FR DI LP /DISPOFF LGND 6(V DD ) First Last LP LGND VDD FLM L/R /DISPOFF MD FR DI LP L/R /DISPOFF MD FR DI7 LP

Preliminary66Ver60.246 Page613/266 2009/10/016 (c) Dual Mode (L/R = “L”) Y160 Y160 Y160Y1 Y1Y1 EIO2 EIO2 EIO2 EIO1 EIO1 EIO1 LP VSS FR /DISPOFF L/R LP MD FR DI7 LGND(V DD ) First Last62 FLM1 /DISPOFF L/R LP MD FR DI7 /DISPOFF L/R LP MD FR DI7 /DISPOFF First62 Last61 Y81 Y80 FLM2 VDD (d) Dual mode (L/R = “H”) Y160 Y160 Y160Y1 Y1Y1 EIO2 EIO2 EIO2 EIO1 EIO1 EIO1 FR L/R /DISPOFF MD FR DI LP /DISPOFF LGND6(V DD ) First61 Last62 LP LGND VDD FLM1 L/R /DISPOFF MD FR DI LP L/R /DISPOFF MD FR DI LP Last61 First62 Y80 Y81 FLM2

Preliminary66Ver60.246 Page614/266 2009/10/016 7. PRECAUTIONS Precautions when connecting or disconnecting the power supply This6IC6has6a6high)voltage6LCD6driver,6so6a6high6current6that6may6flow6if6voltage6is6supplied6to6the6 LCD6drive6power6supply6while6the6logic6system6power6supply6is6floating6may6permanently6damage6 it.6The6details6are6as6follows,6 /circle46When6connecting6the6power6supply,6connect6the6LCD6drive6power6after6connecting6the6logic6 system6power.6Furthermore,6when6disconnecting6the6power,6disconnect6the6logic6system6power6 after6disconnecting6the6LCD6drive6power6 /circle46It6is6advisable6to6connect6the6serial6resistor6(4.7Ω6to650Ω)6or6fuse6to6the6LCD6drive6power6V 06of6 the6system6as6a6current6limiter.6Set6up6a6suitable6value6of6the6resistor6in6consideration6of6the6 display6grade. 6 And6when6connecting6the6logic6power6supply,6the6logic6condition6of6this6IC6inside6is6insecure.6 Therefore6connect6the6LCD6drive6power6supply6after6resetting6logic6condition6of6this6IC6inside6on6 /DISPOFF6function.6After6that,6cancel6the6/DISPOFF6function6after6the6LCD6drive6power6supply6 has6become6stable.6Furthermore,6when6disconnecting6the6power,6set6the6LCD6drive6output6pins6to6 level6LGND6on6/DISPOFF6function.6Then6disconnect6the6logic6system6power6after6disconnecting6 the6LCD6drive6power.66 When6connecting6the6power6supply,6follow6the6recommended6sequence6shown6here VDD LGND VDD LGND GND VDD /DISPOFF

Preliminary66Ver60.246 Page615/266 2009/10/016 8. ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL APPLICABLE PINS RATING UNIT NOTE Supply6voltage6(1) 6 VDD 6 VDD 6 )0.3~6+7.0 6 V6 V06 V0L,6V 0R6 )0.36~6+33.0 6 V6 V12 6 V12L ,6V 12R 6 V06)10~6V 06+60.3 6 V6Supply6voltage6(2) 6 V43 6 V43L ,6V 43R 6 )0.36~6V SS 6+6106 V6 Input6voltage 6 VI6 D1 7)DI 0,6XCK,6LP,6L/R,6FR,6 MD,6S/C,6EIO 1,6EIO 2,6 /DISPOFF 6 )0.36to6V DD 6+60.3 6 V6 1,2 6 Storage6temperature 6 TSTG 6 6 )456to6+1256 °C6 6 NOTES: 1.6TA6=6+256°C6 2.6The6applicable6voltage6on6logic6pins6with6respect6to6LGND,6high6voltage6pins6with6V SS 6(06V).6 3.6Stress6over6the6“Absolute6Max.6Ratings”6conditions6will6damage6the6device6permanently.6 9. RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL APPLICABLE PINS MIN. TYP . MAX. UNIT NOTE Supply6voltage6(1)6 V DD 6 V DD 6 +2.56 6 +5.5 6 V6 Supply6voltage6(2)6 V 06 V 0L,6V 0R6 +15.06 6 +30.0 6 V6 1,62 6 Operating6temperature6 T OPR 6 6 )256 6 +856 °C6 6 NOTES: 61.6The6applicable6voltage6on6logic6pins6with6respect6to6LGND,6high6voltage6pins6with6V SS 6(06V).6 62.6Ensure6that6voltages6are6set6such6that6V SS 6<6V436<6V l2 6<6V0.6

Preliminary66Ver60.246 Page616/266 2009/10/016 10. ELECTRICAL CHARACTERISTICS

10.1 DC Characteristics

(Segment6Mode)6 (LGND6=V SS 6=606V,6V DD 6=6+2.56to6+5.56V,6V 06=6+615.06to6+30.06V,6T OPR 6=6)256to6+85°C)6 PARAMETER SYMBOL CONDITIONS APPLICABLE PINS MIN. TYP . MAX. UNIT NOTE Input6"Low"6voltage6 V IL 6 6 6 6 0.2V DD 6 V6 6 Input6"High"6voltage6 V IH 6 6 DI 7)DI 0,6XCK,6LP,6L/R6 FR,6MD,6S/C,6EIO1,6EIO 2,6 /DISPOFF6 0.8V DD 6 6 6 V6 6 Output6"Low"6voltage 6 V0L6 I OL 6=6+0.46mA6 6 6 +0.4 6 V6 6 Output6"High"6voltage 6 V0H6 I OH 6=6)0.46mA6 EIO 1,6EIO 26 VDD )0.4 6 6 6 V6 6 ILIL 6 V I6=6LGND6 6 6 )10 6 µA6 6 Input6leakage6current 6 ILIH 6 V I6=6V DD 6 DI 7)DI 0,6XCK,6LP,6LIR,6 FR,6MD,6S/C,6EIO 1,6EIO 2,6 /DISPOFF6 6 6 +10 6 µA6 6 Output6resistance6 R ON 6 |∆VON |6 =0.5V 6V06=6306V 6 Y1)Y160 6 6 1.0 6 1.5 6 kΩ6 6 Standby6current6 I STB 6 6 LGND6 6 6 506 µA6 16 Supply6current6(1)6 (Non)selection)6 I DD1 6 6 V DD 6 6 6 2.0 6 mA 6 26 Supply6current6(2)6 (Selection)6 I DD2 6 6 V DD 6 6 6 7.0 6 mA 6 36 Supply6current6(3)6 I 06 6 V 0L,6V 0R 6 6 6 0.9 6 mA 6 46 NOTES: 1.6V DD 6=6+5.06V,6V 06=6+30.06V,6Vi6=6LGND.66 2.6V DD 6=6+5.06V,6V 06=6+30.06V,6f XCK 6=686MHz,6no)load,6El6=6V DD .6The6input6data6is6turned6over6by6data6taking6 clock6(4)bit6parallel6input6mode).6 3.6V DD 6=6+5.06V,6V 06=6+30.06V,6f XCK 6=686MHz,6no)load,6El6=6LGND.6The6input6data6is6turned6over6by6data6taking6 clock6(4)bit6parallel6input6mode).6 by6data6taking6clock6(4)bit6parallel6input6mode).6 (Common6Mode)6666(LGND6=V SS 6=606V,6V DD 6=6+2.56to6+5.56V,6V 06=6+615.06to6+30.06V,6T OPR 6=6)256to6+856°C)6 PARAMETER SYMBOL CONDITIONS APPLICABL E PINS MIN. TYP . MAX. UNIT NOTE Input6"Low"6voltage6 V IL 6 6 6 6 0.2V DD 6 V6 6 Input6"High"6voltage6 V IH 6 6 DI 7)DI 0,6XCK,6LP,6L/R6 FR,6MD,6S/C,6EIO 1,6 EIO 2,6/DISPOFF6 0.8V DD 6 6 6 V6 6 Output6"Low"6voltage6 V 0L6 I OL 6=6+0.46mA6 6 6 +0.4 6 V6 6 Output6"High"6voltage6 V 0H6 I OH 6=6)0.46mA6 EIO 1,6EIO 26 VDD )0.4 6 6 6 V6 6 ILIL 6 V I6=6LGND6 DI 7)DI 0,6XCK,6LP,6 LIR,6FR,6MD,6S/C,6 EIO 1,6EIO 2,6 /DISPOFF6 6 6 )10.0 6 µA6 Input6leakage6current6 ILIH 6 V I6=6V DD 6 DI 6)DI 0,6LP,6L/R,6FR,6 MD,6S/C,6/DISPOFF 6 6 6 +10.0 6 µA6 6 Input6pull)down6current 6 IPD 6 V I6=6V DD 6 DI 7,6XCK,6EIO 1,6EIO 26 6 6 1006 µA 6 6 Output6resistance6 R ON 6 |∆VON |6 =0.5V 6V06=6306V6 Y 1)Y160 6 6 1.0 6 1.56 kΩ 6 6 Standby6current6 I SPD 6 6 LGND6 6 6 506 µA 6 16 Supply6current6(1)6 I DD 6 6 V DD 6 6 6 806 µA 6 26 Supply6current6(2)6 I 06 6 V 0L,6V 0R6 6 6 1306 µA 6 26 NOTES:6 61.6V DD 6=6+5.06V,6V 06=6+30.06V,6V I6=6LGND6

Preliminary66Ver60.246 Page617/266 2009/10/016

10.2 AC Characteristics

(Segment6Mode61)6 (LGND6=VSS 6=606V,6V DD 6=6+2.56to6+3.06V,6V 06=6+615.06to6+30.06V,6T OPR 6=6)25610+856°C)6 PARAMETER SYMBOL CONDITIONS MIN TYP . MAX. UNIT NOTE Shift6clock6period6 t WCK6 t R,tF6≤611ns6 1256 6 6 ns6 16 Shift6clock6"H"6pulse6width66 t WCKH 6 6 516 6 6 ns6 6 Shift6clock6"L"6pulse6width6 t WCKL 6 6 516 6 6 ns6 6 Data6setup6time6 t DS 6 6 306 6 6 ns6 6 Data6hold6time6 t DH 6 6 406 6 6 ns6 6 Latch6pulse6"H"6pulse6width6 t WLPH 6 6 516 6 6 ns6 6 Shift6clock6rise6to6latch6pulse6rise6 time6 t LD 6 6 06 6 6 ns6 6 Shift6clock6fall6to6latch6pulse6fall6 time6 t SL 6 6 516 6 6 ns6 6 Latch6pulse6rise6to6shift6clock6rise6 time6 t LS 6 6 516 6 6 ns6 6 Latch6pulse6fall6to6shift6clock6fall6 time6 t LH 6 6 516 6 6 ns6 6 Enable6setup6time6 t S6 6 366 6 6 ns6 6 Input6signal6rise6time6 t R6 6 6 6 506 ns6 26 Input6signal6fall6time66 t F6 6 6 6 506 ns6 26 DISPOFF6removal6time6 t SD 6 6 1006 6 6 ns6 6 DISPOFF6"L"6pulse6width6 t WDL 6 6 1.26 6 6 µs6 6 Output6delay6time6(1)6 t D6 CL6=6156pF6 6 6 786 ns6 6 Output6delay6time6(2)6 t PD1,6t 6PD26 CL6=6156pF6 6 6 1.26 µs6 6 Output6delay6time6(3)6 t 6PD36 CL6=6156pF6 6 6 1.26 µs6 6 NOTES:6 61.6Takes6the6cascade6connection6into6consideration.6 62.6(t WCK6)6t WCKH 6)6t WCKL )/26is6maximum6in6the6case6of6high6speed6operation.6 (Segment6Mode62)666666(LGND6=V SS 6=606V,6V DD 6=6+5.0±0.56V,6V 06=6+615.06to6+30.06V,6T OPR 6=6)256to6+856°C)6 PARAMETER SYMBOL CONDITIONS MIN. TYP . MAX. UNIT NOTE Shift6clock6period6 t WCK6 t R,tF6≤610ns6 666 6 6 ns6 16 Shift6clock6"H"6pulse6width6 t WCKH 6 6 236 6 6 ns6 6 Shift6clock6"L”6pulse6width6 t WCKL 6 6 236 6 6 ns6 6 Data6setup6time6 t DS 6 6 156 6 6 ns6 6 Data6hold6time6 t DH 6 6 236 6 6 ns6 6 Latch6pulse6"H"6pulse6width6 t WLPH 6 6 306 6 6 ns6 6 Shift6clock6rise6to6latch6pulse6rise6 time6 t LD 6 6 06 6 6 ns6 6 Shift6clock6fall6to6latch6pulse6fall6 time6 t SL 6 6 506 6 6 ns6 6 Latch6pulse6rise6to6shift6clock6rise6 time6 t LS 6 6 306 6 6 ns6 6 Latch6pulse6fall6to6shift6clock6fall6 time6 t LH 6 6 306 6 6 ns6 6 Enable6setup6time6 t S6 6 156 6 6 ns6 6 Input6signal6rise6time6 t R6 6 6 6 506 ns 6 26 Input6signal6fall6time6 t F6 6 6 6 506 ns 6 26 DISPOFF6removal6time6 t SD 6 6 1006 6 6 ns6 6 DISPOFF6"L"6pulse6width6 t WDL 6 6 1.26 6 6 µs6 6 Output6delay6time6(1)6 t D6 CL6=6156pF6 6 6 416 ns6 6 Output6delay6time6(2)6 t PD1,6t 6PD26 CL6=6156pF6 6 6 1.26 µs6 6 Output6delay6time6(3)6 t 6PD36 CL6=6156pF6 6 6 1.26 µs6 6 NOTES:6 61.6Takes6the6cascade6connection6into6consideration.6 62.6(t WCK6)6t WCKH 6)6t WCKL )/26is6maximum6in6the6case6of6high6speed6operation.66666666

Preliminary66Ver60.246 Page618/266 2009/10/016 (Segment6Mode63)66 (LGND6=VSS 6=606V,6V DD 6=6+3.06to6+4.56V,6V 06=6+615.06to6+30.06V,6T OPR 6=6)25610+856°C)6 PARAMETER SYMBOL CONDITIONS MIN. TYP . MAX. UNIT NOTE Shift6clock6period6 t WCK6 t R,tF6≤610ns6 826 6 6 ns6 16 Shift6clock6"H"6pulse6width6 t WCKH 6 6 286 6 6 ns6 6 Shift6clock6"L”6pulse6width6 t WCKL 6 6 286 6 6 ns6 6 Data6setup6time6 t DS 6 6 206 6 6 ns6 6 Data6hold6time6 t DH 6 6 236 6 6 ns6 6 Latch6pulse6"H"6pulse6width6 t WLPH 6 6 306 6 6 ns6 6 Shift6clock6rise6to6latch6pulse6rise6 time6 t LD 6 6 06 6 6 ns6 6 Shift6clock6fall6to6latch6pulse6fall6 time6 t SL 6 6 516 6 6 ns6 6 Latch6pulse6rise6to6shift6clock6rise6 time6 t LS 6 6 306 6 6 ns6 6 Latch6pulse6fall6to6shift6clock6fall6 time6 t LH 6 6 306 6 6 ns6 6 Enable6setup6time6 t S6 6 156 6 6 ns6 6 Input6signal6rise6time6 t R6 6 6 6 506 ns 6 26 Input6signal6fall6time6 t F6 6 6 6 506 ns 6 26 DISPOFF6removal6time6 t SD 6 6 1006 6 6 ns6 6 DISPOFF6"L"6pulse6width6 t WDL 6 6 1.26 6 6 µs6 6 Output6delay6time6(1)6 t D6 CL6=6156pF6 6 6 576 ns6 6 Output6delay6time6(2)6 t PD1,6t 6PD26 CL6=6156pF6 6 6 1.26 µs6 6 Output6delay6time6(3)6 t 6PD36 CL6=6156pF6 6 6 1.26 µs6 6 NOTES: 61.6Takes6the6cascade6connection6into6consideration.6 62.6(t WCK6)6t WCKH 6)6t WCKL )/26is6maximum6in6the6case6of6high6speed6operation.6 (Common6Mode)6 (LGND6=V SS 6=606V,6VDD 6=6+2.56to6+5.56V,6V 06=6+15.06to6+30.06V,6T OPR 6=6)256to6+85°6C)6 PARAMETER SYMBOL CONDITIONS MIN. TYP . MAX. UNIT Shift6clock6period6 t WLP 6 t R,tF6≤620ns6 2506 6 6 ns6 VDD 6=6+5.0±60.5V6 156 6 6 ns6Shift6clock6"H"6pulse6width6 t WLPH 6 VDD 6=6+2.5+64.5V6 306 6 6 ns6 Data6setup6time6 t SU 6 6 306 6 6 ns6 Data6hold6time6 t H6 6 506 6 6 ns6 Input6signal6rise6time6 t R6 6 6 6 506 ns 6 Input6signal6fall6time6 t F6 6 6 6 506 ns 6 DISPOFF6removal6time6 t SD 6 6 1006 6 6 ns6 DISPOFF6"L"6pulse6width6 t WDL 6 6 1.26 6 6 µs6 Output6delay6time6(1)6 t DL6 CL6=6156pF6 6 6 2006 ns6 Output6delay6time6(2)6 t PD1,6t 6PD26 CL6=6156pF6 6 6 1.26 µs6 Output6delay6time6(3)6 t 6PD36 CL6=6156pF6 6 6 1.26 µs6

Preliminary66Ver60.246 Page619/266 2009/10/016

10.3 Timing Chart of Segment Mode

1 2 n* tD LP XCK EI EO *n6=6406in64)bit6parallel6input6mode *n6=6206in68)bit6parallel6input6mode 6666 FR LP DISPOFF Y16)6Y160 tPD1 tPD3 tPD2 Fig.686Timing6Characteristics6(3)6 LP XCK DI76)6DI0 DISPOFF tWLPH tLD tSL tLH tLS tWCKH tFtR tWCK tDS tDH TOP6DATALAST6DATA tWDL tSD tWCKL

Preliminary66Ver60.246 Page620/266 2009/10/016

10.4 Timing Chart of Common Mode

Y16)6Y160 tPD1 tPD3 tPD2 DISPOFF

Preliminary66Ver60.246 Page621/266 2009/10/016 11. APPLICATION CIRCUIT

11.1 Application Circuit for Module

160 X 160 DOT LCD PANEL FR

/DISPOFF XCK FR LP /DISPOFF XCK EIO 2 MD S/C L/R EIO V SS EIO2 MD S/C L/R EIO1 DI0~DI7 FLM LP /DISPOFF XCK AC CONTROLLER 4.7~50 ΩΩ ΩΩ Y 1 ~Y 160 ST8016S ST8016S VEE Y 1 ~Y 160 XD 0~XD 7 DI 0~DI 7 V DD Power GND

11.2 LCD Panel Layout Example

PS6:6Above6resistor6value6test6on63”6LCD6panel. 6 Pin Name ITO Resistor Values Suggestion LGND,6GND,6V DD ,6Vss6 Less6than675Ω6when6VDD 6≧63.0V,6and6the6smaller6the6better6 V0R,6V0L6 Less6than6150Ω,6and6the6smaller6the6better 6 V12R,6V12L,6V34R,6V12L 6 Less6than6250Ω,6and6the6smaller6the6better6

Preliminary66Ver60.246 Page622/266 2009/10/016 12. PAD DIAGRAM Note:66Subtrate6should6be6connected6to6GND.6 Unit:6um6 PIN# Name X Y PIN# Name X Y 16 V SS 6 ) 2857.5006 )355.0006 346 V SS 6 2845.0006 16.5006 26 GND6 ) 2733.0006 )383.1006 356 V 34R6 2845.0006 82.5006 36 GND6 ) 2622.8506 )383.1506 366 V 12R6 2845.0006 148.5006 46 LGND6 ) 2521.5506 )383.1506 376 V 0R6 2845.0006 214.5006 56 L/R6 ) 2410.1006 )383.1006 386 V 0R6 2845.0006 264.0006 66 V DD 6 ) 2310.6756 )383.3506 396 V 0R6 2857.5006 350.0006 76 V DD 6 ) 2220.4506 )370.6506 406 DUMMY6 2788.7006 350.0006 86 S/C6 ) 2103.6006 )383.1006 416 DUMMY6 2755.7006 350.0006 96 EIO 26 ) 1935.8506 )383.1006 426 DUMMY6 2722.7006 350.0006 106 DUMMY6 ) 1682.8506 )383.1006 436 DUMMY6 2689.7006 350.0006 116 DI 06 ) 1337.5756 )383.1006 446 Y 16 2656.7006 350.0006 126 DI 16 ) 1218.9506 )383.1006 456 Y 26 2623.7006 350.0006 136 DI 26 ) 1100.2506 )383.1006 466 Y 36 2590.7006 350.0006 146 DI 36 ) 981.5506 )383.1006 476 Y 46 2557.7006 350.0006 156 DI 46 ) 862.8506 )383.1006 486 Y 56 2524.7006 350.0006 166 DI 56 ) 744.1506 )383.1006 496 Y 66 2491.7006 350.0006 176 DUMMY6 ) 450.5006 )344.4006 506 Y 76 2458.7006 350.0006 186 DUMMY6 ) 134.7756 )347.6756 516 Y 86 2425.7006 350.0006 196 DUMMY6 204.1256 )337.7256 526 Y 96 2392.7006 350.0006 206 DUMMY6 538.7256 )337.7256 536 Y 10 6 2359.7006 350.0006 216 DI 66 1053.3506 )383.1006 546 Y 11 6 2326.7006 350.0006 226 DI 76 1172.0506 )383.1006 556 Y 12 6 2293.7006 350.0006 236 XCK6 1291.0506 )383.1006 566 Y 13 6 2260.7006 350.0006 246 /DISPOFF6 1409.7506 )383.1006 576 Y 14 6 2227.7006 350.0006 256 DUMMY6 1608.6506 )383.1006 586 Y 15 6 2194.7006 350.0006 266 LP6 1953.9256 )383.1006 596 Y 16 6 2161.7006 350.0006 276 EIO 16 2121.6006 )383.1006 606 Y 17 6 2128.7006 350.0006 286 FR6 2293.0006 )383.1006 616 Y 18 6 2095.7006 350.0006 296 MD6 2411.7006 )383.1006 626 Y 19 6 2062.7006 350.0 006 306 LGND6 2521.5506 )383.1506 636 Y 20 6 2029.7006 350.0006 316 GND6 2622.8506 )383.1506 646 Y 21 6 1996.7006 350.0006 326 GND6 2733.0006 )383.1006 656 Y 22 6 1963.7006 350.0006 336 V SS 6 2857.5006 )355.0006 666 Y 23 6 1930.7006 350.0006

Preliminary66Ver60.246 Page623/266 2009/10/016 676 Y 24 6 1897.7006 350.0006 1146 Y 71 6 346.7006 350.0006 686 Y 25 6 1864.7006 350.0006 1156 Y 72 6 313.7006 350.0006 696 Y 26 6 1831.7006 350.0006 1166 Y 73 6 280.7006 350.0006 706 Y 27 6 1798.7006 350.0006 1176 Y 74 6 247.7006 350.0006 716 Y 28 6 1765.7006 350.0006 1186 Y 75 6 214.7006 350.0006 726 Y 29 6 1732.7006 350.0006 1196 Y 76 6 181.7006 350.0006 736 Y 30 6 1699.7006 350.0006 1206 Y 77 6 148.7006 350.0006 746 Y 31 6 1666.7006 350.0006 1216 Y 78 6 115.7006 350.0006 756 Y 32 6 1633.7006 350.0006 1226 Y 79 6 82.7006 350.0006 766 Y 33 6 1600.7006 350.0006 1236 Y 80 6 49.7006 350.0006 776 Y 34 6 1567.7006 350.0006 1246 DUMMY6 16.7006 350.0006 786 Y 35 6 1534.7006 350.0006 1256 DUMMY6 ) 16.7006 350.0006 796 Y 36 6 1501.7006 350.0006 1266 Y 81 6 ) 49.7006 350.0006 806 Y 37 6 1468.7006 350.0006 1276 Y 82 6 ) 82.7006 350.0006 816 Y 38 6 1435.7006 350.0006 1286 Y 83 6 ) 115.7006 350.0006 826 Y 396 1402.7006 350.0006 1296 Y 84 6 ) 148.7006 350.0006 836 Y 40 6 1369.7006 350.0006 1306 Y 85 6 ) 181.7006 350.0006 846 Y 41 6 1336.7006 350.0006 1316 Y 86 6 ) 214.7006 350.0006 856 Y 42 6 1303.7006 350.0006 1326 Y 87 6 ) 247.7006 350.0006 866 Y 43 6 1270.7006 350.0006 1336 Y 88 6 ) 280.7006 350.0006 876 Y 44 6 1237.7006 350.0006 1346 Y 89 6 ) 313.7006 350.0006 886 Y 45 6 1204.7006 350.0006 1356 Y 90 6 ) 346.7006 350.0006 896 Y 46 6 1171.7006 350.0006 1366 Y 91 6 ) 379.7006 350.0006 906 Y 47 6 1138.7006 350.0006 1376 Y 92 6 ) 412.7006 350.0006 916 Y 48 6 1105.7006 350.0006 1386 Y 93 6 ) 445.7006 350.0006 926 Y 49 6 1072.7006 350.0006 1396 Y 94 6 ) 478.7006 350.0006 936 Y 50 6 1039.7006 350.0006 1406 Y 95 6 ) 511.7006 350.0006 946 Y 51 6 1006.7006 350.0006 1416 Y 96 6 ) 544.7006 350.0006 956 Y 52 6 973.7006 350.0006 1426 Y 97 6 ) 577.7006 350.0006 966 Y 53 6 940.7006 35 0.0006 1436 Y 98 6 ) 610.7006 350.0006 976 Y 54 6 907.7006 350.0006 1446 Y 99 6 ) 643.7006 350.0006 986 Y 55 6 874.7006 350.0006 1456 Y 100 6 ) 676.7006 350.0006 996 Y 56 6 841.7006 350.0006 1466 Y 101 6 ) 709.7006 350.0006 100 6 Y57 6 808.7006 350.0006 1476 Y 102 6 ) 742.7006 350.0006 101 6 Y58 6 775.7006 350.0006 1486 Y 103 6 ) 775.7006 350.0006 102 6 Y59 6 742.7006 350.0006 1496 Y 104 6 ) 808.7006 350.0006 103 6 Y60 6 709.7006 350.0006 1506 Y 105 6 ) 841.7006 350.0006 104 6 Y61 6 676.7006 350.0006 1516 Y 106 6 ) 874.7006 350.0006 105 6 Y62 6 643.7006 350.0006 1526 Y 107 6 )907.7 006 350.0006 106 6 Y63 6 610.7006 350.0006 1536 Y 108 6 ) 940.7006 350.0006 107 6 Y64 6 577.7006 350.0006 1546 Y 109 6 ) 973.7006 350.0006 108 6 Y65 6 544.7006 350.0006 1556 Y 110 6 ) 1006.7006 350.0006 109 6 Y66 6 511.7006 350.0006 1566 Y 111 6 ) 1039.7006 350.0006 110 6 Y67 6 478.7006 350 .0006 1576 Y 112 6 ) 1072.7006 350.0006 111 6 Y68 6 445.7006 350.0006 1586 Y 113 6 ) 1105.7006 350.0006 112 6 Y69 6 412.7006 350.0006 1596 Y 114 6 ) 1138.7006 350.0006 113 6 Y70 6 379.7006 350.0006 1606 Y 115 6 ) 1171.7006 350.0006

Preliminary66Ver60.246 Page624/266 2009/10/016 161 6 Y116 6 ) 1204.7006 350.0006 1896 Y 144 6 ) 2128.7006 350 .0006 162 6 Y117 6 ) 1237.7006 350.0006 1906 Y 145 6 ) 2161.7006 350.0006 163 6 Y118 6 ) 1270.7006 350.0006 1916 Y 146 6 ) 2194.7006 350.0006 164 6 Y119 6 ) 1303.7006 350.0006 1926 Y 147 6 ) 2227.7006 350.0006 165 6 Y120 6 ) 1336.7006 350.0006 1936 Y 148 6 ) 2260.7006 350.0006 166 6 Y121 6 )136 9.7006 350.0006 1946 Y 149 6 ) 2293.7006 350.0006 167 6 Y122 6 ) 1402.7006 350.0006 1956 Y 150 6 ) 2326.7006 350.0006 168 6 Y123 6 ) 1435.7006 350.0006 1966 Y 151 6 ) 2359.7006 350.0006 169 6 Y124 6 ) 1468.7006 350.0006 1976 Y 152 6 ) 2392.7006 350.0006 170 6 Y125 6 ) 1501.7006 350.0006 1986 Y 153 6 ) 2425.7006 350.0006 171 6 Y126 6 ) 1534.7006 350.0006 1996 Y 154 6 ) 2458.7006 350.0006 172 6 Y127 6 ) 1567.7006 350.0006 2006 Y 155 6 ) 2491.7006 350.0006 173 6 Y128 6 ) 1600.7006 350.0006 2016 Y 156 6 ) 2524.7006 350.0006 174 6 Y129 6 ) 1633.7006 350.0006 2026 Y 157 6 ) 2557.7006 350. 0006 175 6 Y130 6 ) 1666.7006 350.0006 2036 Y 158 6 ) 2590.7006 350.0006 176 6 Y131 6 ) 1699.7006 350.0006 2046 Y 159 6 ) 2623.7006 350.0006 177 6 Y132 6 ) 1732.7006 350.0006 2056 Y 160 6 ) 2656.7006 350.0006 178 6 Y133 6 ) 1765.7006 350.0006 2066 DUMMY6 ) 2689.7006 350.0006 179 6 Y134 6 )179 8.7006 350.0006 2076 DUMMY6 ) 2722.7006 350.0006 180 6 Y135 6 ) 1831.7006 350.0006 2086 DUMMY6 ) 2755.7006 350.0006 181 6 Y136 6 ) 1864.7006 350.0006 2096 DUMMY6 ) 2788.7006 350.0006 182 6 Y137 6 ) 1897.7006 350.0006 2106 V 0L6 ) 2857.5006 350.0006 183 6 Y138 6 ) 1930.7006 350.0006 2116 V 0L6 ) 2845.0006 264.0006 184 6 Y139 6 ) 1963.7006 350.0006 2126 V 0L6 ) 2845.0006 214.5006 185 6 Y140 6 ) 1996.7006 350.0006 2136 V 12L6 ) 2845.0006 148.5006 186 6 Y141 6 ) 2029.7006 350.0006 2146 V 34L6 ) 2845.0006 82.5006 187 6 Y142 6 ) 2062.7006 350.0006 2156 V SS 6 ) 2845.0006 16.500 6 188 6 Y143 6 ) 2095.7006 350.0006 6 6 6 6

12.1 Gold Bump size (unit: um)

Pad6No.6 X6 Y6 Area6(um 2)6 1,336 87.00 6 112.00 6 9744.0000 6 66 59.75 6 42.906 2563.27506 76 80.70 6 42.406 3421.68006 2,326 99.00 6 42.406 4197.60006 3,4,30,316 81.30 6 42.306 3438.99006 5,8,9,12~16,21~24,27~296 88.70 6 42.406 3760.88006 10,256 100.20 6 42.40 6 4248.4800 6 11,266 88.55 6 42.406 3754.52006 176 43.30 6 44.40 6 1922.5200 6 186 52.85 6 37.85 6 2000.3725 6 19,206 34.65 6 57.75 6 2001.0375 6 40~2096 18.00 6 122.006 2196.00006 38,2116 112.00 6 18.006 2016.00006 39,2106 87.00 6 122.00 6 10614.0000 6 34~37,212~2156 112.00 6 51.006 5712.00006 6 Wafer6Thickness6=6480.0 ±20um,6Bump6pad6height6(pad61~215)6=615um,6strength=30g6

Preliminary66Ver60.246 Page625/266 2009/10/016 13. APPLICATION NOTE(REFERENCE ONLY) 13.16 Adjust6V16and6V46voltage6to6keep6the6V0)V16=6V4)VSS6relation6to6get6better6display6quality.6The6 (V0)V1))(V4)VSS)6value6had6better6less6than6100mV.6 13.26 Add60.1uF6high6frequency6by)pass6capacitor6to6filter6the6noise6on6V0~V46to6VSS.6 13.36 When6OP6follower6circuit6is6used,6please6be6sure6the6OP6power6is6higher6than6V06at6least61.5V.6

13.46 EIO16and6EIO26is6enable6pin6for6driver,6please6pay6attention6to6the6distance6to6avoid6noise6when6

cascade6function6is6used.6Two6chip6connecting6distance6is6as6shorter6as6better.6

Preliminary66Ver60.246 Page626/266 2009/10/016 14. REVISION REVISION6 DESCRIPTION6 PAGE6 DATE6

0.106 First6release6 1)256 2005/8/46

0.116 Delete6TCP6information6 1)256 2005/9/86

0.126 Add6LGND6definition,6and6re)define6the6pin6function6 1)256 2005/11/22 6

0.136 Modify6suggestion6resistor6value6for6V06and6bond6pad6height6to6

18um.66 Add6alignment6mark6data6and6LCD6Panel6Layout6Example.6 21)226 2006/4/46

0.146 Modify6LCD6panel6layout6example6S/C6of6COM6to6connect6to6

LGND,6and6add6the6ITO6resistor6value6suggestion.6 216 2006/5/236 0.156 Modify6the6center6of6pad6coordinate6to6the6IC6center.6 22)246 2006/5/306 0.166 Modify6the6Bump6pad6height6and6add6wafer6thickness.6 246 2006/6/76

0.176 Modify6all6Vss6for6logic6setting6pins6to6LGND6 21)246 2006/7/216

0.186 Modify6Description6of6LGND6 1)256 2006/7/216

0.196 Change6Sitronix6Logo6and6Modify6description6of 6LGND6for6

1)256 2006/7/216

0.206 Modify6arrangement6 1)256 2006/8/36

0.216 Modify6Chip6size6and6thickness6with6scribe6line6

Modify6“ABSOLUTE6MAXIMUM6RATINGS”6max6value6 Modify6“Output6resistance”6test6condition6 15,22,24 6 2006/10/26 6

0.226 Modify6all6the6data6about6absolute6max6voltage6and6recommend6max6

2,16)186 2007/5/256

0.236 Modify6the6ITO6resistor6value6suggestion6

21,266 2008/5/056

0.246 Modify6 LCD6Panel6Layout6Example 6 216 2009/10/01 6

The6above6information6is6the6exclusive6intellectual6property6of6Sitronix6Technology6Corp.6and6shall6not6be6disclosed,6distributed6or6reproduced6without6 permission6from6Sitronix.6