SST404-LF CALOGIC | Alldatasheet

Document overview

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Technical content

FEATURES

APPLICATIONS

  • • Precision Instrumentation
  • • Input Amplifiers
  • • Impedance Converters

DESCRIPTION

The SST404 Series is a very Low Noise Monolithic N-Channel JFET Pair in a surface mount SO-8 plastic package. Designed utilizing Calogic’s proprietary JFET processing techniques these devices are ideal for front end amplification of low level signals. The low noise, low leakage and good frequency response are excellent features for sensitive medical, instrumentation and infrared designs.

ORDERING INFORMATION

Part Package Temperature Range SST404-6 Plastic SO-8 -55 oC to +125oC NOTE: For Sorted Chips in Carriers, See U401 Series PIN CONFIGURATIONS LLC SO-8 TOP VIEW (1) S1 (2) D1 (3) G1 (4) N/C N/C (8) G2 (7) D2 (6) S2 (5) CJ2 PRODUCT MARKING SST404 R04 SST405 R05 SST406 R06

ABSOLUTE MAXIMUM RATINGS (TA = 25oC unless otherwise noted) Parameter/Test Condition Symbol Limit Unit Gate-Drain Voltage V GD -50 V Gate-Source Voltage V GS -50 V Forward Gate Current I G 10 mA Power Dissipation (per side) P D 300 mW (total) 500 mW Power Derating (per side) 2.4 mW/ oC (total) 4 mW/ oC Operating Junction T emperature T J -55 to 150 oC Storage T emperature T stg -55 to 200 oC Lead T emperature (1/16" from case for 10 seconds) T L 300 oC ELECTRICAL CHARACTERISTICS (TA = 25oC unless otherwise noted) SYMBOL CHARACTERISTCS TYP 1 SST404 SST405 SST406 UNIT TEST CONDITIONS MIN MAX MIN MAX MIN MAX STATIC V(BR)GSS Gate-Source Breakdown Voltage -58 -50 -50 -50 V IG = -1µA, VDS = 0V V(BR)G1 - G2 Gate-Gate Breakdown Voltage -58 ±50 ±50 ±50 I G = ±1µA, VDS = 0V, VGS = 0V IDSS Saturation Drain Current 2 3 . 50 . 51 00 . 51 00 . 51 0 m A V DS = 15V, VGS = 0V IGSS Gate Reverse Current -2 -25 -25 -25 pA V GS = -30V , VDS = 0V -1 nA T A = 125oC IG Gate Operating Current -2 -15 -15 -15 pA VDG = 15V, ID = 200µA -0.8 -10 -10 -10 nA T A = 125oC rDS(ON) Drain-Source On-Resistance 250 Ω VGS = 0V, ID = 0.1mA VGS Gate-Source Voltage -1 -2.3 -2.3 -2.3 V VDG = 15V, ID = 200µA VGS(F) Gate-Source Forward Voltage 0.7 IG = 1mA, V DS = 0V DYNAMIC gfs Common-Source Forward Transconductance 1.5 121212 m S VDG = 15V, ID = 200µA f = 1kHzgos Common-Source Output Conductance 1.3 2 2 2 µS gfs Common-Source Forward Transconductance 1.5 272727 VDS = 10V, VGS = 0V f = 1kHzgos Common-Source Output Conductance 10 20 20 20 C iss Common-Source Input Capacitance 8 8 8 pF VDG = 15V , ID = 200µA f = 1MHzC rss Common-Source Reverse Transfer Capacitance 1.5 3 3 3 en Equivalent Input Noise Voltage 10 20 20 20 nV/ Hz VDG = 15V, ID = 200µA f = 10Hz MATCHING | VGS1 - VGS2 | Differential Gate-Source Voltage 15 20 40 mV VDG = 10V, ID = 200µA Δ | VGS1 - VGS2 | ΔT Gate-Source Voltage Differential Change with Temperature 25 40 80 µV/ oC TA = -55 to 25oC VDG = 10V, ID = 200µA25 40 80 T A = 25 to 125oC CMRR Common Mode Rejection Ratio 102 95 90 dB VDG = 10 to 20V , ID = 200µA NOTES: 1. For design aid only, not subject to production testing. 2. Pulse test; PW = 300µs, duty cycle ≤ 3%.