SST404_PDIP MICROSS | Alldatasheet

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FEATURES

LOW DRIFT | V GS1‐2 / T| = 10µV/°C TYP. LOW NOISE en = 6nV/Hz @ 10Hz TYP. LOW PINCHOFF Vp = 2.5V TYP. ABSOLUTE MAXIMUM RATINGS @ 25°C (unless otherwise noted) Maximum Temperatures Storage Temperature ‐ 65°C to +150°C Operating Junction Temperature +150°C Maximum Voltage and Current for Each Transistor – Note 1 ‐VGSS Gate Voltage to Drain or Source 50V ‐VDSO Drain to Source Voltage 50V ‐IG(f) Gate Forward Current 10mA Maximum Power Dissipation Device Dissipation @ Free Air – Total 300mW MATCHING CHARACTERISTICS @ 25°C UNLESS OTHERWISE NOTED SYMBOL CHARACTERISTICS VALUE UNITS CONDITIONS | V GS1‐2 / T| max. DRIFT VS. TEMPERATURE 25 µV/°C VDG=10V, ID=200µA TA=‐55°C to +125°C | V GS1‐2 | max. OFFSET VOLTAGE 15 mV VDG=10V, ID=200µA ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted) SYMBOL CHARACTERISTICS MIN. TYP. MAX. UNITS CONDITIONS BVGSS Breakdown Voltage 50 60 ‐‐ V VDS = 0 ID=1nA BVGGO Gate‐To‐Gate Breakdown ±50 ‐‐ ‐‐ V I G= 1nA ID= 0 IS= 0 YfSS TRANSCONDUCTANCE Full Conduction 2000 7000 µmho VDG= 10V VGS= 0V f = 1kHz YfS Typical Operation 1000 ‐‐ 2000 µmho VDG= 15V ID= 200µA f = 1kHz |YFS1‐2 / Y FS| Mismatch ‐‐ 0.6 3 % IDSS DRAIN CURRENT Full Conduction 0.5 mA VDG= 10V VGS= 0V |IDSS1‐2 / IDSS| Mismatch at Full Conduction ‐‐ 1 5 % VGS(off) or Vp GATE VOLTAGE Pinchoff voltage ‐0.5 ‐2.5 V VDS= 15V ID= 1nA VGS(on) Operating Range ‐‐ ‐‐ ‐ 2.3 V VDS=15V ID=200µA ‐IGmax. GATE CURRENT Operating ‐15 pA VDG= 15V ID= 200µA ‐IGmax. High Temperature ‐‐ ‐‐ ‐ 10 nA TA= +125°C ‐IGSSmax. At Full Conduction ‐‐ ‐‐ 100 pA VDS =0 ‐IGSSmax. High Temperature 5 5 5 pA VDG= 15V TA= +125°C YOSS OUTPUT CONDUCTANCE Full Conduction µmho VDG= 10V VGS= 0V YOS Operating ‐‐ 0.2 2 µmho VDG= 15V ID= 500µA CMR COMMON MODE REJECTION ‐20 log | V GS1‐2/ V DS| dB VDS = 10 to 20V ID=30µA NF NOISE Figure 0.5 dB VDS= 15V VGS= 0V RG= 10M f= 100Hz NBW= 6Hz en Voltage ‐‐ 20 ‐‐ nV/√Hz VDS=15V ID=200µA f=10Hz NBW=1Hz CISS CAPACITANCE Input pF VDS= 15V ID= 200µA f= 1MHz CRSS Reverse Transfer ‐‐ ‐‐ 1.5 pF The SST404 is a Low Noise, Low Drift, Monolithic Dual N-Channel JFET SST404 LOW NOISE, LOW DRIFT MONOLITHIC DUAL N-CHANNEL JFET SST404 Applications: ƒ Wideband Differential Amps ƒ High-Speed,Temp-Compensated Single-Ended Input Amps ƒ High-Speed Comparators ƒ Impedance Converters and vibrations detectors. The SST404 is a high-performance monolithic dual JFET featuring extremely low noise, tight offset voltage and low drift over temperature specifications, and is targeted for use in a wide range of precision instrumentation applications. The SST404 features a 5- mV offset and 10-µV/°C drift. The SST404 is a direct replacement for discontinued Siliconix SST404. The 8 Pin P-DIP and 8 Pin SOIC provide ease of manufacturing, and the symmetrical pinout prevents improper orientation. (See Packaging Information). Linear Systems replaces discontinued Siliconix SST404 Note 1 – These ratings are limiting values above which the serviceability of any semiconductor may be impaired PDIP / SOIC (Top View) Available Packages: SST404 in PDIP / SOIC SST404 available as bare die Please contact Micross for full package and die dimensions Micross Components Europe Tel: +44 1603 788967 Email: chipcomponents@micross.com Web: http://www.micross.com/distribution