SP693AET

SP691A SIPEX | Alldatasheet

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Date: 5/25/04 SP691A/693A/800L/800M Low Power Microprocessor Supervisor with Battery Switch-Over © Copyright 2004 Sipex Corporation Low Power Microprocessor Supervisory with Battery Switch-Over SP691A/693A/800L/800M The SP691A/693A/800L/800M is a microprocessor (µP) supervisory circuit that integrates a myriad of components involved in discrete solutions to monitor power-supply and battery-control functions in µP and digital systems. The SP691A/693A/800L/800M offers complete µP monitoring and watchdog functions. The SP691A/693A/800L/800M is ideal for a low-cost battery management solution and is well suited for portable, battery-powered applications with its supply current of 35 µA. The 6ns chip-enable propagation delay, the 25mA current output in battery-backup mode, and the 250mA current output in standard operation also makes the SP691A/693A/800L/800M suitable for larger scale, high-performance equipment. ■ Precision 4.65V/4.40V Voltage Monitoring ■ 200ms Or Adjustable Reset Time ■ 100ms, 1.6s Or Adjustable Watchdog Time ■ 60µA Maximum Operating Supply Current ■ 2.0µA Maximum Battery Backup Current ■ 0.1µA Maximum Battery Standby Current ■ Power Switching 250mA Output in Vcc Mode (0.6 Ω) 25mA Output in Battery Mode (5 Ω) ■ On-Board Gating of Chip-Enable Signals Memory Write-Cycle Completion 6ns CE Gate Propagation Delay ■ Voltage Monitor for Power-Fail or Low Battery ■ Backup-Battery Monitor ■ RESET Valid to Vcc=1V ■ 1% Accuracy Guaranteed ( SP800L/800M) ■ Pin Compatible Upgrade to MAX691A/693A/ 800L/800M rebmuNtraPd lohserhTTESERy caruccATESERy caruccAIFPh ctiwSyrettaB-pukcaB A196PSV 56.4+ Vm521+ %4S EY A396PSV 04.4+ Vm521+ %4S EY L008PSV 56.4+ Vm05+ %1S EY M008PSV 04.4+ Vm05+ %1S EY SIGNAL PROCESSING EXCELLENCE

DESCRIPTION

FEATURES

Now Available in Lead Free Packaging

Date: 5/25/04 SP691A/693A/800L/800M Low Power Microprocessor Supervisor with Battery Switch-Over © Copyright 2004 Sipex Corporation These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. Terminal Voltages (with respect to GND) V Input Currents V noted. Typical values apply at TAMB=+25OC. SRETEMARAP. NIM. PYT. XAMS TINUS NOITIDNOC ,egnaRegatloVgnitarepO V CC Vro TTAB 1ETON, 05 .5V V,egatloVtuptuO TUO edoMgnitarepOlamroNni V CC 50.0- V CC 3.0- V CC 2.0- V CC 510.0- V CC 51.0- V CC 90.0- V V CC I,V5.4= TUO Am52= V CC I,V5.4= TUO Am052= V CC V,V0.3= TTAB I,V8.2= TUO Am001= V CC V-ot- TUO ecnatsiseR-nO6 .0 9.0 2.1 0.2 Ω V CC V5.4= V CC V0.3= V TUO edoMpukcaB-yrettaBniV TTAB 3.0- V TTAB 52.0- V TTAB 51.0- V TTAB 1.0- V TTAB 70.0- V TTAB 50.0- V V TTAB I,V5.4= TUO Am02= V TTAB I,V8.2= TUO Am01= V TTAB I,V0.2= TUO Am5= V TTAB V-ot- TUO ecnatsiseR-nO5 Ω V TTAB V5.4= V TTAB V8.2= V TTAB V0.2= lamroNnitnerruCylppuS I,edoMgnitarepO ccV 530 6 µA V CC V(> TTAB Ignidulcxe,)V1- TUO -yrettaBnitnerruCylppuS I,edoMpukcaB TTAB 2ETON, 100.00 .2 µA V CC V(< TTAB V,)V2.1- TTAB Ignidulcxe,V8.2= TUO V TTAB I,tnerruCybdnatS TTAB , 3ETON 1.0-2 0.0 µA V CC > V( TTAB Ignidulcxe,)V2.0+ TUO dlohserhTrevohctiwSyrettaBV TTAB 30.0+ V TTAB 30.0- V pu-rewop nwod-rewop siseretsyHrevohctiwSyrettaB0 6 Vm kaePotkaeP ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

Power Dissipation Per Package

Date: 5/25/04 SP691A/693A/800L/800M Low Power Microprocessor Supervisor with Battery Switch-Over © Copyright 2004 Sipex Corporation SRETEMARAP. NIM. PYT. XAMS TINUS NOITIDNOC woLtuptuONOTTAB egatloV 1.0 7.0 4.0 5.1 V I KNIS Am2.3= I KNIS Am52= trohStuptuONOTTAB tnerruCtiucriC1 510 01 Am µA tnerrucknis tnerrucecruos REMITGODHCTAWDNA,ENILWOL,TESER egatloVdlohserhTteseR0 5.4 52.4 06.4 53.4 56.4 04.4 56.4 04.4 57.4 05.4 07.4 54.4 V A196PS A396PS L008PS M008PS siseretsyHdlohserhTteseR5 1V mk aep-ot-retnec V CC yaleDTESERot0 8 µs nwodrewop yaleDTESERotENILWOL0 08s nn wodrewop doirePtuoemiTevitcAteseR rotallicsOlanretnIehtrof 0410 020 82s mp u-rewop doirePtuoemiTevitcAteseR ,kcolClanretxEehtrof 4ETON 8402 kcolc selcyc pu-rewop rofdoirePtuoemiTgodhctaW rotallicsOlanretnIeht 0.1 6.1 001 52.2 041 ces sm doirepgnol doireptrohs rofdoirePtuoemiTgodhctaW 4ETON,kcolClanretxEeht 6904 4201 kcolc selcyc doirepgnol doireptrohs tupnIgodhctaWmuminiM htdiWesluP 001s nV LI V,V8.0= HI Vx57.0= CC egatloVtuptuOTESER 5.3 400.0 1.0 3.0 4.0V I KNIS 05= µ V,A CC V,V1= CC gnillaf I KNIS V,Am2.3= CC V52.4= I ECRUOS V,Am6.1= CC V5= tiucriC-trohStuptuOTESER tnerruC 70 2A mt nerrucecruostuptuo ,woLegatloVtuptuOTESER 5ETON 1.04 .0V I KNIS Am2.3= egatloVtuptuOENILWOL 5.3 1.04 .0 V I KNIS V,Am2.3= CC V52.4= I ECRUOS 1= µ V,A CC V5= trohStuptuOENILWOL tnerruCtiucriC 510 01 µA tnerrucecruostuptuo egatloVtuptuOODW 5.3 1.04 .0 V I KNIS Am2.3= I ECRUOS 005= µ V,A CC V5= tiucriC-trohStuptuOODW tnerruC 30 1A mt nerrucecruostuptuo noted. Typical values apply at TAMB=+25OC.

Date: 5/25/04 SP691A/693A/800L/800M Low Power Microprocessor Supervisor with Battery Switch-Over © Copyright 2004 Sipex Corporation SRETEMARAP. NIM. PYT. XAMS TINUS NOITIDNOC ,egatloVdlohserhTIDW 6ETON Vx57.0 CC

8.0 V V HI

020 5 µA V0=IDW V=IDW TUO ROTARAPMOCLIAF-REWOP dlohserhTtupnIIFP0 02.1 522.1 52.1 52.1 003.1

572.1 V A396/A196PS V, CC V5=

M008/L008PS V, CC V5= tnerruCegakaeLIFP+ 10.0+ 52A n egatloVtuptuOOFP 5.3 1.04 .0 V I KNIS Am2.3= I ECRUOS 1= µ V,A CC V5= tnerruCtiucriCtrohSOFP 510 01 Am µA tnerrucknistuptuo tnerrucecruostuptuo yaleDOFP-ot-IFP5 2 06 µs V DO Vm51= V DO Vm51= GNITAGELBANE-PIHC EC NI tnerruCegakaeL+ 500.0+ 1 µAe domelbasid EC NI ECot TUO ,ecnatsiseR 7ETON 560 51 Ω edomelbane EC TUO tnerruCtiucriC-trohS )evitcATESER( 1.05 7.00 .2A mE C,edomelbasid TUO V0= EC NI ECot TUO noitagaporP 8ETON,yaleD 60 1s n0 5 Ω C,revirdecnadepmiecruos DAOL Fp05= EC TUO hgiHegatloVtuptuO )evitcATESER( 5.3

7.2 V V CC I,V5= TUO 001= µA

V CC V,V0= TTAB I,V8.2= TUO 1= µA ECotTESER TUO yaleD2 1 µsn wod-rewop ROTALLICSOLANRETNI CSO NI tnerruCegakaeL0 1.0+ 0.5 µAC SO LES V0= CSO NI tnerruCpU-lluPtupnI0 10 01 µAC SO LES V= TUO CSO,gnitaolfro NI V0= CSO LES tnerruCpU-lluPtupnI0 10 01 µAC SO LES V0= CSO NI egnaRycneuqerF0 02z HkC SO LES V0= CSO NI rotallicsOlanretxE egatloVdlohserhT V TUO 3.0-V TUO 6.0- 56.30 .2 V V HI V LI CSO NI htiwycneuqerF roticapaClanretxE 2z HkC SO LES C,V0= CSO Fp74= noted. Typical values apply at TAMB=+25OC. 1.237 1.263

Date: 5/25/04 SP691A/693A/800L/800M Low Power Microprocessor Supervisor with Battery Switch-Over © Copyright 2004 Sipex Corporation Pin 1 — VBATT — Battery-Backup Input. Connect to the external battery supply or super- charging capacitor and charging circuit. If a backup battery is not provided, connect this pin to ground. Pin 2 —V OUT — Output Supply V oltage. VOUT connects to VCC when V CC is greater than V BATT and VCC is above the reset threshold. When V CC falls below VBATT and V CC is below the reset threshold, VOUT connects to V BATT . Connect a 0.1µF capacitor from VOUT to GND. Pin 3 — VCC — +5V Input Supply Voltage. Pin 4 — GND — Ground reference for all signals. Pin 5 — BATT ON — Battery On Output. Goes high when VOUT switches to VBATT . Goes low when VOUT switches to VCC . Connect the base of a PNP through a current-limiting resistor to BATT ON for VOUT current requirements greater than 250mA. Pin 6 — LOWLINE — Low Line Output. This output pin goes LOW when VCC falls below the reset threshold voltage. This output pin returns to it's HIGH output as soon as V CC rises above the reset threshold voltage. PINOUT Pin 7 — OSC IN — External Oscillator Input. When OSC SEL is unconnected or driven HIGH, a 10µA pull-up connects from VOUT to this input pin, the internal oscillator sets the reset and watchdog timeout periods, and this input pin selects between fast and slow watchdog timeout periods. When OSC SEL is driven LOW, the reset and watchdog timeout periods may be set either by a capacitor from this input pin to ground or by an external clock at this pin (refer to Figure 21). Pin 8 — OSC SEL — Oscillator Select. When OSC SEL is unconnected or driven HIGH, the internal oscillator sets the reset delay and watchdog timeout period. When OSC SEL is driven LOW, the external oscillator input pin, OSC IN, is enabled (refer to Table 1). This input pin has a 10µA internal pull-up. Pin 9 — PFI — Power-Fail Input. This is the noninverting input to the power-fail comparator. When PFI is less than 1.25V , PFO goes low. Connect PFI to GND or V OUT w hen not used. Pin 10 — PFO — Power-Fail Output. This is the output of the power-fail comparator. PFO goes low when PFI is less than 1.25V . This is an uncommitted comparator, and has no effect on any other internal circuitry. Pin 11 — WDI — Watchdog Input. This is a three-level input pin. If WDI remains either HIGH or LOW for longer than the watchdog timeout period, WDO goes LOW and RESET is asserted for the reset timeout period. WDO remains LOW until the next transition at this input pin. Leaving this input pin unconnected disables the watchdog function. This input pin connects to an internal voltage divider between V OUT and ground, which sets it to mid-supply when left unconnected. VBATT VOUT Vcc GND BATT ON PFO PFI OSCIN RESET WDO CEIN CEOUT WDILOWLINE DIP/SO TOP VIEW Corporation RESET OSCSEL PIN ASSIGNMENTS

input pin to the chip-enable gating circuit. HIGH on the next transition at WDI. Pin 15 — RESET — Active LOW Reset Output. Figure 16. Internal Block Diagram of the SP691A/693A/800L/800M

Figure 17. Typical Application Circuit of the SP691A/693A/800L/800M toggled within a specified time.

RESET will generate 200ms pulses every 1.6s. WDO has a 2 x TTL output characteristic. period and 200ms reset timout period. period remains 200ms. Refer to Figure 20. be found in Figure 21 and Table 1. gate is enabled and passes all CE transitions. IN to CEOUT . Refer to Figure 16. 800M devices to be used with most µPs. while RESET and/or RESET are asserted. whichever occurs first. Refer to Figure 19. impedance until RESET is deasserted. currents into CEIN are <1µA over temperature. Figure 22. For minimum propagation delay, a low output-impedance driver. Table 1. Reset Pulse Width and Watchdog Timeout Selections

transmission gate is enabled. reset threshold comparator. Refer to Figure 16. threshold, LOWLINE is pulled to VOUT . is easily accessible as shown in Figure 17. input to ground if PFI is not used. applications. Refer to Figure 17.

4 CLOAD

Figure 22. Chip Enable Propagation Delay Test Circuit Figure 23. Low-Battery Indicator Circuit

via a parallel diode and a large PMOS switch. power-on transients may reach a maximum of 1A. diode are much smaller. Refer to Figure 24. the switch are each approximately 10Ω. Table 2. Input and Output Status in Battery-Backup Mode; to enter the Battery-Backup Mode, VCC must be less than the reset threshold and less than VBATT . Figure 24. VCC and VBATT to VOUT Switch

Date: 5/25/04 SP691A/693A/800L/800M Low Power Microprocessor Supervisor with Battery Switch-Over © Copyright 2004 Sipex Corporation Ø 1.65 TOP VIEW CONTACT AREA

16 PIN NSOIC

c WITH PLATING BASE METAL b DIMENSIONS Minimum/Maximum (mm) (JEDEC MS-012, AC - VARIATION) COMMON HEIGHT DIMENSION A b c L e E 1.35

9.90 BSC

0.40 0.31 0.51 SYMBOL MIN NOM MAX 0.10 - 0.25 D 1.75 1.25 0.17 0.25

6.00 BSC

3.90 BSC

1.27 BSC

1.27

1.04 REF

0.25 BSC

15º L ØØ1 Seating Plane Gauge Plane VIEW C A A2 A1 SIDE VIEW e E E/2 bBINDEX AREA (D/2 X E1/2) E1/2 D SEE VIEW C PACKAGE: 16 PIN NSOIC

Date: 5/25/04 SP691A/693A/800L/800M Low Power Microprocessor Supervisor with Battery Switch-Over © Copyright 2004 Sipex Corporation Ø 2.55 TOP VIEW

16 PIN SOIC WIDE

c WITH PLATING BASE METAL b DIMENSIONS Minimum/Maximum (mm)

16 Pin SOIC (WIDE)

(JEDEC MS-013, AA - VARIATION) COMMON HEIGHT DIMENSION A b c L e E 2.35

10.30 BSC

0.40 0.31 0.51 SYMBOL MIN NOM MAX 0.10 - 0.30 D 2.65 2.05 0.20 0.33

7.50 BSC

1.27

1.40 REF

15º L ØØ1 Seating Plane Gauge Plane VIEW C A A2 A1 SIDE VIEW e E E/2 b B INDEX AREA (D/2 X E1/2) E1/2 D SEE VIEW C 1 2 3 CONTACT AREA PACKAGE: 16 PIN WSOIC

Date: 5/25/04 SP691A/693A/800L/800M Low Power Microprocessor Supervisor with Battery Switch-Over © Copyright 2004 Sipex Corporation N 1 23 INDEX AREA eA eB E SEE LEAD DETAIL c C b - - .210 .015 - Dimensions in (mm)

16 PIN PDIP

(BB) Variation .115 .130 .195 .014 .018 .022 .045 .060 .070 .240 .250 .280 A b c E e eA eB .115 .130 .150L MIN NOM MAX b3 .030 .039 .045 D .008 .010 .014 .735 .755 .775 .005 .300 .310 .325 .100 BSC .300 BSC .430 - - 16 pin PDIP EE1 D A L b b1eb3 PACKAGE: 16 PIN PDIP

Date: 5/25/04 SP691A/693A/800L/800M Low Power Microprocessor Supervisor with Battery Switch-Over © Copyright 2004 Sipex Corporation Part Number Temperature Range Package Type Corporation ANALOG EXCELLENCE Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability aris ing out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor t he rights of others. Sipex Corporation Headquarters and Sales Office

233 South Hillview Drive

Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600

ORDERING INFORMATION

Available in lead free packaging. To order add “-L” suffix to part number. Example: SP691AEN/TR = standard; SP691AEN-L/TR = lead free /TR = Tape and Reel Pack quantity is 2500 for NSOIC and WSOIC.

Date: 5/25/04 SP691A/693A/800L/800M Low Power Microprocessor Supervisor with Battery Switch-Over © Copyright 2004 Sipex Corporation Part Number Temperature Range Package Type Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600 Available in lead free packaging. To order add “-L” suffix to part number. Example: SP800MEN/TR = standard; SP800MEN-L/TR = lead free /TR = Tape and Reel Pack quantity is 2500 for NSOIC and WSOIC.