SP6127 SIPEX | Alldatasheet
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June 26, 2007 SP6127 TSOT-6 PFET Buck Controller 2007 Sipex Corporation Page 1
FEATURES
/square6 Wide 4.5V – 29V Input Voltage Range /square6 Internal compensation /square6 Built-in High-Current PMOS Driver /square6 Adjustable Overcurrent Protection /square6 Internal soft start /square6 900kHz Constant Frequency Operation /square6 0.6V Reference Voltage /square6 1% output setpoint accuracy /square6 Lead Free, RoHS Compliant Package: Small 6-pin TSOT The SP6127 is a PWM controlled step down (buck) vol tage mode regulator with V IN feedforward and internal Type-II compensation. It operates from 4.5 V to 29V V IN , making it suitable for 5V, 12V and 24V applications. By using a PMOS driver, this device i s capable of operating at 100% duty cycle. The high - side driver is designed to drive the gate 5V below VIN . The programmable overcurrent protection is based on the high-side MOSFET’s ON resistance sensi ng and allows setting the overcurrent protection value up to 300mV threshold (measured between VIN-L X). The SP6127 is available in a space-saving 6- pin TSOT package making it the smallest controller available capable of operating from 24VDC supplies. High=Of f L1, IHLP-2525CZ 3.3uH, 30mOhm, 6A 22uF Ds MBRA340T3G 200k, 1% RZ 100k, 1% Si2343DS CZ 33pF 0.1uF 4.7uF Rs=1k D1 1N4148 SHDN 12V VIN VOUT GND GND VFB Vin GND VDR 1.8V 0-2.0A Gate LX SP6127 High-Voltage, Step-Down Controller in TSOT6 SP6127 6 5 4 1 2 3 SP6127
6 PinTSOT
June 26, 2007 SP6127 TSOT-6 PFET Buck Controller 2007 Sipex Corporation Page 2 These are stress ratings only, and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. Lead Temperature (Soldering, 10 sec)…..…………..300 °C ESD Rating…… …..….…1kV LX, 2kV all other nodes, HBM Specifications are for T AMB =T J=25 °C, and those denoted by ♦ apply over the full operating range, -40 °C< T j <125°C. Unless otherwise specified: VIN =4.5V to 29V, C IN = 4.7 µ F. PARAMETER MIN TYP MAX UNITS ♦ CONDITIONS UVLO Turn-On Threshold 4.2 4.35 4.5 V 0°C< T j <125°C UVLO Turn-Off Threshold 4.0 4.15 4.4 V 0°C< T j <125°C UVLO Hysteresis 0.2 V Operating Input Voltage Range 4.5 29 V 0°C< T j <125°C Operating Input Voltage Range 7 29 V ♦ Operating VCC Current 0.3 3 mA VFB=1.2V Reference Voltage Accuracy 0.5 1 % Reference Voltage Accuracy 0.5 2 % ♦ Reference Voltage 0.594 0.6 0.606 V Reference Voltage 0.588 0.6 0.612 V ♦ Switching Frequency 750 900 1050 kHz Peak-to-peak ramp Voltage V IN /5 V Minimum ON-Pulse Duration 40 100 ns ♦ Minimum Duty Cycle 0 % Maximum Duty Cycle 100 % Gate Driver Turn-Off Resistance 50 60 k Ω Internal resistor between GATE and VIN Gate Driver Pull-Down Resistance 4 8 Ω VIN=12V, V FB =0.5V, Measure resistance between GATE and VDR Gate Driver Pull-up Resistance 3 6 Ω VIN=12V, V FB =0.7V, Measure resistance between GATE and VIN VIN - VDR voltage difference 4.5 5.5 V ♦ Measure VIN – VDR, VIN>7V Overcurrent Threshold 270 300 330 mV Measure VIN - LX LX pin Input Current 25 30 35 uA VLX = VIN OFF interval during hiccup 70 ms Soft start time 3 5 9 ms VFB=0.58V, measure between VIN=4.5V and first GATE pulse SHDN Threshold 0.8 1.0 1.2 V ♦ Apply voltage to FB SHDN Threshold Hysteresis 100 mV ABSOLUTE MAXIMUM RATINGS
June 26, 2007 SP6127 TSOT-6 PFET Buck Controller 2007 Sipex Corporation Page 3 PIN # PIN NAME DESCRIPTION 1 VIN Input power supply for the controller. Place input decoupling capacitor as close as possible to this pin. 2 GATE Connect to the gate terminal of the external P-channel MOSFET.
3 VDR
Power supply for the internal driver. This voltage is internally regulated to about 5V below VIN. Place a 0.1 µF decoupling capacitor between VDR and VIN as close as possible to the IC. 4 FB Regulator feedback input. Connect to a resistive voltage-divider network to set the output voltage. This pin can be also used for ON/OFF control. If this pin is pulled above 1V the P-channel driver is disabled and controller resets internal soft start circuit. 5 GND Ground pin. 6 LX This pin is used as a current limit input for the internal current limit comparator. Connect to the drain pin of the external MOSFET thr ough an optional resistor. Internal threshold is pre-set to 300mV nominal and can be decreased by changing the external resistor based on the following formula: V TRSHLD = 300mV – 30uA * R FAULT Register Set Dominant POR ENBL 4-Bit counter VDR VIN GATE 5V Internal LDO VIN - 0.3V Overcurrent Comparator LX VDR 30uA GND VREF FAULT FB Oscillator VIN S R I = k x VIN Error Amplifier PWM Comparator PWM Latch Reset Dominant Vin - 5V LDO FAULT FAULT 70ms delay UVLO S R R
June 26, 2007 SP6127 TSOT-6 PFET Buck Controller 2007 Sipex Corporation Page 4 The SP6127 is a fixed frequency, Voltage-mode, non-synchronous PWM controller optimized for minimum component, small form factor and cost effectiveness. It has been designed for single- supply operation ranging from 4.5V to 29V. SP6127 has Type-II internal compensation for use with Electrolytic/Tantalum output capacitors. For ceramic capacitors Type-III compensation can be implemented by simply adding an R and C between output and Feedback. A precision 0.6V reference, present on the positive terminal of the Error Amplifier, permits programming of the output voltage down to 0.6V via the FB pin. The output of the Error Amplifier is internally compared to a feed-forward (V IN /5 peak-to-peak) ramp and generates the PWM control. Timing is governed by an internal oscillator that sets the PWM frequency at 900kHz. SP6127 contains useful protection features. Overcurrent protection is based on the high-side MOSFET’s R DS (ON ) and is programmable via a resistor placed at LX node. Under-Voltage Lock- Out (UVLO) ensures that the controller starts functioning only when sufficient voltage exists for powering IC’s internal circuitry. SP6127 Loop Compensation The SP6127 includes Type-II internal compensation components for loop compensation. External compensation components are not required for systems with tantalum or aluminum electrolytic output capacitors with sufficiently high ESR. Use the condition below as a guideline to determine whether or not the internal compensation is sufficient for your design. Type-II internal compensation is sufficient if the following condition is met: where: OUT ESR ESRZERO CRf ... 2 π= ……….. (2) OUT DBPOLE CL f .. 2 π ………… (3) Creating a Type-III compensation Network The above condition requires the ESR zero to be at a lower frequency than the double-pole from the LC filter. If this condition is not met, Type- III compensation should be used and can be accomplished by placing a series RC combination in parallel with R1 as shown below. The value of CZ can be calculated as follows and RZ selected from table 1. 125 .1 R CLCZ × Table1- Selection of RZ f ESRZERO / fDBPOLE RZ 1X 50KΩ 2X 40KΩ 3X 30KΩ 5X 10KΩ >= 10X 2KΩ
June 26, 2007 SP6127 TSOT-6 PFET Buck Controller 2007 Sipex Corporation Page 7 MOSFET Gate Drive The P-channel drive is derived through an internal regulator that generates V IN -5V. This pin (VDR) must be connected to V IN with a 0.1 µF decoupling capacitor. The gate drive circuit swings between V IN and V IN -5 and employs powerful drivers for efficient switching of the P- channel MOSFET. Power MOSFET Selection Select the Power MOSFET for Voltage rating BV DSS , On resistance R DS (ON ), and thermal resistance R THJA . BV DSS should be about twice as high as VIN in order to guard against switching transients. The recommended MOSFET voltage rating for V IN of 5V, 12V and 24V is 12V, 30V and 40V respectively. RDS (ON ) must be selected such that when operating at peak current and junction temperature, the Overcurrent threshold of the SP6127 is not exceeded. Allowing 50% for temperature coefficient of R DS (ON ) and 15% for inductor current ripple, the following expression can be used: ××≤ Iout VON RDS 15 . 15 . 1 3 . 0)( Within this constraint, selecting MOSFETs with lower R DS (ON ) will reduce conduction losses at the expense of increased switching losses. As a rule of thumb, select the highest R DS (ON ) MOSFET that meets the above criteria. Switching losses can be assumed to roughly equal to the conduction losses. A simplified expression for conduction losses is given by: ××= Vin Vout ON RDS Iout Pcond )(2 The MOSFET’s junction temperature can be estimated from: ( ) Tambient Rthja Pc T +××= 2 Schottky Rectifier selection Select the Schottky Diode for Voltage rating V Forward voltage V f, and thermal resistance RTHJA . The Voltage rating should be selected using the same guidelines outlined for MOSFET voltage selection. For a low duty cycle application such as the circuit shown on first page, the Schottky diode is conducting most of the time and its conduction losses are the largest component of losses in the converter. Conduction losses can be estimated from: −××= Vin Vout Iout Vf Pc 1 where: V F is diode forward voltage at IOUT The Schottky diode’s AC losses due to its switching capacitance are negligible. Inductor Selection Select the Inductor for inductance L and saturation current ISAT . Select an inductor with ISAT higher than the programmed overcurrent. Calculate inductance from: ( ) × ×−= Irip fVin Vout Vout Vin L 11 where: V IN is converter input voltage VOUT is converter output voltage f is switching frequency IRIP is inductor peak-to-peak current ripple (nominally set to 30% of IOUT ) Keep in mind that a higher IRIP results in a smaller inductor which has the advantages of small size, low DC equivalent resistance DCR, high saturation current ISAT and allows the use of a lower output capacitance to meet a given step load transient. A higher IRIP , however, increases the output voltage ripple and increases the current at which converter enters Discontinuous Conduction Mode. The output current at which converter enters DCM is ½ of IRIP . Note that a negative current step load that drives the converter into DCM will result in a large output voltage transient. Therefore the lowest current for a step load should be larger than ½ of IRIP .
June 26, 2007 SP6127 TSOT-6 PFET Buck Controller 2007 Sipex Corporation Page 8 Output Capacitor Selection Select the output capacitor for voltage rating, capacitance and Equivalent Series Resistance (ESR). Nominally the voltage rating is selected to be twice as large as the output voltage. Select the capacitance to satisfy the specification for output voltage overshoot/undershoot caused by current step load. A steady-state output current IOUT corresponds to inductor stored energy of ½ L IOUT 2. A sudden decrease in IOUT forces the energy surplus in L to be absorbed by COUT . This causes an overshoot in output voltage that is corrected by the reduced duty cycle of the power switch. Use the following equation to calculate COUT : −×= 22 Vout -Vos
12 IILCout
Where: L is the output inductance I2 is the step load high current I1 is the step load low current Vos is output voltage including overshoot V OUT is steady state output voltage Output voltage undershoot calculation is more complicated. Test results for SP6127 buck circuits show that undershoot is approximately equal to overshoot. Therefore the above equation provides a satisfactory method for calculating C OUT . Select ESR such that output voltage ripple (V RIP ) specification is met. There are two components to V RIP : The first component arises from charge transferred to and from C OUT during each cycle. The second component of V RIP is due to inductor ripple current flowing through the output capacitor’s ESR. It can be calculated from: ××+×= fs Cout ESR Irip Vrip Where: I RIP is inductor ripple current fs is switching frequency COUT is output capacitor calculated above Note that a smaller inductor results in a higher IRIP , therefore requiring a larger COUT and/or lower ESR in order to meet VRIP . Input Capacitor Selection Select the input capacitor for Voltage, Capacitance, ripple current, ESR and ESL. Voltage rating is nominally selected to be twice the input voltage. The RMS value of the input capacitor current, assuming a low inductor ripple current ( I RIP ), can be calculated from: ( )DDIout Icin −×= 1 In general, total input voltage ripple should be kept below 1.5% of V IN (not to exceed 180mV). Input voltage ripple has three components: ESR and ESL cause a step voltage drop upon turn on of the MOSFET. During on time, the capacitor discharges linearly as it supplies I OUT -IIN . The contribution to Input voltage ripple by each term can be calculated from: ( ) 2, Vin Cin fs Vout Vin Vout Iout Cin V ×× −××=∆ ( )Irip Iout ESR ESR V 5 . 0, −=∆ ( ) Trise Irip Iout ESL ESL V 5 . 0, −=∆ Where T RISE is the rise time of current through capacitor Total input voltage ripple is sum of the above: ESL VESR VCin VTot V ,,,, ∆+∆+∆=∆ In circuits where converter input voltage is applied via a mechanical switch, excessive ringing may be present at turn-on that may interfere with smooth startup of the SP6127. The addition of an inexpensive 100 µF Aluminum Electrolytic capacitor at the input will help reduc e ringing and restore a smooth startup.
June 26, 2007 SP6127 TSOT-6 PFET Buck Controller 2007 Sipex Corporation Page 11
June 26, 2007 SP6127 TSOT-6 PFET Buck Controller 2007 Sipex Corporation Page 12 Ordering Information: Part Number Temperature Range Package For further assistance: Email: Sipexsupport@sipex.com WWW Support page: http://www.sipex.com/content.aspx?p=support Sipex Application Notes: http://www.sipex.com/applicationNotes.aspx Sipex Corporation Headquarters and Sales Office
233 South Hillview Drive
Milpitas, CA95035 tel: (408) 934-7500 FAX: (408) 935-7600 Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Solved by TM