SP000069400

TLE6251G INFINEON | Alldatasheet

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Final Data Sheet, Rev. 3.2, Apr. 2006 TLE 6251 G High Speed CAN-Transceiver with Wake Detection Automotive Power Never stop thinking.

Published by Infineon Technologies AG, St.-Martin-Strasse 53,

81669 München, Germany

© Infineon Technologies AG 2005. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

Type Ordering Code Package TLE 6251 G SP000069400 P-DSO-14-13 High Speed CAN-Transceiver with Wake Detection TLE 6251 G P-DSO-14-13 Final Data Sheet 3 Rev. 3.2, 2006-04-05

Features

• CAN data transmission rate up to 1 Mbaud
• Compatible to ISO/DIS 11898
• Supports 12 V and 24 V automotive applications
• Low power modes with local wake-up input and remote wake-up via CAN bus
• Very low power consumption in sleep mode
• Wake-up input
• Wake-up source recognition
• Inhibit output to control an external power supply
• Diagnosis output
• RxD only mode for node failure analysis
• Split termination to stabilize the recessive level
• TxD time-out function with diagnosis
• RxD recessive clamping handler with diagnosis
• TxD to RxD short circuit handler with diagnosis
• Bus line short circuit diagnosis
• Bus dominant clamping diagnosis
• Undervoltage detection at VCC, VI/O and VBAT
• Cold start diagnosis (first battery connection)
• Adaptive to host logic supply levels (3.3 and 5 V)
• Wide common mode range for electromagnetic immunity (EMI)
• Low electromagnetic emission (EME)
• Short circuit proof to ground, battery and VCC
• Overtemperature protection
• Protected against automotive transients
• +/- 6kV ESD Robustness according to IEC 61000-4-2

Final Data Sheet 4 Rev. 3.2, 2006-04-05 TLE 6251 G

Description

The CAN-transceiver TLE 6251 G is a monolithic integrated circuit in a P-DSO-14-13 package for high speed differential mode data transmission (up to 1 Mbaud) and reception in automotive and industrial applications. It works as an interface between the CAN protocol controller and the physical bus lines compatible to ISO/DIS 11898. As a successor to the first generation of HS CAN, the TLE 6251 G is designed to provide an excellent passive behavior when the transceiver is switched off (mixed networks, clamp15/30 applications). The current consumption can be reduced, due to the low power modes.. This supports networks with partially powered down nodes. The TLE 6251 G offers two low power modes as well as a receive-only mode to support software diagnosis functions. A wake-up from the low power mode is possible via a message on the bus or via the bi-level sensitive wake input. An external voltage supply IC can be controlled by the inhibit output. So, the µC can be powered down and the TLE 6251 G still reacts to wake-up activities on the CAN bus or local wake input. A diagnosis output allows mode dependent enhanced diagnosis of bus failures and wake-up source. A VBAT fail flag reports an power-on condition at the battery supply input. The TLE 6251 G is designed to withstand the severe conditions of automotive applications and to support 12 V and 24 V applications. The IC is based on the Smart Power Technology SPT® which allows bipolar and CMOS control circuitry in accordance with DMOS power devices existing on the same monolithic circuit.

Final Data Sheet 5 Rev. 3.2, 2006-04-05 Pin Configuration Figure 1 Pin Configuration (top view) Table 1 Pin Definitions and Functions Pin No. Symbol Function 1T x D CAN transmit data input; 20 kΩ pull-up, LOW in dominant state

2 GND Ground

3 VCC 5 V supply input; block to GND with 100 nF ceramic capacitor

4R x D CAN receive data output; LOW in dominant state, push-pull output stage

5 VµC Logic voltage level adapter input; connect to pin VCC for 5 V

microcontroller, connect to additional supply voltage for other logic voltage levels, block to GND with 100 nF ceramic capacitor 6E N Mode control input 1; internal pull-down, see Figure 6 7I N H Control output; set HIGH to activate voltage regulator; open drain 8N E R R Diagnosis output 1; error and power on indication output, push-pull output stage 9W K Wake-up input; bi-level sensitive AEP03398.VSD 1TxD GND VCC RxD VµC EN INH 8 CANH CANL SPLIT WK NERR NSTB VS TLE 6251 G (P-DSO-14-13)

Final Data Sheet 6 Rev. 3.2, 2006-04-05 TLE 6251 G

10 VS Battery voltage supply input; block to GND with 100 nF ceramic

11 SPLIT Termination output; to support the recessive voltage level of the bus

lines (see Table 2)

12 CANL Low line output; LOW in dominant state

13 CANH High line output; HIGH in dominant state

14 NSTB Mode control input 2; internal pull-down, see Figure 6

Table 1 Pin Definitions and Functions (cont’d) Pin No. Symbol Function

Final Data Sheet 7 Rev. 3.2, 2006-04-05 Functional Block Diagram Figure 2 Block Diagram TLE 6251 G Output Stage Receiver Bus Failure Detection AEB03397.VSD RxD4MUX Driver Temp.- Protection timeout TxD1 Diagnosis Logic Mode Control Logic NSTB EN NERR VµC

7 INH

VµC

Final Data Sheet 8 Rev. 3.2, 2006-04-05 TLE 6251 G

Application Information

As a successor to the first generation of HS CAN, the TLE 6251 G is designed to provide an excellent passive behavior when the transceiver is switched off (mixed networks, terminal 15/30 applications). The current consumption can be reduced, due to the low power modes. This supports networks with partially powered down nodes. A wake-up from the low power modes is possible via a message on the bus or via the bi-level sensitive wake input WK. An external voltage supply IC can be controlled by the inhibit output INH. So, the µC can be powered down and the TLE 6251 G still reacts to wake-up activities on the CAN bus or local wake input activities. A diagnosis output pin NERR, allows mode dependent enhanced diagnosis of bus failures and wake-up source. A VBAT fail flag reports a power-on condition at the battery supply input. The VBAT fail flag will be resetted after the first transition into normal mode. The TLE 6251 G has four operation modes, the normal, the receive only, the standby mode and the sleep mode. These modes can be controlled with the two control pins EN and NSTB pin (see Figure 6, Table 2). Both, EN and NSTB, have an implemented pull-down, so if there is no signal applied to EN and NSTB, the transceiver automatically changes to the standby mode. Normal Mode To transfer the TLE 6251 G into the normal mode, NSTB and EN have to be switched to HIGH level. This mode is designed for the normal data transmission/reception within the HS-CAN network. Transmission The signal from the µC is applied to the TxD input of the TLE 6251 G. Now the bus driver switches the CANH/L output stages to transfer this input signal to the CAN bus lines. TxD Time-out Feature If the TxD signal is dominant for a time t > tTxD, the TxD time-out function deactivates the transmission of the signal at the bus. This is realized to prevent the bus from being blocked permanently due to an error. The transmission is released again, after a mode state change. TxD to RxD Short Circuit Feature Similar to the TxD time-out, a TxD to RxD short circuit would also drive a permanent dominant signal at the bus and so block the communication. To avoid this, the TLE 6251 G has a TxD to RxD short circuit detection.

Final Data Sheet 10 Rev. 3.2, 2006-04-05 TLE 6251 G Reception The analog CAN bus signals are converted into a digital signal at RxD via the differential input receiver. In normal mode and RxD only, the split pin is used to stabilize the recessive common mode signal. Permanent Recessive Clamping If the RxD signal is permanent recessive, although there is a message sent on the bus, the host µC of this transceiver could start a message at any time, because the bus seems to be idle. To prevent this node to disturb the communication on the bus, the TLE 6251 G offers a so called permanent RxD recessive clamping. If the RxD signal is permanent recessive, an error flag is set and the transmitter is deactivated as long as the error occurs Receive Only Mode (RxOnly Mode) In the RxOnly mode, the transmission stage is deactivated but the reception of signals via the CAN bus is still possible. This mode is implemented to support hardware and software diagnosis functions. If there is an hardware error on the transmission part of a node (e.g. bubbling idiot failure), in the RxOnly mode, the bus is no longer blocked and the µC can still receive the messages on the bus. It is also possible to make a network analysis of the interconnections between the nodes. A connection between two nodes (in a network) is checked if both nodes are in the normal mode and all others are in RxOnly mode. If a message from one node is sent to the other, this has to be acknowledged. If there is no acknowledge of the message, the connection between the two nodes has an error. The RxD pin also works as an diagnosis flag, which is described more in detail in Table 2.

Final Data Sheet 11 Rev. 3.2, 2006-04-05 Standby Mode In the standby mode, transmission and reception of signals is deactivated. This is the first step of reducing the current consumption. The internal voltage regulator control pin (INH) is still active, so all external (INH controlled) powered devices are also activated. Wake-Up The wake-up is possible via WK-pin (filtering time t > tWK) or CAN message (filtering time t > tWU) and sets the RxD/NERR pins to LOW, see Figure 4. Now the µC is able to detect this change at RxD and switch the transceiver into the normal mode. Once the wake-up flag is set (= LOW), it remains in this state, as long as the transc eiver is not transferred into the normal mode. The detection of the wake-up source is possible during the first 4 recessive to dominant edges at TxD in the normal mode. Go-to Sleep Mode The go-to sleep mode is used to have an intermediate step between the sleep mode and all other modes. This mode has to control if the sleep command (EN = 1, NSTB = 0) is activated for a minimum hold time t > thSLP. Afterwards the TLE 6251 G automatically transfers into the sleep mode. The activated features in go-to sleep mode are similar to the standby mode. Sleep Mode In the sleep mode, transmission and reception of signals is deactivated. This is the second step of reducing the current consumption. The internal voltage regulator control pin (INH) is deactivated. Transition into other Modes during Sleep Mode Transition from sleep into other modes is possible if VCC and VµC active. Selection of the modes can be done by the mode control inputs. Wake-Up The wake-up is possible via WK-pin (filtering time t > tWK) or CAN message (filtering time t > tWU) and automatically transfers the TLE 6251 G into the standby mode and sets the RxD/NERR pins to LOW, see Figure 4. Once the TLE 6251 G has been set to the standby mode, the system voltage regulator is activated by the inhibit output INH, and the µC restarts. Now the µC is able to detect this change at RxD and switch the transceiver into the normal mode. Once the wake-up flag is set (= LOW), it remains in this state, as long as the transceiver is not transferred into the normal mode. The detection of the wake-up source is possible during the first 4 recessive to dominant edges at TxD in the normal mode.

Final Data Sheet 12 Rev. 3.2, 2006-04-05 TLE 6251 G Figure 4 RxD during Sleep mode CAN_H CAN_L Vdiff INH Vcc/Vio RxD NERR NSTB/EN µC P.O.R. Normal mode tWU BUS OFF BUS WAIT WAKE PATTERN DEVICE WAKE ECU WAKE LDO RAMP UP Communication starts µC set TLE6251G to normal operation

Final Data Sheet 13 Rev. 3.2, 2006-04-05 Split Circuit The split circuitry is activated during normal and RxOnly mode and deactivated (SPLIT pin high ohmic) during sleep and standby mode. The SPLIT pin is used to stabilize the recessive common mode signal in normal mode and RxOnly mode. This is realized with a stabilized voltage of 0.5 VCC at SPLIT. Figure 5 Application example for the SPLIT Pin A correct application of the SPLIT pin is shown in Figure 5. The split termination for the left and right node is realized with two 60 Ω resistances and one 10 nF capacitor. The center node in this example is a stub node and the recommended value for the split resistances is 1.5 kΩ . Diagnosis-Flags at NERR and RxD Power-Up Flag

• Task: to signalize a power-up state at VBAT AEA03399.VSD Split Termination TLE 6251 G/DS CANH CANL SPLIT nF TLE 6251 G/DS CANH CANL SPLIT 60 Ω 60 Ω Split Termination nF SPLIT TLE 6251 G/DS CANLCANH nF 1.5 kΩ1.5 kΩ CAN Bus Split Termination at Stub 60 Ω 60 Ω

Final Data Sheet 14 Rev. 3.2, 2006-04-05 TLE 6251 G

• Indicator: NERR = LOW in RxOnly mode
• Remarks: Power-up flag is cleared when entering the normal mode Wake-Up Flag
• Task: to signalize a wake-up condition at the WK pin (filtering time t > tWK) or via CAN bus message (filtering time t > tWU)
• Indicator: RxD or NERR = LOW in sleep/stand-by mode immediately after wake-up
• Remarks: Flag is cleared on entering the RxOnly mode Wake-Up Source Flag
• Task: to distinguish between the two wake-up sources
• Indicator: NERR = LOW in normal mode = wake-up via WK pin
• Remarks: only available if the power-up flag is cleared. After four recessive to dominant edges on TxD in normal mode, the flag is cleared. Leaving the normal mode clears the wake- up source flag. Bus Failure Flag
• Task: to signalize a bus line short circuit condition to GND, VS or VCC
• Indicator: NERR = LOW in normal mode
• Remarks: flag is set after f our consecutive recessive to dominant cycles on pin TxD when trying to drive the bus dominant. The bus failure flag is cleared if the normal mode is reentered or 4 recessive to dominant edges at TxD without failure condition. Local Failure Flag
• Task: to signalize one of the five local failure conditions described in Local Failure-Flags and -Detection
• Indicator: NERR = LOW in RxOnly mode (local failure flag is set)
• Remarks: the flag is cleared when entering the normal mode from RxOnly mode or when RxD is dominant while TxD is recessive.

Final Data Sheet 15 Rev. 3.2, 2006-04-05 Local Failure-Flags and -Detection TxD Dominant Failure Detection

• Effect: permanent dominant signal for t > tTxD at TxD
• Indicator: NERR = LOW in RxOnly mode (local failure flag is set)
• Action: disabling of the transmitter stage
• Remarks: release of the transmitter stage only after transition into RxOnly mode (failure diagnosis) and transition into normal mode. RxD Permanent Recessive Clamping
• Effect: internal RxD signal does not match signal at RxD pin because the RxD pin is pulled to HIGH (permanent HIGH)
• Indicator: NERR = LOW in RxOnly mode (local failure flag is set)
• Action: disabling of the receiver stage
• Remarks: the flag is cleared by changing from RxOnly (failure diagnosis) into normal mode or RxD gets dominant. TxD to RxD Short Circuit
• Effect: short circuit between RxD and TxD
• Indicator: NERR = LOW in RxOnly mode (local failure flag is set)
• Action: disabling of the transmitter stage
• Remarks: the flag is cleared by changing from RxOnly (failure diagnosis) into normal mode. Bus Dominant Clamping
• Effect: permanent dominant signal at the CAN bus for t > tBUS
• Indicator: NERR = LOW in RxOnly mode (local failure flag is set)
• Action: none
• Remarks: none Overtemperature Detection
• Effect: junction temperature at the driving stages exceeded
• Indicator: NERR = LOW in RxOnly mode (local failure flag is set)
• Action: disabling of the transmitter stage
• Remarks: the flag is cleared by changing from RxOnly (failure diagnosis) into normal mode or RxD gets dominant. Bus only released after the next dominant bit in TxD.

Final Data Sheet 16 Rev. 3.2, 2006-04-05 TLE 6251 G Other Features VµC-level Adapter The advantage of the adaptive µC logic is the ratiometrical scaling of the I/O levels depending on the input voltage at the VµC pin. So it can be ensured that the I/O voltage of the µC fits to the internal logic levels of the TLE 6251 G. WAKE Input The wake-up input pin is a bi-level sensitive in put. This means that both transitions, HIGH to LOW and LOW to HIGH, result in a wake-up. VCC, VµC Undervoltage Detection If an undervoltage condition at VCC, VµC is detected for longer than t = tUV,t, the TLE 6251 G automatically transfers into the sleep mode and the undervoltage flag is set. This flag is an internal flag and not available via NERR or RxD. The flag is cleared again, after setting the power on or wake flag (power-up or wake-up). VS Undervoltage Detection If an undervoltage condition at VS is detected, the TLE 6251 G immediately transfers into the standby mode and the undervoltage flag is set. This flag is an internal flag and not available via NERR or RxD. The flag is cleared again, after the supply voltage VS has reached the nominal value.

Final Data Sheet 17 Rev. 3.2, 2006-04-05 Figure 6 Mode State Diagram AEA03400.VSD EN NSTB IHH 1 1 High Normal Mode Undervoltage at VCC /VµC for t > tUV,t EN NSTB INH 0 0 High Stand-By Undervoltage at VS t < thSLP t > thSLP Wake-Up: t > tWK t > tWU EN NSTB IHN 0 0 Float. Sleep Start Up Power UpPower Down EN NSTB INH 0 1 High Receive-OnlyGo to Sleep NSTBEN

Final Data Sheet 18 Rev. 3.2, 2006-04-05 TLE 6251 G Table 2 Truth Table NSTB EN INH Mode Event NERR RxD SPLIT 1 1 HIGH NORMAL No CAN bus failure 1) 1 LOW: bus dominant, HIGH: bus recessive ON CAN bus failure1) 0 CANH/CANL driver off2) 1 Wake-up via CAN bus/no wake-up request detected Wake-up via pin WK3) 0 1 0 HIGH RECEIVE ONLY No VBAT fail detected4) 1 LOW: bus dominant, HIGH: bus recessive ON VBAT fail detected4) 0 No TxD time-out, overtemperature, RxD recessive clamping or bus dominant time out detected TxD time-out, overtemperature, RxD recessive clamping or bus dominant time out detected 0 0 HIGH STAND BY Wake-up request detected6) 00 O F F No Wake up request detected6)

01 H I G H 7) GO TO

Wake-up request detected6) 00 O F F No wake-up request detected6) 0 0 floating SLEEP 8) Wake-up request detected6) 00 O F F No wake-up request detected6) 1) Only valid AFTER at least four recessive to dominant edges at TxD after entering the normal mode. 2) Due to an thermal overtemperature shutdown or TxD time-out. 3) Only valid BEFORE four recessive to dominant edges at TxD after entering the normal mode. 4) Power on situation, valid if VCC and VµC is active and transition from sleep, stand-by or goto sleep command. 5) Transition from normal mode. 6) Only valid if VCC and VµC are active. 7) If this mode is selected for a time longer than the hold time of the go-to sleep command ( t > thSLP), INH is floating.

Final Data Sheet 19 Rev. 3.2, 2006-04-05 8) Transition into the sleep mode only if go-to sleep command was selected for a time longer than the hold time of the go- to sleep command (t > thSLP).

Final Data Sheet 20 Rev. 3.2, 2006-04-05 TLE 6251 G Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. Table 3 Absolute Maximum Ratings Parameter Symbol Limit Values Unit Remarks Min. Max. Voltages Supply voltage VS -0.3 40 V – 5 V supply voltage VCC -0.3 5.5 V – Logic supply voltage VµC -0.3 5.5 V – CAN bus voltage (CANH, CANL) VCANH/L -27 40 V – Differential voltage CANH, CANL, SPLIT, WK VdiffESD -40 40 V CANH - CANL < |40 V|; CANH - SPLIT < |40 V| CANL - SPLIT < |40 V|; CANL - WK < |40 V|; CANH - WK < |40 V|; Split - WK < |40 V| VSPLIT input voltage VSPLIT -27 40 V – Input voltage at WK VWK -27 40 V – Input voltage at INH VINH -0.3 VS + 0.3 V– Logic voltages at EN, NSTB, NERR, TxD, RxD VI -0.3 VµC V0 V < VµC < 5.5 V Electrostatic discharge voltage at SPLIT VESD -1 1 kV human body model (100 pF via 1.5 kΩ ) Electrostatic discharge voltage at CANH, CANL, WK vs. GND VESD -6 6 kV human body model (100 pF via 1.5 kΩ ) Electrostatic discharge voltage for all pin except SPLIT VESD -2 2 kV human body model (100 pF via 1.5 kΩ ) Electrostatic discharge voltage at CANH, CANL vs. GND VESD -6 6 kV According to IEC61000-4-2 (150 pF via 330Ω ) See Figure 101) Temperatures Storage temperature Tj -40 150 °C– 1) application circuits with and without terminated SPLIT pin

Final Data Sheet 21 Rev. 3.2, 2006-04-05 Table 4 Operating Range Parameter Symbol Limit Values Unit Remarks Min. Max. Supply voltage VS 54 0 V – 5 V supply voltage VCC 4.75 5.25 V – Logic supply voltage VµC 3.0 5.25 V – Junction temperature Tj -40 150 °C– Thermal Resistances Junction ambient Rthj-a –1 2 0 K / W 1) Thermal Shutdown (junction temperature) Thermal shutdown temp. TjSD 150 190 °C– Thermal shutdown hyst. ∆T –1 0 K – 1) Calculation of the junction temperature Tj = Tamb + P × Rthj-a

Final Data Sheet 22 Rev. 3.2, 2006-04-05 TLE 6251 G Table 5 Electrical Characteristics °C < Tj < 150 °C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Parameter Symbol Limit Values Unit Test Condition Min. Typ. Max. Current Consumption Current consumption normal mode ICC+µC – 6 10 mA recessive state; TxD = high ICC+µC – 50 80 mA dominant state; TxD = low Current consumption RxD Only mode ICC+µC – 6 10 mA receive only mode Current consumption stand-by mode IVS –2 5 5 0 µA stand-by mode; VS = WK = 12 V ICC+µC –2 5 6 0 µA stand-by mode; VS = WK = 12 V VCC = VµC = 5V Current consumption sleep mode IVS –2 5 3 5 µAs l e e p m o d e , VS = 12 V, Tj < 85 °C, VCC = VµC = 0 V ICC+µC –2 . 5 1 0 µAs l e e p m o d e , VS = 12 V, Tj < 85 °C, VCC = VµC = 5V Supply Resets VCC undervoltage detection VCC,UV 234V – VµC undervoltage detection VµC,UV 0.4 1.2 1.8 V – VS power ON detection level VS,Pon 245V – VS power OFF detection level VS,Poff 23 . 5 5V – Receiver Output RxD HIGH level output current IRD,H –- 4 - 2 m A VRD = 0.8 × VµC LOW level output current IRD,L 24–m A VRD = 0.2 × VµC Short circuit current ISC,RxD –7 0 8 4 m A VµC = 5.25 V, RxD = LOW

Final Data Sheet 23 Rev. 3.2, 2006-04-05 Short circuit current ISC,RxD –3 5 4 5 m A VµC = 3.3 V, RxD = LOW Table 5 Electrical Characteristics (cont’d) °C < Tj < 150 °C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Parameter Symbol Limit Values Unit Test Condition Min. Typ. Max.

Final Data Sheet 24 Rev. 3.2, 2006-04-05 TLE 6251 G Transmission Input TxD HIGH level input voltage threshold VTD,H –0 . 5 2 × VµC 0.7 × VµC V recessive state LOW level input voltage threshold VTD,L 0.30 × VµC 0.48 × VµC – V dominant state TxD input hysteresis VTD,hys 100 400 1000 mV Not subject to production test Specified by design. HIGH level input current ITD -5 0 5 µA VTxD = VµC TxD pull-up resistance RTD 10 20 40 k Ω – Mode Control Inputs EN, NSTB HIGH level input voltage threshold VM,H –0 . 5 2 × VµC 0.7 × VµC V – LOW level input voltage threshold VM,L 0.30 × VµC 0.48 × VµC –V – Input hysteresis VM,hys 100 400 1000 mV Not subject to production test Specified by design. LOW level input current IMD -5 0 5 µA VEN /VNSTB = 0V Pull-down resistance RM 10 20 40 k Ω – Diagnostic Output NERR HIGH level output voltage VNERR,H 0.8 × VµC ––V INERR = -100 µA LOW level output voltage VNERR,L ––0 . 2 × VµC V INERR = 1.25 mA Short circuit current ISC,NERR –2 0 4 8 m A VµC = 5.25 V Short circuit current ISC,NERR –1 3 2 5 m A VµC = 3.3 V Table 5 Electrical Characteristics (cont’d) °C < Tj < 150 °C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Parameter Symbol Limit Values Unit Test Condition Min. Typ. Max.

Final Data Sheet 25 Rev. 3.2, 2006-04-05 Termination Output SPLIT Split output voltage VSPLIT 0.3 × VCC 0.5 × VCC 0.7 × VCC Vn o r m a l m o d e ; -500 µA < ISPLIT < 500 µA VSPLIT 0.45 × VCC 0.5 × VCC 0.55 × VCC Vn o r m a l m o d e ; no load Leakage current ISPLIT -5 0 5 µAs l e e p m o d e VCC = VµC = 0 V Output resistance RSPLIT –6 0 0 – Ω – Wake Input WK Wake-up threshold voltage VWK,th VS - 4 VS - 2.5 VS - 2 V VNSTB = 0 V HIGH level input current IWKH –51 0 µA VWK = VWK,th + 1 LOW level current IWKL -10 -5 – µA VWK = VWK,th - 1 Inhibit Output INH HIGH level voltage drop ∆VH = VS - VINH ∆VH –0 . 4 0 . 8 V IINH = -1 mA Leakage current IINH,lk ––5 µAs l e e p m o d e ; VINH = 0 V Bus Transmitter CANL/CANH recessive output voltage VCANL/H 2.0 – 3.0 V no load CANH, CANL recessive output voltage difference Vdiff -500 – 50 mV VTxD = VµC; no load CANL dominant output voltage VCANL 0.5 – 2.25 V VTxD = 0 V; CANH dominant output voltage VCANH 2.75 – 4.5 V VTxD = 0 V CANH, CANL dominant output voltage difference Vdiff 1.5 – 3.0 V VTxD = 0 V Table 5 Electrical Characteristics (cont’d) °C < Tj < 150 °C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Parameter Symbol Limit Values Unit Test Condition Min. Typ. Max.

Final Data Sheet 26 Rev. 3.2, 2006-04-05 TLE 6251 G CANL short circuit current ICANLsc 50 80 200 mA VCANLshort = 18 V CANH short circuit current ICANHsc -200 -80 -50 mA VCANHshort = 0 V Leakage current ICANHL,lk -5 0 5 µA VS = VµC = VCC = 0V ;

0 V <

VCANH,L < 5 V Bus Receiver Differential receiver threshold voltage, normal mode Vdiff,rdN –0 . 8 0 . 9 V s e e C M R Vdiff,drN 0.5 0.6 – V see CMR Differential receiver threshold, low power mode Vdiff,rdLP 0.9 1.15 V recessive to dominant Vdiff,drLP 0.4 0.8 V dominant to recessive Common Mode Range CMR -12 – 12 V VCC = 5 V Differential receiver hysteresis Vdiff,hys –2 0 0 –m V – CANH, CANL input resistance Ri 10 20 30 k Ω recessive state Differential input resistance Rdiff 20 40 60 k Ω recessive state Dynamic CAN-Transceiver Characteristics Min. hold time go to sleep command thSLP 82 5 5 0 µs– Min. wake-up time on pin WK tWK 51 0 2 0 µs– Min. dominant time for bus wake-up tWU 0.75 3 5 µs– Propagation delay TxD-to-RxD LOW (recessive to dominant) td(L),TR – 150 255 ns CL = 47 pF; RL = 60 Ω ; VCC = VµC = 5 V; CRxD = 15 pF Table 5 Electrical Characteristics (cont’d) °C < Tj < 150 °C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Parameter Symbol Limit Values Unit Test Condition Min. Typ. Max.

Final Data Sheet 27 Rev. 3.2, 2006-04-05 Propagation delay TxD-to-RxD HIGH (dominant to recessive) td(H),TR – 150 255 ns CL = 47 pF; RL = 60 Ω ; VCC = VµC = 5 V; CRxD = 15 pF Propagation delay TxD LOW to bus dominant td(L),T – 50 105 ns CL = 47 pF; RL = 60 Ω ; VCC = VµC = 5 V Propagation delay TxD HIGH to bus recessive td(H),T – 50 105 ns CL = 47 pF; RL = 60 Ω ; VCC = VµC = 5 V Propagation delay bus dominant to RxD LOW td(L),R – 50 150 ns CL = 47 pF; RL = 60 Ω ; VCC = VµC = 5 V; CRxD = 15 pF Propagation delay bus recessive to RxD HIGH td(H),R – 100 150 ns CL = 47 pF; RL = 60 Ω ; VCC = VµC = 5 V; CRxD = 15 pF TxD permanent dominant disable time tTxD 0.3 0.6 1.0 ms – Bus permanent time-out tBus,t 0.3 0.6 1.0 ms – VCC, VµC undervoltage filter time tUV,t 50 80 120 ms – Table 5 Electrical Characteristics (cont’d) °C < Tj < 150 °C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Parameter Symbol Limit Values Unit Test Condition Min. Typ. Max.

Final Data Sheet 28 Rev. 3.2, 2006-04-05 TLE 6251 G Diagrams Figure 7 Test Circuit for Dynamic Characteristics Figure 8 Timing Diagrams for Dynamic Characteristics AEA03401.VSD GND 9 WK CANH 60 Ω47 pF 15 pF VµC NSTB EN TxD RxD 3VCC 100 nF 100 nF = 5 V = 3...5 V VS 100 nF

12 CANL

td(L),R t VDIFF td(L),TR td(H),R td(H),TR td(L),T t GND VTxD VµC td(H),T VDIFF(d) VDIFF(r) AET03402.VSD t GND 0.2 x VµC 0.8 x VµC VRxD VµC

Final Data Sheet 29 Rev. 3.2, 2006-04-05 Application Figure 9 Application Circuit Example ECU ECU AEA03396.VSD µP with On Chip CAN Module e.g. C164C C167C GND TLE 6251 G WK9 GND 100 nF 100 nF 100 nF 10 kΩ CANH13 51 µH CANL12 VS SPLIT11 INH7 100 nF e.g. TLE 4476 (3.3/5 V) or TLE 4471 TLE 4276 TLE 4271 GND VS EN NSTB NERR 4RxD TxD 5VµC 3VCC VQ2 INH VI1 + 22 µF + 22 µF 5 V 100 nF +22 µF VQ1 STB RxD 4 TxD 3VCC TLE 6251 GS GND CANH7 51 µH CANL6 SPLIT5 e. g. TLE 4270 VQVI GND µP with On Chip CAN Module e.g. C164C C167C GND100 nF 100 nF + 22 µF 5 V 100 nF +22 µF 60 Ω CAN Bus 60 Ω VBat 4.7 nF 1) 60 Ω 60 Ω 4.7 nF 1) 1) Optional, according to the car manufacturer requirements

Final Data Sheet 30 Rev. 3.2, 2006-04-05 TLE 6251 G Figure 10 ESD test for conformance to IEC 61000-4-2 The 100nF decoupling capacitors on Vs, Vio and Vcc are situated 5mm from the pins. The distance between the fixpoint where the Gun is applied and the pin CAN_H and CAN_L are 20mm. The test has been realized with NoiseKen ESS2000. ESD TESTING.VSD TLE 6251 G CANH CANL SPLIT 60 Ω 60 Ω22 nF Case 2 100nF Vs 100nF Vcc 100nF Vio TLE 6251 G CANH CANL SPLIT 30 Ω 30 Ω Case 3 100nF Vs 100nF Vcc 100nF Vio TLE 6251 G CANH CANL SPLIT Case 4 100nF Vs 100nF Vcc 100nF Vio TLE 6251 G CANH CANL SPLIT 30 Ω 30 Ω47 nF Case 1 100nF Vs 100nF Vcc 100nF Vio

Final Data Sheet 31 Rev. 3.2, 2006-04-05 Package Outlines Figure 11 P-DSO-14-13 (Plastic Dual Small Outline) ±0.2 Does not include plastic or metal protrusion of 0.25 max. per side Index Marking -0.06 1.27 +0.080.41 +0.05 -0.118.69 B 0.254 BM 0.1 0.25 (1.47) -0.15 C 14xC 6 1.75 MAX. +0.05 1) -0.13 -0.23 14x 0.254 +0.250.64 AM 0.2 +0.05 A -0.01 0.33 x 45˚ MAX. GPS09330 You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mmSMD = Surface Mounted Device