SMS8198 SUMMIT | Alldatasheet
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SUMMIT MICROELECTRONICS, Inc. • 300 Orchard City Drive, Suite 131 Campbell, CA 95008 Telephone 408-378-6461 Fax 408-378-6586 www.summitmicro.com Characteristics subject to change without notice© SUMMIT MICROELECTRONICS, Inc. 2000 2036 5.0 4/18/00 SUMMIT MICROELECTRONICS , Inc. SMS8198
FEATURES
- Designed to operate with the Philips TriMedia Processor Coordinating the System Reset Function and Providing the Processor’s Configuration Memory Multiple VTRIP Thresholds - No External Components Required Guaranteed Reset Assertion to VCC -1V Reset is an I/O - Allows System Reset Clean up - Provides a De-bounced Manual Reset Func- tion Industry Standard 2-wire Serial Interface Hardware Write Lockout Function High Reliability - Endurance: 100,000 write cycles - Data Retention: 100 Years Philips TriMedia™ Processor Companion Supervisor With a 16K-bit 2-wire Serial Memory OVERVIEW The SMS8198 is a precision supervisory circuit designed specifically as a companion chip for the Philips TriMedia Processor family. The SMS8198 monitors the power supply and holds the system in reset whenever V CC is below the VTRIP threshold. In addition to the supervisory function, the SMS8198 has 16K-bits of nonvolatile memory that is used by the TriMedia processor as the boot memory. The SMS8198 provides 16K-bits of memory that is acces- sible through the industry standard 2-wire serial interface. By integrating a precision supervisory circuit and the hardware WP input, the SMS8198 becomes the perfect companion chip for the Philips TriMedia processor family. Its functions are integral to the boot hardware operation of the TriMedia processors. BLOCK DIAGRAM GND VCC TRI_RESET#2 VTRIP RESET CONTROL WP7 1.26V SCL 6 SDA 5 2036 T BD 2.0 WRITE CONTROL NONVOLATILE MEMORY ARRAY PROGRAMMABLE RESET PULSE GENERATOR
Figure 1. Typical Implementation of the SMS8198 and TriMedia Processor from the SMS8198 is guaranteed to be valid at VCC -1.0V. TRI_RESET# is active the memory will be write protected. system ID and Subsystem Vendor ID.
Figure 2. Reset Output Timing
2036 5.0 4/18/00 TRI_RESET# - is an active low open drain output. It is driven low whenever VCC is below VTRIP. TRI_RESET# is also an input and can be used to debounce a switch input or perform signal conditioning. The TRI_RESET# pin does have an internal pull-up and should be left uncon- nected if the signal is not used in the system. However, when the pin is tied to a system TRI_RESET# line an external pull-up resistor should be employed. Write Protect (WP) - All write operations can be disabled by maintaining WP > VIH. No Connects (NC) - The no connect inputs are unused by the SMS8198; however, to insure proper operation they can be unconnected or tied to ground. They must not be tied to VCC . ENDURANCE AND DATA RETENTION The SMS8198 is designed for applications requiring up to 100,000 erase/write cycles and unlimited read cycles. It provides 100 years of secure data retention, with or without power applied, after the execution of 100,000 erase/write cycles. RESET CONTROLLER DESCRIPTION The device provides a precise reset output to a microcontroller and it’s associated circuitry ensuring cor- rect system operation during power-up/down conditions and brownout situations. The output is open drain, allow- ing control of the reset function by multiple devices. During power-up the reset output remains in a fixed active state until V CC passes through the reset threshold and remains above the threshold for tPURST . The reset output is valid whenever VCC is equal to or greater than 1V. If VCC falls below the threshold for more than tGLITCH the device will immediately generate a reset and drive the output. The reset pin is an I/O; therefore, forcing the pin to the active state can also manually reset the device. Because the I/O needs to be an open drain, the internal timer can only be triggered by the leading edge of the input. The resulting reset output will either be t PURST , or the externally applied reset signal, whichever is longer. This can provide an affective debounce or reset signal extender solution. PIN DESCRIPTIONS Serial Clock (SCL) - The SCL input is used to clock data into and out of the device. In the WRITE mode, data must remain stable while SCL is HIGH. In the READ mode, data is clocked out on the falling edge of SCL. Serial Data (SDA) - The SDA pin is a bidirectional pin used to transfer data into and out of the device. Data may change only when SCL is LOW, except START and STOP conditions. It is an open-drain output and may be wire- ORed with any number of open-drain or open-collector outputs. PIN NAMES SDA Serial Data I/O SCL Serial Clock Input TRI_RESET# Reset Output GND Ground VCC Supply Voltage WP Write Protect NC No Connect PIN CONFIGURATIONS NC TRI_RESET# NC GND VCC WP SCL SDA 8-Pin SOIC 2036 T PCon 2.0
Figure 6. Page/Byte WRITE Mode address, ACKnowledge and data transfer sequence. SMS8198 will respond with an ACKnowledge. all inputs are disabled during the internal write cycle.
Figure 9. Random Address Byte Read Mode WRITE) followed by the address of the word it is to read. SMS8198 to the desired address. the address, acknowledge and data transfer sequence.
ACKnowledge, and issues a STOP conditions. address, acknowledge and data transfer sequence. Figure 10. Sequential READ Operation (starting with a Random Address READ)
2036 5.0 4/18/00 SMS8198 ABSOLUTE MAXIMUM RATINGS NOTE: These are STRESS ratings only. Appropriate conditions for operating these devices are given elsewhere in this specification. Stresses beyond those listed here may permanently damage the part. Prolonged exposure to maximum ratings may affect device reliability. DC ELECTRICAL CHARACTERISTICS SMS8198, TA = -40°C to +85°C, VCC = 2.7V to 5.5V Symbol Parameter Conditions Min Max Units SCL = CMOS Levels @ 100KHz V CC =5.5V 3 mA ICC Supply Current (CMOS) SDA = Open All other inputs = GND or VCC VCC =3.3V 2 mA ISB Standby Current (CMOS) SCL = SDA = V CC VCC =5.5V 50 µA All other inputs = GND ILI Input Leakage V IN = 0 To VCC 10 µA ILO Output Leakage V OUT = 0 To VCC 10 µA VIL Input Low Voltage S0, S1, S2, SCL, SDA, RESET 0.3xV CC V VIH Input High Voltage S0, S1, S2, SCL, SDA 0.7xV CC V VOL Output Low Voltage I OL = 3mA 0.4 V VROL RESET Low Output V CC = 1.0V, IOL = 100µA 0.3 V VCC = 2.7V, IOL = 400µA 0.3 V VCC = 4.5V, IOL = 1mA 0.4 V VCC =3.3V 25 µA 2036 PGM T1.1 lobmySr etemaraPs noitidnoC V5.4otV7.2V 5.5otV5.4 stinU .niM. xaM. niM. xaM f LCS ycneuqerfkcolcLCS0 0 010 04z Hk t WOL doirepwolkcolC7 .43 .1s µ t HGIH doirephgihkcolC0 .46 .0s µ t FUB emiteerfsuBn oissimsnartwenerofeB7 .43 .1s µ t ATS:US emitputesnoitidnoctratS7 .46 .0s µ t ATS:DH emitdlohnoitidnoctratS0 .46 .0s µ t OTS:US emitputesnoitidnocpotS7 .46 .0s µ tAA tuptuootkcolCd ilavtuOataDADSotwolLCS3 .05 .32 .09 .0s µ tHD emitdlohtuOataDe gnahctuOataDADSotwolLCS3 .02 .0s µ tR emitesirADSdnaLCS 13 .0s µ tF emitllafADSdnaLCS 3.03 .0s µ t TAD:US emitputesnIataD0 520 01s n t TAD:DH emitdlohnIataD0 0 s n tI LCS@htdiwekipsesioN stupniADS& tnatsnocemitnoiserppusesioN0 010 01s n t RW emitelcycetirW 010 1s m AC ELECTRICAL CHARACTERISTICS SMS8198, TA = -40°C to +85°C, VCC = 2.7V to 5.5V
Figure 11. Bus Timing
2036 5.0 4/18/00 SMS8198
ORDERING INFORMATION
A or Blank = 4.5V B = 4.75V 2.7 = 2.7V SMS8198 S A Base Part Number Package S = 8 Lead SOIC 2036 Tree 2.0
2036 5.0 4/18/00 NOTICE SUMMIT Microelectronics, Inc. reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. SUMMIT Microelectronics, Inc. assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained herein reflect representative operating parameters, and may vary depending upon a user’s specific application. While the information in this publication has been carefully checked, SUMMIT Microelectronics, Inc. shall not be liable for any damages arising as a result of any error or omission. SUMMIT Microelectronics, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless SUMMIT Microelectronics, Inc. receives written assurances, to its satisfaction, that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; and (c) potential liability of SUMMIT Microelectronics, Inc. is adequately protected under the circumstances. I 2C is a trademark of Philips Corporation. © Copyright 2000 SUMMIT Microelectronics, Inc. .228 (5.80) .035 (.90) .020 (.50) .010 (.25) x45° .0192 (.49) .0138 (.35) .061 (1.75) .053 (1.35) .0098 (.25) .004 (.127) .05 (1.27) TYP. .275 (6.99) TYP. .030 (.762) TYP.
8 Places
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