SMS44 SUMMIT | Alldatasheet

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Characteristics subject to change without notice 2047 2.3 10/23/00 EOL 12/16/05 SMS44SUMMIT MICROELECTRONICS, Inc. ©SUMMIT MICROELECTRONICS, Inc., 2000 • 300 Orchard City Dr., Suite 131  Campbell, CA 95008  Phone 408-378-6461  FAX 408-378-6586  www.summitmicro.com NOTE: THIS PRODUCT HAS REACHED END OF LIFE !!!!! Operational from any of four Voltage Monitoring Inputs !!!!! Programmability allows monitoring any voltage between 0.9V and 6.0V with NO external components !!!!! Programmable Watchdog Timer !!!!! Programmable Longdog™ Timer !!!!! Programmable Reset Pulse Width !!!!! Programmable Power-up sequencing !!!!! Programmable Nonvolatile Combinatorial Logic for generation of reset and interrupt outputs !!!!! Fault Status Register Highly Programmble Voltage Supervisory Circuit FUNCTIONAL BLOCK DIAGRAM FEATURES INTRODUCTION The SMS44 is a highly programmable voltage supervisory circuit designed specifically for advanced systems need- ing to monitor multiple voltages. The SMS44 can monitor four separate voltages without the need of any external voltage divider circuitry The SMS44 watchdog timer has a user programmable timeout period and it can be placed in an idle mode for system initialization or system debug. All of the functions are user accessible through an industry standard 2-wire serial interface. 2047 BD 1.0 –REF NV DAC –REF NV DAC –REF NV DAC –REF NV DAC RESET IRQ RESET IRQ RESET IRQ V0 16 V1 2 V2 3 V3 14 MR# 1 PROGRAMMABLE WATCHDOG TIMER PROGRAMMABLE LONGDOG TIMER PROGRAMMABLE RESET PULSE GENERATOR SERIAL BUS CONTROL LOGIC 4K-BIT NV MEMORY RESET# PUP#1 SDA IRQ# WLDI PUP#2 PUP#313 SCL A27 6 A1 CONFIGURATION REGISTER CONFIGURATION REGISTER GND RESET IRQ PROGRAMMABLE POWER SEQUENCING

2047 2.3 10/23/00 SUMMIT MICROELECTRONICS, Inc. PIN CONFIGURATION PIN NAMES MR# PUP#1 PUP#2 GND V WLDI PUP#3 IRQ# RESET# SCL SDA 16-Pin SOIC or 16-Pin SSOP 2047 T PCon 2.0 niPe maNn oitcnuF 1# RMt upniteserlaunaM 2V 1 tupnirotinomdnaylppusegatloV 3V 2 tupnirotinomdnaylppusegatloV 41 #PUPt uptuodettimreppurewoP 52 #PUPt uptuodettimreppurewoP

61 At upnisserddA

72 At upnisserddA

11# TESERt uoteseR 21# QRIt uotpurretnI 313 #PUPt uptuodettimreppurewoP 41V 3 tupnirotinomdnaylppusegatloV 51I DLW remitgodgnol/godhctaW tpurretni 61V 0 tupnirotinomdnaylppusegatloV 2047 Pins Table 2.0

2047 2.3 10/23/00 SMS44 SUMMIT MICROELECTRONICS, Inc. *COMMENT Stresses beyond the listed Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. Terminal Voltage with Respect to GND: V DC OPERATING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS* (Over Recommended Operating Conditions; Voltages are relative to GND) 2047 Elect TableA 2.1 lobmySr etemaraPs etoN. niM. pyT. xaMt inU V CC egatlovylppusgnitarepO -tuoteserdilavaotsrefer.nimV1 detareneggniebtup 0.15 .5V ta:snoitarepoetirw/daeryromeM taebtsumstupniVehtfoenotsael Vevobaro CC .nim 7.25 .5V ICC tnerrucylppuS CCV<V6.3 ≤ V5.55 20 5A µ V6.3 ≥ CCV5 20 5A µ yromemroretsigernoitarugifnoC ssecca 2A m V HTP egnaR dlohserhtelbammargorP egnar VegnaregatlovdlohserhtteseR 0 ot V3 )stnemercniVm02( 9.00 .6V V HTP dlohserhtelbammargorP0 1– V HTP 01V m V TSYH V TSR siseretsyh 05V m V LO tuptuoegatlovwol#TESER I KNIS V,Am2.1= CC V= TSR .nim3 .0V I KNIS V,Am2.1= CC ≥ V7.23 .0V tuptuoegatlovwol#QRI I KNIS V,Am2.1= CC V= TSR .nim3 .0V I KNIS V,Aµ002= CC V2.1=3 .0V t OTRP eslupteserelbammargorP htdiw 1OTR0 OTR 00 0 25 20 3 cesm 01 5 30 55 6 105 60 015 31 110 310 020 72 t TSRD yaled#TESERotniVe virdrevoVm0010 2s µ

2047 2.3 10/23/00 SUMMIT MICROELECTRONICS, Inc. 2047 Elect TableB 2.0 lobmySr etemaraPs etoN. niM. pyT. xaMt inU t OTDWP godhctawelbammargorP doirepremit 2DW1 DW0 DW 00 0 F FO 01 1 0 820 040 25 sm 1000 650 080 401 101 0 2110 0610 802 11 00 4220 0230 614 11 10 8440 0460 238 t OTDLP godgnolelbammargorP doirepremit 1DL0 DL

00 F FO

t YLDP X morfyaledelbammargorP V HTP tuo#PUPot 1-X#PUP0 -X#PUP I RM tnerrucpullup#RM 001A µ T RM htdiwesluptupni#RM0 5s n T TSRRMD otwol#RMmorfyaleD wol#TESER 001s n V LI dlohserhttupni#RM 6.0V V HI 7.0 × V CC V

SUMMIT MICROELECTRONICS, Inc. Table 1. Configuration Register 4 the four pins is at or above 1V. the primary supply and is the first to become active. 0, V1, V2 and V3 respectively. 0.02V)]. All four registers are configured as 8-bit registers. over-voltage condition, but not both conditions. (programmable reset time out) after MR# returns high. only, and their state indicates the sources of interrupts. Table 2. Configuration Register 5 Table 3. Configuration Register 5

2047 2.3 10/23/00 SUMMIT MICROELECTRONICS, Inc. Table 7. PUP Delays transition on WLDI and they both start simultaneously. Longdog timers and the WLDI input. reset (Longdog) output will be active. Table 4. Configuration Register 6 When the Longdog times out, a reset will be generated. it can drive the output low. timeout period (tPRTO ) and to select the sequence option. 0 is above its programmed threshold. states of its Bit 1 and Bit 0 as indicated in Table 7. of the programmable power-on sequencing. Table 5. Configuration Register 6 Table 6. Configuration Register 7

SUMMIT MICROELECTRONICS, Inc. Figure 5. VX Input and PUP# Sequence

2047 2.3 10/23/00 SUMMIT MICROELECTRONICS, Inc. a similar tPDLY X delay for V1 to PUP#2 and V2 to PUP#3. They are programmed in register 7. See Figure 5. Figure 7. Sequence Flow Chart

SUMMIT MICROELECTRONICS, Inc. Table 8. Memory Operating Characteristics since it never initiates any data transfers. Figure 8. Memory Operating Characteristics will be interpreted as start or stop condition.

SUMMIT MICROELECTRONICS, Inc. The high order bits of the address byte remain constant. Figure 10. Read and Write Operations

2047 2.3 10/23/00 SUMMIT MICROELECTRONICS, Inc. sequence of operations for polling. Figure 11. Write Flow Chart discontinues data transmission. and reverts to its standby power mode. matically incremented with each ACKnowledge signal.

2047 2.3 10/23/00 SMS44 SUMMIT MICROELECTRONICS, Inc. 0.014 - 0.019 (0.356 - 0.482) 0.004 - 0.012 (0.102 - 0.305) 0.037 - 0.045 (0.940 - 1.143 0.093 - 0.104 (2.362 - 2.642) 0.016 - 0.050 (0.406 - 1.270) 0.050 (1.270) 0.009 - 0.013 (0.229 - 0.330) 0.010 - 0.029 (0.254 - 0.737) 0.291 - 0.299 (7.391 - 7.595)

16 Pin SOIC T

0º to 8º typ x45 0.398 - 0.412 (10.109 - 12.465) 0.394 - 0.419 (10.007 - 10.643) PACKAGES

16 PIN SOIC PACKAGE

ORDERING INFORMATION

G = SSOP S = SOIC 2047 Tree 1.0

2047 2.3 10/23/00 EOL 12/16/05 SUMMIT MICROELECTRONICS, Inc. NOTICE SUMMIT Microelectronics, Inc. reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. SUMMIT Microelectronics, Inc. assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained herein reflect representative operating parameters, and may vary depending upon a user’s specific application. While the information in this publication has been carefully checked, SUMMIT Microelectronics, Inc. shall not be liable for any damages arising as a result of any error or omission. SUMMIT Microelectronics, Inc. does not recommend the use of any of its products in life support or aviation applications where the failure or malfunction of the product can reasonably be expected to cause any failure of either system or to significantly affect their safety or effectiveness. Products are not authorized for use in such applications unless SUMMIT Microelectronics, Inc. receives written assurances, to its satisfaction, that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; and (c) potential liability of SUMMIT Microelectronics, Inc. is adequately protected under the circumstances. © Copyright 2000 SUMMIT Microelectronics, Inc. I2C is a trademark of Philips Corporation.

16 PIN SSOP PACKAGE

11.5º to 18.5º 0.008 - 0.010 (0.19 - 0.25) 0.150 - 0.157 (3.81 - 3.99) 0.25 (0.635) 0.016 - 0.035 (0.41 - 0.89) 0.008 - 0.012 (0.20 - 0.31) 0.055 - 0.061 (1.40 - 1.55) 0.004 - 0.010 (0.12 - 0.25) 0.061 - 0.068 (1.55 - 1.73) 0.002 - 0.007 (0.05 - 0.18) 0.189 - 0.196 (4.80 - 4.98) 0.230 - 0.244 (5.84 - 6.20) Pin 1