SDA9086-3

SDA9086-3 SIEMENS | Alldatasheet

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@ Used in Picture-in-Picture systems (PIP) | © Field repetition frequency: 50 Hz or 100 Hz <> © Clock output: 13.5 MHz or 27 MHz NG @ Pin compatible to SDA 9086-2 1D © Trigger circuit at the horizontal input | ‘Po osozs P-DIP-8 Type _ Ordering Code | Package _ SDA 9086-3 _ | Q67100-H5045 P-DIP-8 The integrated circuit SDA 9086-3 generates a system clock signal from the line sync sig- nal SC. The clock signal is fed to the output CLX as well as to the output HSP as a sync ' horizontal signal. Using the programming pin NC, the PLL can be adjusted from the 50 Hz- Py or 100 Hz-field frequency. The input SC processes the TTL or the SSC (Super Sandcastle) input level, as selected by the programming pin VB, The SDA 9086-3 is designed to be used in Picture-in-Picture systems (SDA 9087/88-2), however, it can be used as an individual clock generator. 9 04.91

SIEMENS AKTIENGESELLSCHAF SDA 9086-3 Circuit Description The Functions of the PLL The PLL of the SDA 9086-3 consists of a horizontal timer, a phase comparator with output current sources and a VCO. It generates a line locked system clock of 13.5 MHz or 27 MHz (depending on the field repetition rate). In the horizontal timer the internal 13.5 MHz-clock from the VCO is divided by 864 or 432 (same factor for PAL and NTSC). The divided clock signal is fed to the HSP output as well as to the phase comparator. The reference signal for the phase comparator is the external SC signal. Because the PLL’s phase comparator tries to match the rising edge ‘of the two input sig- nals, the HSP output signal is line-locked to the SC input signal. The HSP signal is avail- able to the output pin with minimal time delay. The digital phase comparator is frequency- and phase-sensitive. The output signals are current pulses used as an “up/down” informa- tion. The external loop filter connected to the RC pin is used in order to integrate and filter these current pulses. The resulting analog signal is used as a control voltage for the VCO. The input signal SC is fed to a timing controlled horizontal trigger circuit. This circuit pre- vents the repeated triggering of the phase comparator, if the signal edges are smooth and noisy. Description of the Programming Inputs Using the static programming pins VB and NC it is possible to select different operating modes of the SDA 9086-3 . NC vB Output Input Freq. atSC, | Input Level Frequency at CLX | Outp. Freq. at HSP | at sc Ground Ground 13.5 MHz 15.625 kHz ssc or open or open Ground Voo 13.5 MHz 15.625 kHz TTL or open rn ee Voo Ground 27 MHz 31.25 kHz ssc Voo | Voo 27 MHz 31,25 KHz TTL Siemens Aktiengeselischaft 10 !

SIEMENS AKTIENGESELLSCHAF SDA 9086-3 Pin Configuration (top view) cI ve [J a{ sc use L] 2 71] Mss SDA 9086.3 re []s 6 [] nc Yop LI « 5 [Jax ror) Pin Definitions and Functions Pin No. Symbol Input (1) Function _ Output (0) _ _ 1 vB I Programming input for the selection of the | input signal at the SC pin. (TTL or SSC signal level) _ 2 HSP ° Output for the horizontal sync pulse. The frequency is the same as for the SC input signal if the selection of the programming : pin NC is correct.

3 RC vO Selection RC loop filter pin for integration

| and filtering of the Up/Down current pulses. of the PLL.

4 Voo Positive supply voltage

5 lax fo | System clock output (13.5 MHz or 27 MHz)

6 NC I Programming input for setting the device to

the used line frequency (15.625 kHz bzw. 31.25 kHz) 8 sc ic Horizontal syne frequency input (15.625 kHz or 31.25 kHz) TTL level are allowed. Siemens Aktiengeselischaft "

SIEMENS AKTIENGESELLSCHAF SDA 9086-3 Block Diagram vB %oo Ne Test ond Switching Losie ‘a Re facn ___ cour Pour eco | ren |Yoltoge st scm a ase current ure vas fe, [| sar . 7 oc bomle Internal an ee Timer Clock Sigel sis [sone wich wo deux ——} veo Absolute Maximum Ratings Ta=0to 70°C Parameter Symbol Limit Values | Unit Supply voltage Voo -0.3 ,6 ve Input voltage ve 0.3 6 v Ambient temperature Ta 0 70 °C Thermal resistance Rusa | 105 | Kw Max. power dissipation Pw 0.2 Ww Operating Range _ Sunni voltage [ve [as [sss ly Ambient temperature Ta _ io 70 °C Siemens Aktiengesellschaft 12 ———

Ta = 25 °C (all voltages relative to V ss) Parameter Symbol Limit Values Unit | Test Condition min. typ. max. Input SC, if VB = "Ground" or "Open" (Sandcastle pulse as input signal) Low level Vn jo 0.5 Voo : . High level _ Vin 0.65 Vo _|[Voo Switching threshold for |0.6 Voo detection of burst key _ - _ Pulse width Tees [0.1 ; us _ Pulse ratio Tses/T | 0.5 Input SC, if VB = Voo (TTL level operation mode) Low level ee | High level _ L-input current mu | -50 170 _|-300 | wa |itve=ov H-input current Tw 60 | -140 | -300 [uA jitVw=2v Pulsewidth | Tscr_— | O41 [as Pulse ratio T scr IT o | | Input VB, NC (Programming inputs) Input current _ fu _|o 20 | 50 pA | Vu Input current ag 10 {30 100 BA Vw _ Siemens Aktiengesellschaft 13

Characteristics (cont'd) Parameter _ ‘Symbol Limit Values Unit | Test Condition [min [ve | max | Output CLX, if NC = V oo ‘High time ws 12 ns | Vor=2.4V Load capacity an Z 20 a ‘H-output level Vo | 24 3 Voo Vv [tou=-8mA | L-output level Vo 0 ots (04 | V \\fa=8mA Output CLX, if NC = "Ground" or "open" High time fem faz [ns [Vou=24V Output HSP H-output level Vow 24 (3 Voo Vfow=-5 mA L-output level [vo [0 [015 [04 |[V_|fa=5mA Load capacity Ca Cece ‘Analog delay time > | fe | Jeferring to SC Siemens Aktiengeselischaft 14

Characteristics (cont'd) Parameter Symbol Limit Values Test Condition min. | typ. | max. PLL Down pulse current tao 100 150 200 pA | Vac=2V ‘Up pulse current Tou 100 | -150 | -200 Vac =2V VCO frequency frco | 151 | 50 MHz >25 MHz | Vac=1V Voo=4.5V j Ta=3.5V | >30 MHz | Vee = 3.5V Voo = 5.5 V Ta=70°C Filter Element Application ClpF C2inF CapF CainF | RQ 1 180 180 - - 25 Tr 80 80 100 100 30 Yon Yoo L, L i. ‘ : RC R RC T R . SDA 9086-3 j SDA 9086-3 i Co _ ~~ ~ vesoi8se |: Standard application ll: Recommended application if the interferences occur on V0 Siemens Aktiengesellschaft 15 aS

• i, —_-__+ a Output Clock i i “ 24V 27WHz ot CLK rr ou me! toy ot ty at ety —etgu-=t or nen 2av Oulput Signal SP A tv alow! a OT or Input Signal SC Teer ; 20v (TTL level) A ay ints TIL Switch Level gy ! wav at Tes : : in inl. Anclog Switching Level (SSC level) — obo vctorse? Timing Diagram 2 HSP Pulse Width Output Olek 27 wz FF]. en ee ii - — 20 x 1 ++ H iy i 1 Output Signal HSP oo Qutput Clock 135 mie |] oo i — 10 x 3s + Output Signal HSP i ns aa ra 1 urroress Siemens Aktiengesellschaft 16

" SIEMENS AKTIENGESELLSCHAF SDA 9086-3 Application Circuit Siemens Picture-in-Picture System oe bp ek E 7H gi tt ga: Pot fF ? 3 Be | 3¢ ol Sy 2, <v fy i i nr ae 3 ef 2 ° . dt — “ . cI f teed a oo HY Ro ]8 SS 3 7 ca dH =. 4 ee i er er ee Siemens Aktiengeselischaft 17 a