SDA5248

Siemens Semiconductor G...

VIDEO PROCESSOR

Manufacturer: Siemens Semiconductor G...

Document: 65 Pages / 2Mb

Request Quote Download Datasheet Read online HTML view

More from Siemens Semiconductor G... Browse S parts

Online Datasheet

Read SDA5248 online.

SDA5248 SIEMENS | Alldatasheet

Document overview

Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
PDF pages: 65

Technical content

SIE D MM 6235605 0044170 TLT MESIEG SIEMENS SIEMENS AKTIENGESELLSCHAF ; Video Processor SDA 5248 Preliminary Data MOS IC Features 7 | @ °C bus interface with complete direct access | to the memory area. So oe @ Uses 64 Kx4 and 256 Kx4 dynamic RAM's e@ Can store 32 or 128 teletext pages and acquire Oo \\ il ae 4 pages simultaneously NS iit @ Optional assignment of the 4 acquisition circuits ING it and bank select of the 128 memory areas via | | the 8 page memory pointers Seo osss @ Suitable for TOP Text P-DIP-40 © Access page display via page memory pointers ; a ‘@ °C bus interface with complete direct access to the memory area @ Memory clear function for 8 pages after power-on @ Memory clear function via I°C bus for all pages @ Internal 24-MHz PLL for memory tuning @ 2 free programmable circuit outputs @ 12x10 dot matrix for characters and graphic @ Extra display row for status messages @ Acquisition during the vertical blanking interval or for cable text during all lines @ 60-Hz recognition and display without additional hardware @ Field detection for non-interlace display @ STATUS information for asynchronous operation @ Forced synchronization possibility to the CBVS signal either by inferior signal quality @ East European character set SDA 5248C2 @ West European character set SDA 5248C1 Type —=—=~=«(OrderingCode —=—«|Package CS SDA5248C1 _—*[Q67100-H5074. P-DIP-40 a ‘SDA 5248C2 Q67100-H5052 P-DIP-40 19 04.92

SLE D M@@ 8235605 0044171 956 MBSIEG SDA 5248 SIEMENS AKTIENGESELLSCHAF SII IS ON 82-33-47 The SDA 5248 multipage text is a derivate of the SDA 5243 including some additional functional blocks. Using this device it is possible tp process up to 128 pages stored in an external DRAM. The relation between the 4 acquisition circuits available and the ad- dresses of the page memory can be handled much more flexible than before. In the SDA 5248 chip there is now a version of our teletext processors available that can manage up to 128 pages of teletext in an extemal dynamic RAM. SDA 5248 is upward compatible in software with SDA 5243 and can be operated in the same hardware envi- ronment as the latter and with the same SDA 5231-2 data slicer. The pinning differs only where the memory interface is concerned. SDA 5248 offers extra features however: @ For memory it only requires a dynamic RAM in x4 organization: 64 K x 4 dynamic RAMs can be used for 32 teletext pages or 256 K x 4 for 128 pages. The control signals of the memory interface are all derived from the 24-MHz timing, which is generated by an internal PLL. The extra external circuitry necessary for this consists of an RC filter and the wiring of the analog power supply. © There is no longer firm assignment of memory address and search circuit in SDA 5248. Each of the four search circuits, independently of one another, can be assigned one of 128 memory addresses. This makes management of the pages that have already been found very much more flexible. There is no waiting for the reception of four complete teletext pages an the reprogramming of the memory-bank selection, which is only then possible, and the selection of four new teletext pages, as is the case with SDA 5243. As soon as a complete teletext page has been received, a new memory area can be se- lected for the search circuit and a new teletext page programmed. In this way 128 pag- es can be read in more efficiently or part of the sent teletext pages stored faster. There are substantial advantages here, especially for use in TOP. Sufficient block, group and information pages can be found and loaded faster. So this does away with the long wait- ing times until the TV viewer sees the teletext pages. ‘© Two switching outputs, programmable on the IC bus, can be used to control external | functions. Siemens Aktiengeselischatt 20

SLE D M@@ 8235605 0044172 892 MMSIEG SDA 5248 SIEMENS AKTIENGESELLSCHAF 7-52-33-47 The Teletext Processor SDA 5248 contains six function blocks (see block diagram): © Control with timing and system clock @ Data acquisition @ Memory interface with 24-MHz PLL. @ Character generator e@ PC bus @ Refresh generator and synchronization Teletext data and clock signals from the data slicer SDA 5231-2 are transferred to the TTX processor SDA 5248 via pins TTD and TTC. The required data are selected in the acquisi- tion section and stored in the external RAM via the memory interface. The data read from the RAM passes through the memory interface to the character generator, where they are transformed into corresponding R, G, B signals for the video output stages. Further output signals produced include a blanking signal BLAN, a contrast reducing signal COR and a text signal Y for an external printer. 23 registers can be written and 4 register can be writ- ten and read over the I?C bus (diagram 5, 6 and 7). Siemens Aktiengeselischaft 21

SLE D m@® 8235605 0044173 729 MESIEG SDA 5248 SIEMEN MENS AKTIENGESELLSCHAF T-52-33-47 Block Diagram Teletext Processor with DRAM Interface gene and SYNC. | TELETEXT DATA [ Hanory ; Character |_, 4 R.6.8- onthong eee Tere eel iin Refresh synchronized with . the normat memory access. [07 256K x4 DRAM VEBOZ655. Siemens Aktiengeselischaft 22

SLE D MM 4235605 0044174 BLS MBSIEG SDA 5248 SIEMENS AKTIENGESELLSCHAF ——— T-52-33-47 — Pin Configuration (top view) Ng nope 2 39 ay “Ta Ab AM 4 37 so a 5 36 * oe Sshr10 M 7 34 atic OY EVEN aE 9 aac 22 wy oe VCS SDA5248 CAS 4 vd Me 72,| A oh mez} TES /SES 03 B 28 R 02 % 21 & 04] 8 26 76 [2 oor COR NC 7 2 BLAN Yeon 8 B y RC Bhs rea SOA Ves E0266 Siemens Aktiengesellschatt 23

SLE D MM 8235605 0044175 STL MMSIEG SIE SDA 5248 MENS AKTIENGESELLSCHAF J-52-33-47 Pin Definitions and Functions PinNo. [Symbol [Function Description ;

2 Av RAM Address Operation with dynamic memories with

3 [As _| RAM Address When connection of 256 Kx4 4 so ‘Switching Signal Free programming switching signal

5 St Switching Signal Free programming switching signal

6 Teletext Data From data slicer SDA 5231

| 7 6.9375 MHz from data slicer SDA 5231

8 EVEN | EVEN Field Field recognition output

9 F6 System Clock "| 6-MHz from data slicer SDA 5231

10 vcs Composite Sync Sliced sync signal, part of the CVBS signal, coming from the data slicer iW SAND | SANDCASTLE Three-level_ signal for SDA 5231 for synchronization of Fé. 12. _ | TCS/SCS | Sync Input/Output Synchronization output during text re- production. 73, 14,15 [RGB Red, Green, Blue ‘Open drain video output signal for TV _— output stages.

16 COR Contrast Reduction Open drain video output signal for con-

_ trast reduction.

17 Blanking Blanking signal open drain output

18 Y Character Output Open drain video output signal for

19 Serial Clock °C bus clock input

20 SDA Serial Data Bidirectional ?C bus data port (open drain stage) ai oO

22 Ground Analog ‘Analog ground for PLL

23 RC RC ; RC network for PLL loop to Vssa

Siemens Aktiengesellschaft 24

SLE D MM@ 8235605 OO4417b 438 MBSIEG SDA 5248 SIEMENS AKTIENGESELLSCHAF 7 Sau EEE aa — -52-33-4 Pin Definitions and Functions (cont'd) PinNo. [Symbol | Function 7 Description _

24 Vooa +5V Analog voltage supply for PPL

25 N.C Output always low 26-29 DO-D3 RAM Data Tristate bidirectional data port

30 WE Write Enable RAM control signal (active low)

31 RAS Row Address Strobe Control signal (active low)

32 Column Address Strobe | RAM control signal (active low)

33 OE Output Enable RAM control signal (active low)

34-40 A0-A6 | RAM Address Operation with dynamic memories with 4-bit organization. Circuit Description Data Acquisition The SDA 5248 meets all the requirements of the present teletext standard. Data arriving at the TTD pin are accepted as teletext data as soon as the start code (dia- gram 1) appears within the data entry window. All bytes are checked for odd parity errors and 1-bit errors are corrected in the bytes with Hamming protection. The parity check for the data bytes can be deselected for reception of 8-bit data without parity. The following acquisition features are available: @ Automatic data font changeover to one of 6 language by transmitted control bits, inde- Pendent of the selection over the I°C bus (diagram 8 and 10). @ Data reception during lines 2 through 22 in each half frame. © Data reception in all lines of a full frame by switching over to full channel operation. In full channel operation one must note that the automatic erase function is only partially available, hence all lines of every page must be transmitted in sequence or the whole page erased by software. © Memory control of storage of up to 128 teletext page, 4 teletext Pages are sought simul- taneously and when received are transferred into the memory bank selected by the page memory pointers (diagram 7, register 13). @ In the "don't care" mode pages can be sought whose page numbers are not precisely know, by inserting a don’t care bit in place of the unknown number. This causes a search for all numbers between OHEX and FHEX at the indicated location (diagram 5, register 3). Siemens Aktiengesellschaft 25

SLE D M® 8235605 0044177 374 MBSIEG SDA 5248 __ SIEMENS AKTIENGESELLSCHAF J-52-33-47 © Capability of receiving supplementary information (ghost rows) which can be pro- cessed in a microcomputer. This allows reception of 24 virtual lines per page in addi- tion to the normal text lines, and 2 Kbytes of memory are needed to store one page (dia- gram 2b). @ The transmitted clock time is directly written into page memory selected for display. @ Automatic erasing of stored pages 0-7 for standard teletext. @ Erasure of single pages by software command. @ Rolling page number during search. Character Generation The character generator provides 192 alphanumeric characters and 2x64 graphics sym- bols in a raster comprising 12 horizontal and 10 vertical points. The various display possi- bilities can be selected by means of 32 control characters contained in the text (dia- grams 8-11). 6 language are automatically selected by the transmitted page header control bits C12, C13 and C14 (diagram 3, line 25, byte 7) in standardized 7-bit operation (diagram 10 and 11). In addition the capability exist in 8-bit operation, to select nearly all characters independently of the control bits using the I°C bus (diagram 8). Teletext signals R, G, B, Y, BLAN and COR are available at the open-drain outputs. The COR signal makes it possible to reduce the contrast during the mixed mode as well as in- side or outside of a teletext box area. The Y signal reproduces only the teletext character plane without color information and does not have a fiash function. Diagram 12 shows the active display area. Additional features include: @ User-controllable character-height doubling with top/bottom selection. @ Status information above or below the main text. @ Insertion of all control, graphics or alphanumeric characters in the 24 standard rows and in one extra status row is possible via the I°C bus. By doing so the selected posi- tion of the character can be made visible by means of a cursor. Siemens Aktiengesellschaft 26

T-52-33-. SIE D M@® 6235605 0044178 200 MESIEG 2-33-47 SDA 5248 SIEMENS AKTIENGESELLSCHAF SSS SSeS ss Timing 7 The internal system clock is derived from the 6-MHz clock F6 provided by the data slicer SDA 5231-2. The input F6 is AC coupled internally. Vertical synchronization with the video signal occurs via the VCS. input. The noise con- tent of the VCS signal is reduced by integration. If the signal is too noisy or no synchroni- zation can be achieved for other reasons the data acquisition is disabled. The device is able to supervise the quality of the incoming video signal at the VCS input. This is done by means of counting the sync pulses received during 64 us. A good line of a video signal consist of 1 or 2 pulses during 64 us. By means of an integration over the lines of move fields a good and weak signal quality is defined. Under worse signal conditions the data acquisition is stopped. The quality status bit of the VCS signal (VCSOK) is stored in the FC bus register 11B (see diagram 6). Therefore the microprocessor can be used to su- pervise the signal quality level. During the normal operation of the SDA 5248 (reg. 0, bit d3 = 0) and weak signal quality is detected the IC will automatically switch to the unlocked operation mode. This means PLL and video signal are no longer synchronized. Is the bit d3 set to "1" there is forced synchronization even if the signal quality is weak. The data acquisition will be stopped. But if the signal quality will get weaker it has to be considered that the PLL jitter can be increased. During this operation mode bit d0 in regis- ter 11B indicates the quality of the last line received before reading the register. In the nor- mal mode this bit indicates the quality of the VCS signal integrated during some TV fields. One evaluation in the SDA 5248 recognizes by good signal (VCSOK = 1) the field fre- quency of the received VCS signal (50 Hz or 60 Hz) and the result is stored in I°C register 11B (see diagram 6). The TCS/SCS pin can be defined as an input via the I°C bus. 17 psec after the start of a line an internal signal is used to sample the input sync signal. (Refer to diagram 13 a and 13 b). Therefore the input signal shall have only low distortions and low noise. The first change from “high” level to "low" level detected by this sampling process initiates the ex- ternal vertical synchronization of this device (see application circuit 3c). To reduce the hardware expense for the synchronization of the display part i.e. 60-Hz sig- nals (NTSC) the vertical external synchronization of the integrated circuit can also be done via I°C bus through the VCS input (see application circuit 3b). In this case, the bit VCS_to_SCS in °C register 1, bit d7 (see diagramm 5) must be reset to 1. There is no requirement for an external switch-over circuit including an inversion for the ‘SCS input. At the same time the 6-MHz clock signal F6 and due to this the internal system clock are always synchronized to the input signal. This doesn't depend on the signal quality of the input signal. Furthermore, the noise components of the sync-signals are re- duced by integration. When the TCS/SCS pin is switched as an output it deliners a sync signal (interlaced or non- interlaced) for the TV deflection circuit (see application circuit 3a and diagram 13a). Siemens Aktiengesellschaft 27

SLE D mm 8235605 g044a79 147 mmsTEG — 1-52-33-47 SDA 5248 SIEMENS AKTIENGESELLSCHAF — The SAND output delivers a three-level signal which contains the phase-lock signal PL and the color burst blanking signal FBB. The PL signal synchronizes the 6-MHz clock in the SDA 5231-2. If for some reasons no synchronization is possible, the PL signal compo- nent of the sand signal (refer to timing diagram 3) is switched off and the oscillator is running unsynchronized. The field recognition output EVEN changes its state once per field. Using this signal it is possible to realize non-interlaced displays. The synchronization of the display can be derived from the acquisition or the display related circuits in the device (e.g. in the after hour operation mode). The display locked synchronization mode can be selected by means of the [°C bus bit VCS_to_SCS set to 1 (register 1, d7 = 1) or the PC bits “external synchronization" (register 1, dO = d1 = 1). Otherwise the display synchronization is locked to the acquisi- tion circuit. The line or timing relation of the EVEN output signal can be seen from timing diagram 4. The detector for the first field can be switched off via PC bus bit register 0,bit d2. The EVEN output will remain in "low" status after the detector is switch off. Memory Interface The following memory types can be connected to the SDA 5248 without additional exter- nal components: - Dynamic RAMS with 64 K x 4 organization - Dynamic RAMS with 128 K x 4 organization 1 The refresh for the dynamic memory occurs automatically in the range SAND = 0. The cir- cuit configuration for the different memory types are shown in the application circuits 1-2. Siemens Aktiengeselischaft 28

SkE D W@™ 8235605 0044180 969 mMSTEG 1592-33-47 SDA 5248 SIEMENS AKTIENGESELLSCHAF Organization of the Page Memory The external page memory is subdivided into 128 pages of 1 Kbyte each, which are num- bered 0 through 127. The different pages 0 - 127 can be selected using the active chapter bits AO till A7 in the I°C bus register 8 (diagram 6). Bytes within a chapter can be selected via the I?C bus addressing rows (I2C bus register 9) and columns (I°C bus register 10). Please refer to the diagram 6. In the functional block “memory interface" the row and column addresses are automatically converted into the 10 bit wide RAM address. For the display chapter (A2 till AO in register 4, diagram 6) and acquisition chapter (A2 till AO in register 2, diagram 5) the addressing is done indirectly via the 8 page memory pointers (I?C bus register 13, diagram 7). Each CHAPTER contains 23 lines with 40 columns each for storing the normal teletext data (diagram 2a). In addition it contains lines 0, 24 and 25. Line 0 is the page header. Line 24 is used to display status information from the contro! computer (to the user). Line 25 contains information for the control computer and 14 bytes free for optional use. In the ghost-row mode the visible lines are stored in CHAPTER 0-3 and corresponding vir- tual lines in CHAPTERS 4-7. 8 pages are assigned to the chapters 0-7 by means of the 8 page memory pointers (I°C bus register 13, diagram 7). Diagram 2b shows in which CHAPTER line a virtual line is stored. On switch-on reset, the memory areas 0 till 7 are erased excepted for CHAPTER 0, line 0, column 7, where “alpha-white” (0000 0111) is written. During operation, erasing is possi- ble via °C bus, but the erasing cycle requires up to 22 ms per page memory. As soon as the control bit C4 for one of the four pages being looked for is transmitted, this page is au- tomatically erased. The actual state of C4 is stored in line 25 (diagram 3). For each 8-bit data word two write or read cycle are necessary. Every cycle requires 250 ns. The timing for the memory interface is given in the characteristics and in the timing dia- gram 5. Siemens Aktiengeselischaft 29

~52-33-4 SLE D @@ 8235605 0044181 875 MMSIEG T-82-33-47 SDA 5248 SIEMENS AKTIENGESELLSCHAF PC Bus Organization of the IC Bus Registers 10010 001 R/WI Component address When the supply voltage is connected, a switch-on-reset is performed. The bus lines SDA and SCL are released. Registers 0-4 and 7-12 are set to 0000 0000, register 5 and 6 to 0000 0011. The page memory pointers in register 13 are set with the values: Page memory 0: 00000000 Page memory 1: 00000001 Page memory 2: 00000010 Page memory 3: 00000011 Page memory 4: 00000100 Page memory 5: 00000101 Page memory 6: 00000110 Page memory 7: 00000111 The circuit functions as slave-transmitter and slave-receiver. Registers RO to R10, R12, R13 can be written only, register R11 can be written and read (diagram 5 and 6). Note: All reserved bits have to be written with "0". Siemens Aktiengesellschaft 30

SLE D MM 6235605 0044142 731 MESIEG SDA 5248 SIEMENS AKTIENGESELLSCHAF T-52-33-47 Write S 0010 0010 A 0000 = XXXX A XXXX = -XXXX A P t 4 Acknowledge 4 Start write St ite \\ y \\ vs Chip Address Byte Register Address Data Word 1 Read S 0010 0010 A 0000 «1011 A S 0010 oon A t write Read W.-Y \\ — / WH, Chip Address Byte Register A Address Chip Address Byte XXXX — XXXX A A XXXX_ — XXXX P rs \\ Y nn, Data Word 1 Data Words nn Last Data Word In several registers, an auto-increment of the register or column address occurs after each byte is written. For example, when register 1 is addressed, the data in register 1, reg- ister 2 and the column selected by register 2 in register 3 are written, and an auto-incre- ment of the column addresses 0-6 takes place in R3, i.e. 9 data bytes can follow directly after the register address 1. The bits are numbered in reverse order of the IC bus data stream. Siemens Aktiengesellschaft 31

SUE D MB 8235605 DONNTS3 78 M@ESIEG SDA 5248 SIEMENS AKTIENGESELLSCHAF eee CT-52-33-47 RegisterO Register Address 0000 0000 “Pin Function Switch" 47-66 reserved __ 45 0= SO-pin = low OT _ 1 = S0-pin = high _ 6 0 =S0-pin = low 1 = SO-pin = high ; d3 0 = normal operation 1 = forced sync (free run mode blocked) | no automatic self sync by inferior VCS signal 2 0 = EVEN-pin active 1 = EVEN-pin = OV di not used do 0 = register 11 Ais selected 1 = register 11 Bis selected After a write to register 0 the register address is auto-incremented to 1 Siemens Aktiongesellschaft 32.

SLE D MM 8235605 0044284 SO4 MBSIEG SDA 5248 SIEMEN MENS AKTIENGESELLSCHAF _ T-52-33-47 Register 1 Register Address 0000 0001 “Setting the Operational Mode” Bit Function | Comment 47__[0=normal operation 1=VCSTOSCS | for 60-Hz display mode dé 0 = acquisition of 7 bit and parity bit | parity check of TTX data 1 = acquisition of 8 bit data words no parity check d5 0 = acquisition ON 1 = acquisition OFF 4 1 = enable GHOST ROWS reception of lines 25 to 30 _ d3 0 = DEW 2-22, 1 = full channel operation DEW = data entry window for line 2-22 d2 1=TCSON TCSSCS pinis sync output d1/d0 | 00 = 312/313 lines - MIX - mode with interlace —— — rere d1/d0 {01 =312/313 lines — - TEXT - mode iwithout interlace "jis inhibit in flash d1/d0 | 10 = 312/313 lines - TERMINAL - mode | without interlace | messages and subtitles d1/d0 /11 = external synchronization _| TCS/SCS pin is an input. After a write to register 1 the register address is auto-incremented to 2 Siemens Aktiengesellschaft 33

WB 8235605 OO84L8S 440 MBSIEG T-52-33-47 SDA 5248 SIEMENS AKTIENGESELLSCHAF SLE D Register 2 Register Address 0000 0010 "Page Memory Selection" Bit Function Comment a a _—_ dé 0 = page memory pointer 0-3 BANK selection 1 = page memory pointer 4-7 d5/d4_|00 = page acquisition control ACQCCTO | Register 3 selection, ACQCCTO, the page memory pointer 0 or 4 acquired page is stored under the page memory address in register 13 page memory pointer 0 or 4. d5/d4_ | 01 = page acquisition control ACQCCT1 | Register 3 selection, ACQCCT1, the page memory pointer 1 or 5 acquired page is stored under the page memory address in register 13 page memory pointer 1 or 5. d5/d4_|10 = page acquisition control ACQCCT2 | Register 3 selection, ACQCCT2, the page memory pointer 2 or 6 acquired page is stored under the page memory address in register 13 page memory pointer 2 or 6. d5/d4_|11 = page acquisition control ACQCCT3 | Register 3 selection, ACQCCTS, the page memory pointer 3 or 7 acquired page is stored under the page memory address in register 13 | Page memory pointer 3or7. d3 1=TB 0 =normal operation Test bit. d2-d0 | addressing of column 0-6 in register 3 With address auto-increment After a write in register 2 the register address is increased to 3 Siemens Aktiengesellschaft 34

SLE D 4M 8235605 0044186 387 MESIEG

3 SDA 5248

SIEMENS AKTIENGESELLSCHAF _ _ Register 3 Register Address 0000 0011 "Page Request Data" This register contains 7 columns. The column address last written to register 2 is ac- cessed. After every data word the column address in register 2 is auto-incremented. Column Address 000 to 110 Bit d5-d7 are not evaluated Column Address Bit d4 Bit d3. Bit d2 Bit d1/dO || 1 =do care 000 magazine number |HOLD (*) L magazine number. ————> 001 tens position age number tens position —>

010 I units position << — page number units ————>

ont C tens position 0 | 0 - — hourtens —> 100 units position 7 hour units_§ —————— 101 | L. tens position () [— minute tens. ———_——> 110 L. units position ~~ minute tens ———_—- (*) HOLD = 0 Page contents are not updated During an uninterrupted access to register 3 the HOLD function is automatically performed Each page data acquisition controller ACQCCTO-3 contain one register 3 (diagram 5). By searching the same page in several registers 3, the page data acquisition with the lo- west number has the priority. No auto-increment to register address 4. Register 4 Register Address 0000 0100 "Display Chapter" Register address must be transmitted (no auto-increment from register 3). Bits 3-7 are not evaluated. Bits 0-2 number of the page pointer 0 to 7 in register 13. The page memory pointer refer to the address of the page to be shown. Siemens Aktiengeselischatt 35

SLE D MM 8235605 0044287 213 mm 1382-35-47 8? ena SIEG SDA 5248 Atter a write to register 4 the register address is auto-incremented to 5. Register 5 Register Address 0000 0101 "Display Control Normal Inside and Outside Box" Bit [Function _ ~|eomment _ a7 0 = only for foreground colors outside 1 = foreground and background colors. has priority over “picture outside" outside _ ee dé 0 = only foreground colors inside has priority over "picture inside” 4 = foreground and background colors inside ee d5 0 = normal contrast 1 = contrast reduction outside d4 1 = contrast reduction inside 03 1 = text outside __ d2 1 = text Inside _ _ dt 1 = picture outside _ dO 1 = picture inside _ _ _ _ Inside: _ inside a teletext box area Outside: outside a teletext box After a write to register 5 the register address is auto-increment to 6 Register6 Register Address 0000 0110 "Display Control News Flash Subtitle” Function analogous to register 5, valid only for flash messages and subtitles controlled by transmitted control bit C5 or C6. Functions control as in register 5. After a write to register 6 the register address is auto-incremented to 7. Siemens Aktiengesellschaft 36

SLE D MM 8235605 00441488 15ST MESIEG T-52-33-47 SDA 5248 SIEMENS AKTIENGESELLSCHAF Register 7 Register Address 0000 0111 "Display Mode” Bit Function Comment __ d7 | 1 = status information in row 0 i 0 = status information in row 24 dé | 1 = cursor "ON" for position addressed | cursor blinking is possible by repeat- in reg. 9 and 10 ed switching ON and OFF d5 0 = reveal function activated after conceal display controller character d4/d3 01 = double character height, only lines 0-11 visible | 11 = double character height | only lines 12-23 visible XO = normal image d2 1 = box on attribute enable in line 24 da 1 = box on attribute enable in line 1-23 a0 in d1 inhibits the display of flash messages and subtitle do 1 = box on attribute enable in line 0 | eee eee No auto-increment to register 8 Register 8 Register Address 0000 1000 “Active Chapter" Register address must be sent (no auto-increment from register 7) The bits 4-7 have no function. Bit 3-1, erasing memory contents of the addressed page. The bit is not stored, Within one frame period, the blanking code 0010 0000 is written to all memory positions of line 0, column 0 to line 25, column 23. Bit 0-2, the page memory addressed 0...127 for I?C bus access. All pages can Bit 4-7 be addressed directly. After a write to register 8 the register address is auto-incremented to 9. Siemens Aktiengesellschaft 37

SLE D MM 8235605 0044289 O96 MESIEG _ '~52-33-47 SDA 5248 STEMENS AKTIENGESELLSCHAF Register9 Register Address 0000 1001 “Active Row" Bit 5-7 without function Bit 0-4 selection of rows 0-25 in page memory. Auto-increment of row address. Row 23 is followed by row 0. Rows 24 a. 25 can only be selected directly. After a write to register 9 the register address is auto-incremented to 10. Register 10 Register Address 0000 1010 “Active Column" Bit d6 and d7 without function Bit d0-05 selection of columns 0-39 in page memory An auto-increment of the column address follows. Column 39 followed by column 0 and an auto-increment of the line address in register 9. After a write to register 10 the register address is auto-incremented to 11 Register 11A Register Address 0000 1011 and Register 0, dO = 0 “Active Data" Data Bit qd dS ds ds a2 di dO | Alphanumeric and Bits Bit7 Bité BitS Bit4 Bits Bit2 Bit1 control characters After writing a data byte, the column address is auto-incremented for the next data byte. After reading a data byte the position of the next byte to be read is automatically selected, if the last write command selected automatical the register 11 or if the last write command created an auto-increment from register 10 to register 11. Siemens Aktiengesellschaft 38

SIE D MM 8235605 0044190 808 MESIEG 47 SDA 5248 SIEMENS AKTIENGESELLSCHAF Register 11B Register Address 0000 1011 and Register 0, d0 = 1 "Status Register” Bit Function ~ [Comment 7 0 = 50-Hz VCS signal available ‘| valid only for "VCS is OK” 1 = 60-Hz VCS signal available > ford0 = 0 no used d6-d1 0 ‘ dO 0 = VCS signal is interfered b register 0, d3=0 1 = VCS is ok 2 _ 0 = last VCS line was interfered Le 1 = last VCS line was interfered f eater Bt Write access to register 11B is impossible, if write access with the address 11B is at tempted as a direct write access to the page memory by means of register 11A. No auto-increment to register address 12. Register 12 Register Address 0000 1100 “Address for Page Memory Pointers" Bit d3 - d7 without function. Bit dO - d2 page address selection in register 13 After a write to register 12 the register address is auto-incremented to register address 13. Register 13 Register address 0000 1101 “Page Memory Pointer” This register contains 8 columns. The page address last written to register 12 is accessed. After writing of an address into register 13 the content of register 12 is automatically in- cremented. Therefore the next data byte received is automatically written into the next page memory pointer. Bit d7 without function Bit do - d6 address bit for page address All 8 page memory pointers have to contain different addresses otherwise different acquired pages are written into the same area of the memory. After power-an reset the address pointers contain the page memory addresses 0-7. Siemens Aktiengeselischaft 39

2uy MMSIEG —_1-52-33-47 SLE D Mm 8235605 oo441a SDA 5248 SIEMENS AKTIENGESELLSCHAF Absolute Maximum Ratings T= 25 ‘C (all voltages are referred to Vss) Parameter ‘Symbol Limit Values Unit fin [typ [max | Supply voltage Voo -03 | [6 Vv VCS, SAND, SDA, SCL, EVEN DO to D3, AO to AB OE, WE, CAS, RAS , SO, S1 Vw -03 Vo |V To. Fe ve pos [nv R, G, B, BLAN, Y, COR Va =03 65 iV ‘Ambient temperature Ta = 20 7 (|'C Storage temperature Tag -20 425 Cc Power dissipation _ Pe _ iw Thermal resistance Re 39 Kw Operating Range Supp voage P= [as [8 | Temperature Ta lo |.+\\7 ~+‘[e Siemens Aktiengeselischaft 40

WH 8235605 0044193 517 1233-47 SLE D 62 O4419 WBSIEG SDA 5248 Characteristics (cont'd) Parameter ‘Symbol Limit Values Unit Test Condition min. |typ. | max. Input VCS Tnpat vine veo H- input vane? ve | [veo [v —_| Input leakage current [fn | Eto A [ie 55 input capacitance le | |? [or Rise and fall times [ete {| | [500 Ins __ Input SCL, Input/Output SDA L- input voltage Va o | (is [VY | H-input vag lve [>| |ve lv Input leakage current Ce es CC et input capactance le [| or Fise and fl ines Ce Max. capaciy ofbus [C= | | _|400_[oF | Fall time (acknowledge) fe [fo fs from 3 to 1V SDA acknowledge lve fo | 05 |v |im=3mA test circuit 2 Siemens Aktiengesellschaft 42

SLE D M@® 8235605 00441594 453 MSIEG SDA 5248 ———— _ SIEMENS AKTIENGESELLSCHAF — — Characteristics (cont'd) Parameter Symbol Limit Values Unit Test Condition ae ae typ. [max | _ Input/Output Tesscs . a Input signal Scs_(TSC= high impedance) L.- input voltage Vie o- 16 iv | _ H-inputvoltage [Vm 3.5 s iv Input capacitance leu pF Input leakage current | /1 [to [wa [vicav Rise and fall times tier | | [500 [ns | Output Signal Tsc. L - output voltage Va o | oa |v Ta.= 1.6 mA H - output voltage Vow 24 Voo |V — Tox =0.2mA 55 |v Ton= 0.1 mA Rise and fall times fate | |100_|ns [between 0.6 and 2.2 V_ RAM Data Interface DO - D3 (Tristate input/output) H - input voltage Za [2 | [Vo |v Input leakage current [71 i [10 [wa |Vi=5.5V_ Input capacitance _ 7 pF _ L - output voltage Vo am 0 04 Vv __|fa= 1.6 mA H - output voltage Vou [2.4 Voo |V |-fo:=0.2mA Rise and fall times ty fe 20 ‘|ns between 0.6 and 2.2 V, Load capacitance Cu _ | 50 | pF a Siemens Aktiengeselischaft 43

SIE D MM 4235605 0044195 397 MBSIEG SDA 5248 Characteristics (cont'd) Parameter ‘Symbol Limit Values | Unit |Test Condition Output EVEN L- output voltage Va [o | ‘io4 fa=t6mA H- output voltage 2.4 Voo = Tan = 0.2 mA _ Rise and fall times | 100 |ns __ [between 0.6 and 2.2 V Output SAND L- output voltage [vo fo | [0.25 |V jia=06mA Intermediate Vow 1 29 |v Tou = 30 pA level? _ H-outputvottage [Von [40 | [Veo |v |-rox=30A 1 Rise time tn 400 |ns [between 0.4 and 1.1V ' te 200 = |ns between 2.9 and 4 V | Fain [x || |0 [ns [between 4 and 0.4 V Load capacitance cu 30 pF RAM Address Outputs OE, WE, AO - A8, RAS, CAS: Rise and fall times tt | | [20 |ns between 0.6 and 2.2 V Load capacitance Cc [| 50 [pF _ Switch Outputs SO, S1 = output voltage Vo [0 04 |v fa=16mA H - output voltage Vow 2.4 Voo |V Tox = 0.2 mA Rise and fall times [50 _|ns _|between 0.6 and 2.2V_ *) timing diagram 3 Siemens Aktiengesellschaft 44

SLE D @® 8235605 0044196 e2b MBSIEG SDA 5248 Characteristics (cont'd) Parameter |Symbor | Limit Values [Unit [Test Condition min. | typ. max. Outputs R, G, B, BLAN, Y, COR (open drain output) L - output voltage 04 |v Ja=2mA Va 1 Vv Ja=5mA Fall time Ri=1kQby5V (Test circuit 1) Vew=4.5 +1.5V Fall delay te with Rv =1 kQ by (Test circuit 1) 20 Ins 5V Outputleakage iia 20 |yA Vo=5V Load capacitance ce 25 pF . __ Timing for Memory Interface Cycle time tec,twe [450 ]500 [500 [ns — (page mode)” Delay address to OE) | toe 10 |ns _ Pulse duration OE Foe. 400 ns Row address hold Fran 25 ns hold time” __ Column address toan 60 | ns hold time” | ee Row address set-up] tase 5 ns time” Column address Fasc ns set-up time") _ Data set-up time? toc =| || ns _ Pulse duration RAS trasP }280 Pulse duration CAS “) | toast 80 ee Set-up time RAS tee 100} a °) timing diagram 5b "timing diagram Sa, timing diagram 5b Siemens Aktiengeselischaft 45

SLE D @® 8235605 OO441L97 be MBSIEG ony soag SIEMENS AKTIENGESELLScHAF — 1752-33-47 Characteristics (cont'd) Parameter Limit Values Test Condition min. | typ. | max. Timing for Memory Interface (cont'd) (test circuit 5a, timing diagram 5b) Set-up time RAS“) tre 100 - Set-up time CAS “) top 55 Pulse duration WE? |twe. [| : Data set-up time? tos f [| We totristate? fone [40 [ns | PLL Filter Currents Load current |rocs—|-20 [-80 Vo=19V Load current ~__ free |=20 |-80 [-200 [WA [Va=25V 9 timing diagram 5a “) timing diagram 5a, timing diagram 5b Components Used for the PLL Loop Filter (see test circuit 3) Cri= 1.6 nF, Re=18kQ2 Cr2= 100 pF Siemens Aktiengeselischaft 46

SLE D MM 8235605 0044198 OTF MMSIEG SDA 5248 a 52-33-47 SIEMENS AKTIENGESELLSCHAF 1-82 Test Circuit 1 Test Circuit 2 Yoo Yeo ?. j SDA 5248 SDA 5268 +5V Ri BLAN, ° o> TT ¥. COR | 10nF “| Yorn 7 @ y o__— ‘UESO2687- ueso2ese Test Circuit 3 Yoon Yon an SDA 5248 R Gy RC|23 i R.6.B, VK 4.6ne BLAN, Ge Y. COR 4 400pF a «yet ues02659 Siemens Aktiengeselischaft 47

SUE D mm 8235605 0044199 T35 SDA 5248 —— SIEMENS AKTIENGESELLSCHAF Timing Diagram 1 Input Signals TTC and F6 - t t i aa y 10%4 Vif ‘TO CZ. t vatons Yq = 50% Line Giving Equal Areas Timing Diagram 2 Input Signals TTC and TTD 90% 90% TH s0%f| 10% 50% 50 wf Le Lit | sons 40ns 4Ons 40ns min. min. ino _ain Zroav ow Ui CU TTD Stable TTO Stable vere Siemens Aktiengeselischaft 48

SLE D m@ 8235605 O044e200 587 WESIEG SDA 5248 SIEMENS AKTIENGESELLSCHAF ———-—— Timing Diagram 3 CS-and SANDCASTLE - Output to 0 4.66 tush PL AND Intermediate Level | Asynchronous Phase: FFB| ro 1 Ero 18 85 335 Hus) Timing Diagram 4a EVEN Signal synchronized by the Aquisition Circuit a) VCS with S0Hz Field Repetition Rate EVEN in Line 2%

62 Flys

62 Hus)

624)625 30312 626/625 Line b) VCS with 60Hz Field Repetition Rate EVEN 2 3011312 lz Line verooe2 Siemens Aktiengesellschaft 49

SIE D MM 8235605 0044201 413 MBSIEG T-52-33-47 SDA 5248 —CSTEMENS AKTIENGESELLSCHAF _ Timing Diagram 4b EVEN Signal, synchronized by the Display Circuit a) VCS with SOH2 Field Repetition Rate EVEN in Line 2 1 . 62 tlust EVEN in Line 315 I

62 Hush

2B 3151316 2|3, Line b) VCS with 60Hz Field Repetition Rate EVEN 213 2651266 aia Line vcroons Siemens Aktiengeselischaft 50

S1E D MM 8235605 OO44202 35ST MESIEG 1-52-33-47 SDA 5248 —_— SIEMENS AKTIENGESELLSCHAF Timing Diagram 5a Data Transfer with External Memory Pt Adéress AO...A7 WM ES Se Ce, 1 he | | Enable WE — fon Date 00.03 Ee Da, | bets wt tis ar towed fon Row Address Strobe RAS. | | t tia | ttl te tee Column Address Strobe TAS | Ja fos fost aa bets eon2ss0 Siemens Aktiengeselischaft 51

SLE D @® 8235605 0044204 lee MSIEG T-52-33-47 SDA 5248 STEMENS AKTIENGESELLSCHAF __ Application Circuit 1 SDA 5248 Interfacing to 64 K x 4 Dynamic RAM for 32 Pages 6 - a 26 2, u THe om 00 pO Yon 8 | ven Py CS WO eT Neg 33 p3 “Dynamic WI vcs 40 40 RAM BI Tcs/StS a2P6 a a % MS getester 5248 4a SOA Ab Ab GM 71464 ab ie a m7, s ne BLAN AT AT rane is os spa oe | OE | OE 4 ic VE we 5454 RC 21 22 T rT 18 vesoz662 Siemens Aktiengeselischaft 53

ED @@ 8235605 oo4y2e0s 0b9 MBSIEG 5h SDA 5248 SIEMENS AKTIENGESELLSCHAF Application Circuit 2 SDA 5248 Interfacing to 256 K x 4 RAM for 128 Pages A u 24 % 1 10 aye Yo Yam to TIC 1] 01 8h even 2 pg 256K x4 ory o Dynamic ole, Or aA 1 ¥ 2) Ne) TCS/SCS A2| AZ Jt SOASZAB ACh ag] Mt Yth256 i a?) a B As Ho i Bing cl bea vl |, a e ral ee tas as SoA 7S pr | ‘ Fo a so WE WE COR (] Yos Yosa Ys 21 22 LT L 20 veso2663 Siemens Aktiengesellschaft 54

. 6 SLE D @™@ 4235605 OO4420b TTS MBSIE SDA 5248 ——— STEMFNS AKTIENGESELLSCHAF ——W__ : Application Circuit 3a Teletext System Timing with CVBS Synchronization ¥ F we 228 Bey EB 5 y $522 832 : _ Es LT gz5| |e Fy [eo el|er =| s vicn| So = “gl ES s = & i ix 12] B25 Jezel leks 5a ab ae rea Z 3 2 = - 5 oO = el eS 3 si 3] 3) gz zg} S|) By] By se 3] S| 25) Ss ee c| sl Fel Ae le asa] 4a > 4 7 x & vs goat = e {5s i > A 85 a | 3 . a & 8 <oxs st é Bs583 2a Pu genes 38 5 Siemens Aktiengesellschatt 55

SLE D MM 8235605 0044207 931 MBSIEG SDA 5248 ——————._ STENENS AKTIENGESELLSCHAF ee Application Circuit 3b Teletext Clock Control in 60-Hz Display Mode ee 28 8 23-982 £5 224 22 P*°|pe- ee] lees yee elle. | § Fe] Ex | -o =2s| ls 2 ss 4 zs [S46 wag] |2°e 8a 3 = #2 [8 Sel Fe S as Mc 7 Kz a = BL L— : = ; NG &] pe ve 3e & Siemens Aktiengeselischaft 56

T-§2-33-47 08 878 MMSIEG SLE D @™@ 8235605 o0442 SDA 5248 SIEMENS AKTIENGESELLSCHAF - — ; Application Circuit 3c Teletext Clock Control wit External Synchronization s B subEZ we Zetia y 82232 oz 5 35 288 Bus 53 82 422 - svEzi 2 s]|-es ESegs . Syl re i sage sl les i=) 82% =] | £22 Hees) [ez Be | oo ae a rea a | e825 — re |2953 . ee BE ote fel 28 - 2 s z= cs é e|8 Sal %s S y jez = £2/ & a ob Se] & Ze Se _ 2 “ 5<.~8 28 ge gS "53 22 Siemens Aktiengesellschaft 57

SE D m™ a235L05 0044209 704 MESIEG en —————_ SIEMENS AKTIENGESELLSCHAF Application Circuit 4 rs Bes BRR |?

8 Re aaa

CTs debe [eld = Tassseeeezierage isis als [1 8 2 iS, & Fs 2 # 3 3 als By ig =H Te 2 8 vee wis28.-sc eStou @eeood " SER LE So anes &P OK 5a Ga ba ba FS es a ge >! —_ gi ot To =|o- Tt] no SLE E ol ol tT] pes al o_o] [=] | es 2) 0 ag 8 tetotpetet ec 2 ay le ra S| | S| Ss] 2 6 2 = == es : ta Xlelelelaiste|f +l ol ol a} ol =|

8 CELLS s eZseseFes = lo

PLT IS [PFeteses sos bises2 3 l=) wk £ Fe s = <e N & 8a ge «x *KY o , gH w - S80 _|F g 33 952 5 8 #2 55 QE 6s Sg gs 28 23 22 de £3 32 & as) a) a) a) a) 8) a) 2) = aay gl IH | = sjatal [3 pits qe Fl ttt 1 Base o BRE 5 6 ‘Siemens Aktiengesellschaft 58

SJE D mM 8235605 OO442L0 Hee mMSTEG |~52-33-47 SDA 5248 Application Circuit 5 Sée ya elalslel-slelelstelelalsl=] Tela A Tel Sse see eesse egg me 2 Slog <2 ais, § = Bs 3A 2 < R 3 cal 5 . _ FSscq3 >+fo IH 3 I ej oh Totes eheh LET =| see ak 2)ee eS 3] git I a 2*| 5 xa Elo 3 S 2 = ca aL al «| ol of ol ol aisiatels|=|fole] a eo Rs = §| 2 z she 8s 32 5 § |= 2 2%, 2, BS 2 2 gle 2 8 2 22 ff ge 5 e* a a i] = Re aun £8 s 3 ca sg Fo ar) ai wb gy S| C++ Ss: g[] = = é o gf] 5 ~ af] suas] @sl Urs By aloy |Pyslsisl © a Cy at é TIT ze 38 F 25 = 2 Siemens Aktiengeselischaft 59

SLE D MM 8235605 0044211 362 MBSIEG opp song Diagram 1 Teletext Input Signal (Line 2 to 22 and 315 to 335) RS vastus tone Mhite bevel pT] TL Tg 66 (261% pie non mt | t + coccoe ol 22) % Black Level | — | Clock Run-In nove Magazine ond 40 Doto Bytes t Startcodel Line Address — Line Sync. Pulse Siemens Aktiengesellschaft 60

SLE D MM 8235605 0044212 2T9 MESIEG T-52-33-47 SDA 5248 —— SIEMENS AKTIENGESELLSCHAF_ —— Diagram 2a Page Memory Organization

7 Bytes Status Field for uC

a -White from Decoder in Normal Operation a Green from Decoder in Search Mode Text (continuous in search mode) Clock Time (continuous) Line o fo [aye 99

4 Page Memory '

Df 40 Characters (column) per Line { 22* 23* Teoens9 * Automatic erasable lines with RESET, CLEAR MEMORY or control bit C4 Siemens Aktiengeselischaft 61

SLE D MM 8235605 0044213 135 MESIEG 1-82-33-47 SDA 5248 CHAF —— sTeMeNs AKTIENGESELLSCHAT Diagram 2b Virtual Page (Ghost Rows) Cv oR HI oo AR Ww PT Tu Ee 1 Ri- N too —E o£ x RR WW 044423141516 ,7,8, 9 110,11,12 -.-,37,38,39, BYTE oF f) * 1 2° 2 i 3* 3 i a 4 | st 5 6* 6 . 764 7 Enhanced Display at 8 Features oF 9 10* 0] at 1 Page Related 12% 12 A 3 DATA at 6 ast 28 2p . 16* 0 a 1 eZ?) [2 49% 3 20% 24 With Parity Check** 21% 25 With Parity check™* 22 28 [oO] Magazine RelatedDATA | *#* Row 30 23*30 0 [x] Service DATAPacket### is Store only 290 fap inChapter 6 25 ve002670 . Automatic erasable lines with RESET, CLEAR MEMORY or control bit C4 ** In 7-bit mode (register 1) the marking bytes are checked ODD parity and MSB is set to 0. Defective bytes are not tacked over in the page memory. Siemens Aktiengesellschaft 62

@ 8235605 0044214 071 MESIEG SDA 5248 ——— SIEMENS AKTIENGESELLSCHAF ————— _ T-52-33-47 Diagram 3 Page Memory Organization Line 25, Byte 0....9 Byte Data Bits ] | | D7 D6 DS D4 D3 \\D2 DI DO o [o_—«[HA Pus | PU2 Put PUO

1 PT3 PT2 PT1 PTO

2 0 0 mus [MU2 Muo 3 ojo [HA [C4 MT2 MT1 MTO 4 fo [o HA Hus [HU2 Hut HUO 5 [ooo |HA_|os HTO jojo Jo [wa loro [ce [ea ler 7 jo JoJo [Wa Jove [ors [ore on 8 [0 [rouno | MAG2 [MAGI |MAGO

9 PBLF 0 O oO 0

HA = — High, Hamming error found in corresponding column FOUND = Low, when a header has been found PBLF = _ High, page search in progress Page Number MAG = Magazine number 0 to 7 (000....111) PU = Page number units (0...9) PT = Page number tens (0...9) MU = Minutes units MT = Minutes ten usable as additional page sub HU = Hour units code HT = Hourten Control Bits C4 = erase page C7 = suppress header C5 = news flash C8 = update indicator C6 = subtitle C9 = interrupted sequence C10 = inhibit display C11 = serial magazine sequence C12, C13, C14 character set selection Siemens Aktiengesellschaft 63

4215 TOS MBSIEG

5bE D M@® 8235605 O04 chen ———— SIEMENS AKTIENGESELLSCHAF Diagram 5 Register Configuration 3 2 6s « 3 5 638s aig =Bigs> ° 3 g £38 238 Page's a e olk = 2 Zo - 8| g | 58 less sg g B : ge 8398 24g 22 & 3 pe = eglgsz| « £2 228 2 2 85 3 53 |285 Bers eg $8p 8283 8 § 8 / 88s 838 5 ke / g5 3 < e e °o 2 8} g | 8 |e88| 8] gle e ga // Fd a be 5 . . if . ; - $ a els8 wl owlow) owl owl ow) w . Ps/ge2| sleslegiezigsieelazig® a rr a 5 2 : 3 | g 2 or 8 3 5 8 H é ¢& ¢& é Siemens Aktiengeselischaft 64

SLE D MM 8235605 OO4421b 944 MESIEG ‘>DA 5248 HAF ——__ SIEMENS AKTIENGESELLSCHAF s T-52-33-47 Diagram 6 Register Configuration 3B ydg2e. 2eySe zy wBusedec3 fF a sf g£2ge3 SEg36 $2 gg ebeediged 8% 48293 23238 a? 23 B= Bg 855 E | 5 w w Z = & - |ea 8 S| 2] gz Bz | xe 3 E 38 2 = a 8 gs) 8 wy y 3 - s ge. bg - « Be 2 2 a ke ke by aw > | 3) 2 | ke Be | gs 3 3 |E |e ; fi & ge aE) @ /EB : 8 - | 88 B8 Bee] 8 eddie |s |g |- Hat w oe c = ne 8 38 ae | 42 | 8 a ° 3s 537 ea? | BE gs 3 ie Se 8H = z z Fs 83 3 22 See Fe as © 3 B55 eos oe giz |. |s € i] 83 @ S # ge | 18 9 e | « | 2 2 8 332 S52 ele |. |. Ie Je 8 ge | ge) 88 8/2 5 | 5 § | 3

8 Lg |g |

gee x2. [See o |y 85 2 ‘2 |z 5 338 | gee |zele8} 8/2 |; | Eg o! o o - = 2 + 6 oO oo e rz aa 5 8 5 3 BB 5 5 & 3 3 3 $2233 8 % 2228 Siemens Aktiengesellschaft 65

MB 8235605 0044217 880 MEBSIEG SUE D SDA 5248 SIEMENS AKTIENGESELLSCHAF Diagram 7 Register Configuration ora eo seer é e@eceece &&e2ee

3 SES PPE EE

gS 222: Bea Bo 8838 8 3 8 8

38 Fe Fe er FE

z zliz/zizlz|z 3 Be eiale ele e)e|s| _ 2 5 3 6 2 2 z E Siemens Aktiengeselischaft 66

SVE D MM 8235605 OOuNZL8 717 MMESIEG §— Jop2039-47 — SIEMENS AKTIENGESELLSCHAF ——___ Diagram 8.1 ‘ Character Set Selection Display of the Complete Character Set SDA 5248C1 | ‘ BBHARRRRABRRE i NIBBLEY 0 apa} t}otapaya) 1] fem 0 1 0 4 1 0 0 0 ° 1 1 |BIT6 jo | i _jaafsal es |e | 7 TF | joooo)o| tie | ea | (OSPF *pGe esi [Al OTR OSC ERS [207 [2] de | Sem _[** [ae | Peto) [t ea alee [oo] sete | ew R25) |S ss [S| ec) Joroo|é| te | sce FBS SRUcSaeRe Ss [0101 |s]resa| ene (Ma So) |B) [eal CEE) a |) & || [o710[6] ‘yer | "tren (a | Mivees cae fora] |More | ice | * |] Clad cg Bal | Celina Ca) [1900]a| ram | comea SRA | Fale Ho] ale [roo fo] i [re] |S 5 yh en | a A) [1010]af ee] Sepa PRC & | Me], lol =| Cal ea | [ora a[seeren] esc [tel SNC ac eae al © | ea) [1100 [mera] ene | SLC] eit] Te ee MS mai [cal x |G [ato fel 6 | game [ee )INGZ* nal 3] Z| | BBBB GERMAN E s I FB S IIIT N C T RE P TTIT G A A EL A L N Lo oNG ON

4321 Io I cI I

A v I A N (UED03396 (() Rest rte star ofeach ow (fama hes in sont crassn sareraor es oe ca ac ‘Comment: The random access t0 A, B and § can be done only when the language selection bits C12, C13, C14 are adjusted to the German language. Siemens Aktiengesellschaft 67

4321 A 0 HA S O

N oT KH = NT c AA R vooN ty) I A A T N ‘en02671 (1) Reset before the tart ofeach row (2) ls implemented le the contol character and rot just the flowig characters (9) These conto! characters have tobe trarsmited vio in succession implementation begins between conta characters 1 (4) Notimplemenied ‘ Comment: The random access to », B and § can be done only when the language selection bits C12, C13, C14 are adjusted to the German language. Siemens Aktiengeselischaft 68

SLE D @@® 8235605 0044220 375 MBSIEG SDA 5248 _____ SIEMENS AKTIENGESELLSCHAF 1-52-33-47 " Diagram 9 Graphic Characters Graphics mode is activated by contro! character (0001 OXXX). tee x x 0 arr 8 SETTLE Low NIBBLE 2/A 3/8 6 7 EC al le = ale a 2 FEED a oh i == ls ee ovo MS SS [ores = ie eee =e = Do [001 } a se" eee ee dei ele ee | [+16 [om Alin SS gg eS FE (| SSS ESE sem | zeM | Gem | ze || Gem | Zam | GoM | Zam 4321|X Siemens Aktiengesellschaft 69

SLE D M@®@ 82356 SDA 5248C1 STEMENS AKTIENGESELLSCHAF —— Diagram 10.1a National Character Set Selection Using the Transmitted Control Bits Bit 8 transmitted parity bit is reset to 0. The national characters in diagram 11 are implemented in the corresponding positions in diagram 10b. Trans- ‘Swedish Spanish |Dynamic Reserve j mitter Character |Redefinitio Control bits cre | i ors ee 1 A 1 Siemens English |German | Swedish French |Spanish |English English SDA 5248C1 7 _ ! ‘Siemens Aktiengeselischaft 70

SLE D M@®@ A23560S OO44222 148 MESTEG 1-52-33-47 SDA 5248C1 SIEMENS AKTIENGESELLSCHAF 1 Diagram 10.1b | Basic Character Set SDA 5248C1 . | rT, a YC eee ee Vora Lvowavag ERE ROR ZB OHS («| ee eenne eae Bee aE ee ee Oe He TE oe eee ee «< e «| + 7-7 Tc a — (UED02673- Basic character set (code: high nibble/low nibble for bit 8 = 0) NC = National Character (diagram 11) Siemens Aktiengeselischaft 71

S2E D) @® 82395605 O044e23 084 WBSIEG 1-52-33-47 SDA 5248C2

1 STEMENS AKTIENGESELLSCHAF

| Diagram 10.20 National Character Set Selection Using the Transmitted Control Bits Bit 8 transmitted parity bit is reset to 0 The national characters in diagram 11 are implemented in the corresponding positions in diagram 10b. i Trans- [English] Swedish | Italian Spanish |Dynamic | Reserve | mitter Character _ Redefinition) Control | bits __ | c12 {0 lio | 1 1 1 cw fo ff fo ft fo fo | Siemens |Polish {German |Scandi- |German|German |Serbo- | Czech- Romania SDA navian icroat Slovak 5248C2 _ _ _ Siemens Aktiengesellschaft 72

Sie ) mm A235605 0044224 TLIO mm™SIEG '-52~-33-47 SDA 5248C2 SIEMENS AKTIENGESELLSCHAF Diagram 10.2b Basic Character Set SDA 5248C2 a a a a COS ne Aas im |).hU6LeeEre Le ee eee a ee «| A A a A 7 ca eee sae Basic character set (code: high nibble/low nibble for bit 8 = 0) NC = National Character (diagram 11) Siemens Aktiengeselischaft 73

SLE DM 8235605 OON422S 957 MMSIEG SDA 5248C1 ——_——— _ SIEMENS AKTIENGESELLSCHAF T-52-33-47 Diagram 11.1a National Characters SDA 5248C1 (NC) German 23 2h 40S SSE SF EDV English 272 th SSK SSS OE Scandinavian Ww SBSH SSE SF KDE Fae asnsl ease Ttatian re French, Belgian 2h SSS SESE TH Spanish ee i a a Sa Si 003397 Siemens Aktiengesellschaft 74

SLE D MM 8235605 0044226 893 MBSIEG SDA 5248C2 SIEMENS AKTIENGESELLSCHAF = —-—W— Diagram 11.2a National Characters SDA 5248C2 (NC) German wk SBS SSE SF GOB MKS Polish 7 wh oS SSE SMEG) Czek-Stovak 2B SBS SSE SE GOB KE Romanian a a a, a a i 7 Scandinavian 2 yh SSE SSE BE Serbo-Croat 73h OSS B/D_TVE ‘ue002674 Siemens Aktiengesellschaft 75

SYED mm 8235b05 DONNe27 72T MSIEG | —— SIEMENS AKTIENGESELLSCHAF—— 152-33-47 Naeeat Characters SDA 5248C1 (NC) Fixed special characters ws 06 on 95 96 _ 97 Heese 6 0S oe ese tn ee a a a ARETE aa Hef) fA te FFD _ort a Seb J Siemens Aktiengeselischaft 76

SLE D MM 8235605 0044228 bbb MESIEG T-52-33-47 SDA 5248C2 ———_ SIEMENS AKTIENGESELLSCHAF Diagram 11.2b National Characters SDA 5248C2 (NC) Fixed special characters ss as a9 95969 RnR eaoog mw ss fo fh ff Fa hs nee tne Siemens Aktiengesellschaft 77

SLED M@ 8235605 0044229 ST2 mmSIEG 1-52-33-47 SDA 5248 SIEMENS AKTIENGESELLSCHAF Diagram 12 Display Timing re 40 ——~| Teletex Horizontal | | | Qis thereference in test circuit 3 RG, BY, BLAN Teletex Vertical | | 1 | 0 a Line Number 291 312 (354) (604) (624) Siemens Aktiengeselischaft 78

S3E ) mm 8235b05 cOWW230 214 mstEG | Oe SDA 5248 ~~ STENENS AKTIENGESELLSCHAF eS Diagram 13a Raster Change Frequency 50 Hz i zs os . sate -3J-3-2 $48 5m ae os = ws ~ -— ~ 2 s es a8

3 Ease as Psaek PFE

3 askoe SSk ee 25 composite sync = TCS contains line ° 3 3 - - a a ~ _ syne pulse equal- 2 é i 3 e 83] e 32 izing pulses and ry z 3 F Ss ” a — main pulses. a 3 é g - - - - - O, e, f are the ver- £ z 3 goo 4 4 ra] tical syne signals 3 s 5 #8 g E E ie with line numbers. Siemens Aktiengeselischatt 79

| wean aso mmstes 1523847 SIE D M@® 6235605 004 SDA 5248 i SIEMENS AKTIENGESELLSCHAF Diagram 13b Raster Change Frequency 60 Hz t t t -3 -2 -3 g | ~ * “ E = Lis ~ a i - oo § F} 3 sf ae § & E i 8 2 E Siemens Aktiengeselischaft 80

SIE ) M™ 8235605 oo44232 097 meSTEG ‘52-33-47 SDA 5248 —__ SIEMENS AKTIENGESELLSCHAF — Application Circuit VTX Modul (D-RAM Version) ee z 23 [] 88 de ULE 3h oh Allg gu tE8 eve Fs foe At ght ses ga. a] “ES 6S" 3] #8 = SC +4 mm. > zl elelstelelels]<)l-[-le]-[ele[.[-] a € iS] BsSsseze2= sles Lee r = a 2 g 8 Pay | eect uae + a ial = > yaya &3 3s : J TI deo. ie Jala] 8 ale] og ae “Boel al old ol al SIS) SI of AI - hss ‘TEP Soe _. Rg Rees ig BS SISSIS Fe £3 r 5: Jy T7334 BE ey 8] a ” : 3} 3) 3] s-S2y aS} seg 8 Siemens Aktiengesellschaft 81

233 T23 MESIEG T-52-33-47

SLE D @@ 82395605 0044 Son so48 ss STEMENS AKTIENGESELLSCHAF Layout / Plug-In Location Plan VTX - MODUL e@0000000 0 i, : 0200009009000 9, oS ©00, olog YT) y oop cfofolovle’ ? Z SDAS248 oor °° m0006000000000000000F ° 8. re ° fm Soococoocec]o x) oo 2 O=e\\0 0 120000 op ° ° 00000000680 ° soas21O O ° °o..°8 ooopoo Soo00e\\ ° 0 °°? ooo (-) 5 00 0G 0 09 00//0/0 we oo Gio —— ——a) oeo00000t © _ SIEMENS AG o00000000000 eso2677 Siemens Aktiengesellschaft 82

| SLED my 6235605 0044234 SLT MMSIEG T-52-33-47 | SDA 5248 Plug-in Location Plan Con Goze TEE) sone Tc1003 100nF HYB 514256 Ge) Co) 2 h, 18k 1,6nF za , id HAH en ral 1C1002 SOAS268 ‘00pF O— Bee 2k O-— %% O- i Ht BC 548 @ Toa Goes roe Th cr TT “CE HRRRREHAS S- = on 13.875MHz Tonk ft Zonk Bok pF O- ise ‘5uH Roos ont O— fxg eal Rroot oO- fess AZKR - Looe 1c1001 S0A5231 iS D D “ Coorg Soon ats wm uF Sent ine 2 Fn pid a@oulatanes ‘uF Laie) SHRBGS See ee ay ea Be GE] G— fe st4001 ‘2pole - i [| ‘UES02678- Siemens Aktiengesellschaft 83

Product Information

SDA5248 specifications and overview.

Summary

VIDEO PROCESSOR

Description

VIDEO PROCESSOR

Source title SDA5248 Datasheet(PDF) - Siemens Semiconductor Group

Related Parts

More parts from the same family.

Browse manufacturer