SCG4000 CONNOR-WINFIELD | Alldatasheet
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- 3.3V High Precision PLL Tri-State Capability Active Alarms Guaranteed Free Run ±20ppm 1 sec. Acquisition Time SCG4000 V3.0 Series Synchronous Clock Generators PLL
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Aurora, Illinois 60505 Phone: 630-851-4722 Fax: 630- 851- 5040 www.conwin.com Bulletin SG031 Page 1 of 12 Revision 01 Date 30 JUL Y 02 Issued By MBatts
Data Sheet #: SG031 Page 2 of 16 Rev: 01 Date: 07/30/02 © Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Model Comparison Table Table 1 Max CMOS LVPECL Model Input Duty Reference Output Oscillator Output Notes Ref Freq Cycle (Pin #7) (Pin #16 & 18) SCG4000 8-64 kHz 40/60 = Input Ref Freq. 125.0 MHz, 155.52 MHz Basic Model SCG4010 19.44 MHz 40/60 19.44 MHz 125.0 MHz, 155.52 MHz SCG4030 8-64 kHz 45/55 = Input Ref Freq. 125.0 MHz, 155.52 MHz Tighter Duty Cycle *Features which differentiate a model from the base model (SCG4000) are highlighted in boldface, color and in the notes column. Functional Block Diagram Figure 1 ALARM DETECTION Reference Input (Pin 4) DIVIDER DPFD ANALOG FILTER DIVIDER FREE RUN CONTROL Force Free Run (Pin 13) Select A (Pin 5) Select B (Pin 6) LOL Alarm Output (Pin 11) CMOS Reference Output (Pin 7) VCXO LOR Alarm Output (Pin 12) Differential LVPECL Outputs Q (Pin 18) QN (Pin 16) SCG4000 Series Block Diagram VCXO Enable (Pin 1) General Description The SCG4000 Series is a digital phase locked loop generating a LVPECL outputs from an intrinsically low jitter voltage controlled crystal oscillator. The LVPECL outputs may be disabled. The jitter attenuated internal reference, divided down from the output frequency, is also output to a pin. The SCG4000 Series can lock to one of four possible reference frequencies from 8 to 64 kHz, which is selectable using two input select pins. A filtered reference output signal is available at the same frequency. The unit has an acquisition time of about 1 second and it is tolerant of different reference duty cycles. Further features include alarm outputs for Loss-of- Reference (LOR) and Loss-of-Lock (LOL). During the LOR alarm, the SCG4000 will also enter a Free Run state, which will guarantee a 20 ppm accurate output. Additionally the Free Run mode may be entered manually. The alarms and reference output may be put into the tri-state high impedance condition for external testing purposes. The maximum package dimensions are 1” x 1.025” x .450” on a 6 layer FR4 board with castellated pins. Parts are assembled using high temperature solder to withstand 63/37 alloy, 180° C surface mount reflow processes.
Data Sheet #: SG031 Page 3 of 16 Rev: 01 Date: 07/30/02 © Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice NOTES: 1.0: Requires external regulation and filter (22uF , 330 pF) 2.0: From a 20 ppm offset in reference frequency 3.0: 50Ω load biased to 1.3V 4.0: Offset between Reference Input and Reference Output @ room temp. 5.0: Offset change between Reference Input and Reference Output over temperature range from room temperature. Absolute Maximum Rating Table 2 All SCG4000 Models Symbol Parameter Minimum Nominal Maximum Units Notes Vcc Power Supply Voltage 3.0 3.6 Volts V1 Input Voltage -0.5 5.5 Volts Ts Storage Temperature -65 150 deg. C CMOS Input And Output Characteristics Table 5 All SCG4000 Models Symbol Parameter Minimum Nominal Maximum Units Notes VIH High Level Input Voltage 2 5.5 V VIL Low Level Input Voltage 0 0.8 V TIO I/O to Output Valid 10 nS C O Output Capacitance 10 pF VHO High Level Output Voltage loh = 04mA 2.4 Vcc Min. VIO Low Level Output Voltage lo1 = 8mA 0.4 Vcc Max. TIR Input Reference Signal Pulse Width 12.5 nS Operating Specifications Table 3 All SCG4000 Models Symbol Parameter Minimum Nominal Maximum Units Notes Vcc Power Supply Voltage 3.135 3.3 3.465 Volts 1.0 Icc Power Supply Current - 230 280 mA To Temperature Range 0 - 70 °C Ffr Free Run Accuracy -20 - 20 ppm Fcap Capture/pull-in range -25 - 25 ppm Fbw Jitter Filter Bandwidth - - 10 Hz Tjtol Input Jitter Tolerance - - 31.25 µs SCG4000, SCG4030 - - 1.0 µs SCG4010 Taq Acquisition Time - 1 - s 2.0 Trf Output Rise and Fall Time (20% 80%) 100 225 350 ps 3.0 Table 4 All SCG4000 Models Parameter Specifications Notes Alarms LOR, LOL Status on seperate CMOS Outputs TDEV 70 ps (typical) MTIE 800 ps (typical) Static Offset ± 26 ns Maximum 4.0 Dynamic Offset ± 20 ns Maximum 5.0 VCXO Output Logic Type LVPECL Reference Output Logic Type CMOS
Data Sheet #: SG031 Page 4 of 16 Rev: 01 Date: 07/30/02 © Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Output Jitter Specifications Table 7 All SCG4000 Models Jitter BW 10 Hz - 20 MHz SONET Jitter BW 12 kHz - 20 MHz Frequency (MHz) pS (RMS) m UI pS (RMS) m UI 125.00 6(typical) 0.750 (typical) 1 (max), 0.3 (typical) 0.125(max) 155.52 6(typical) 0.933 (typical) 1 (max), 0.4 (typical) 0.156 (max) Output Programming Table 8 All SCG4000 Models Tristate Free Run Output 0 0 Locked to reference selected (default)
1 X Hi-Z Tristate condition
0 1 Free run at nominal frequency Alarm Status Table 9 All SCG4000 Models LOL Output LOR Output Alarm Output 0 0 No alarm 1 0 Loss-of-Lock X 1 Loss-of-Reference LVPECL Output Characteristics Table 6 All SCG4000 Models Symbol Parameter Minimum Nominal Maximum Units Notes VOH High Level PECL Voltage 2.27 2.34 2.42 V VOL Low Level PECL Voltage 1.49 1.51 1.68 V C L Output Capacitance 10 pF TSKEW Differential Output Skew 50 ps Pin Description Table 10 All SCG4000 Models Pin # Connection Description
1 Enable/Disable Enable = 0, Disable = 1 for VCXO Ouputs, Default = 0 (for No Connect)
2 TCK JTAG pin that is used only by Connor-Winfield for programming. Do not connect 3 TDO JTAG pin that is used only by Connor-Winfield for programming. Do not connect
4 Reference In CMOS Reference Frequency Input
5 Select A Ref erence Frequency Select Pin, Default = 0 (for No Connect)
6 Select B Ref erence Frequency Select Pin, Default = 0 (for No Connect)
7 Reference Out Filtered Reference Output
8 Ground Power Ground
9 Tri-State Enable CMOS Output Tri-State enable (Hi-Z =1, Default = 0)
10 V CC 3.3V Supply Voltage.
11 Loss of Lock LOL Alarm Output
12 Loss of Reference LOR Alarm Output
13 Free Run Force output frequency to Free Run (FR = 1, Default = 0)
14 TDI JTAG pin that is used only by Connor-Winfield for programming. Do not connect 15 TMS JTAG pin that is used only by Connor-Winfield for programming. Do not connect
16 VCXO Out VCXO differential LVPECL Output
17 Signal Ground VCXO output ground (Shield)
18 VCXO Out VCXO differential LVPECL Output
Data Sheet #: SG031 Page 8 of 16 Rev: 01 Date: 07/30/02 © Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Alarm Timing Diagram Figure 8 LOL Output Phase Detector External Reference Internal Reference LOR Output 4 2 2 2 2 2 2 2 2 2 2 2 2 2 2 Start-up Region Start-up Region LOL Output Phase Detector External Reference Internal Reference LOR Output 22222 222 2 2 11 1 1 2 2 1 1 2 2 19.44 MHz &77.76 MHz Reference Input Units 8 kHz Reference Input Units < 31.25 µsec 31.25 µsec > 31.25 µsec < 1 µsec > 1 µsec 1 µsec2 4 125 µsec wide rangeLOR is active when LOL is active 5 Minimum pulse width = 2 µsec Minimum pulse width = 62.5 µsec During Start-up, The LOL Alarm will pulse during the first second of operation
Data Sheet #: SG031 Page 10 of 16 Rev: 01 Date: 07/30/02 © Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice SCG4000 SCG4000 Individual Features: Four selectable References: 8, 16, 32, and 64 kHz. LVPECL Oscillator Output: 125.0 MHz or 155.52 MHz CMOS reference output frequency equals input reference frequency. The SCG4000 is Connor-Winfield’s base model for the SCG4000 Series product line. The SCG4000 can lock to one of four input reference frequencies from 8 to 64 kHz which is selectable using two input control pins. Input Reference Selection Table 11 SCG4000 Input Sel A Input Sel B Reference Frequency (Pin #5) (Pin #6) (Pin #8) 0 0 8 kHz (default) 1 0 16 kHz 0 1 32 kHz 1 1 64 kHz Reference and Output Availability Table 12 SCG4000 LVPECL CMOS Input Reference Oscillator Output Reference Output (Pin #4) (Pin #16 & #18) (Pin #7) 8 kHz 125.0 MHz 8 kHz 8 kHz 8 kHz 16 kHz 155.52 MHz 16 kHz 32 kHz 32 kHz 64 kHz 64 kHz
Ordering Information
SCG4000-125.0M SCG4000-155.52M
Data Sheet #: SG031 Page 11 of 16 Rev: 01 Date: 07/30/02 © Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice SCG4010 SCG4010 Individual Features: Input Reference: 19.44 MHz LVPECL Oscillator Output: 125.0 MHZ or
155.52 MHz
CMOS Reference Output: 19.44 MHz The SCG4010 only accepts a 19.44 MHz input while providing a phase locked LVPECL output. Also provided is a phase locked 19.44 MHz CMOS reference output. Input Reference Selection Table 13 SCG4010 Input Sel A Input Sel B Reference Frequency (Pin #5) (Pin #6) (Pin #8) X X 19.44 MHz (default) Note: X= Don’t Care Reference and Output Availability Table 14 SCG4010 LVPECL CMOS Input Reference Oscillator Output Reference Output (Pin #4) (Pin #16 & #18) (Pin #7) 19.44 MHz 125.0 MHz, 155.52 MHz 19.44 MHz SCG4010-125.0M SCG4010-155.52M
Data Sheet #: SG031 Page 12 of 16 Rev: 01 Date: 07/30/02 © Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice SCG4030 SCG4030 Individual Features: Four selectable References: 8, 16, 32, and 64 kHz. 45/55 Duty cycle LVPECL Oscillator Output: 125.0MHz or 155.52 MHz CMOS reference output frequency equals input reference frequency. The SCG 4030 is similar to the SCG4000 except the SCG4030 offers a duty cycle of 45/ 55 for applications that require a tighter duty cycle. The SCG4030 can lock to one of four input reference frequencies from 8 to 64 kHz which is selectable using two input control pins. Input Reference Selection Table 15 SCG4030 Input Sel A Input Sel B Reference Frequency (Pin #5) (Pin #6) (Pin #8) 0 0 8 kHz (default) 1 0 16 kHz 0 1 32 kHz 1 1 64 kHz Reference and Output Availability Table 16 SCG4030 LVPECL CMOS Input Reference Oscillator Output Reference Output (Pin #4) (Pin #16 & #18) (Pin #7) 8 kHz 125.0 MHz 8 kHz 8 kHz 8 kHz 16 kHz 155.52 MHz 16 kHz 32 kHz 32 kHz 64 kHz 64 kHz SCG4030-125.0M SCG4030-155.52M
Data Sheet #: SG031 Page 13 of 16 Rev: 01 Date: 07/30/02 © Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Data Sheet #: SG031 Page 14 of 16 Rev: 01 Date: 07/30/02 © Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Data Sheet #: SG031 Page 15 of 16 Rev: 01 Date: 07/30/02 © Copyright 2002 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Aurora, Illinois 60505 Phone: 630-851-4722 Fax: 630- 851- 5040 www.conwin.com Revision Revision Date Note 00 6/14/02 Final Product Release 01 7/30/02 Advanc ed to V3.0