SCG3040 CONNOR-WINFIELD | Alldatasheet

Document overview

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Technical content

Features

  • 3.3V High Precision PLL  Two Differential LVPECL Outputs.

155.52 MHz or

77.76 MHz

 19.44 MHz CMOS Input Reference  Reference Duty Cycle Tolerant  Low Temperature Reflow Surface Mounting SCG3040 Synchronous Clock Generator PLL

2111 Comprehensive Drive

Aurora, Illinois 60505 Phone: 630-851-4722 Fax: 630- 851- 5040 www.conwin.com Bulletin SG033 Page 1 of 12 Revision P02 Date 22 NOV 04 Issued By MBatts

Data Sheet #: SG033 Page 2 of 12 Rev: P02 Date: 11/ 22 / 04 © Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Absolute Maximum Rating Table 1 Symbol Parameter Minimum Nominal Maximum Units Notes VCC Power Supply Voltage -0.5 4 Volts 1 VI Input Voltage -0.5 5.5 Volts 1 TS Storage Temperature -65 150 deg. C 1 General Description The SCG3040 is a mixed signal phase locked loop generating 77.76 MHz or 155.52 MHz Dual LVPECL outputs from an intrinsically low jitter voltage controlled crystal oscillator. The SCG3040 is phase locked to an external 19.44 MHz reference input. The SCG3040 is ideal for applications using multiplication to obtain Functional Block Diagram Figure 1 Filter LVPECL Driver Low Jitter VCXO Divider REF QN1 QN2 higher SONET frequencies. The package dimensions are 0.75" x 1.25" x .45" on a 6 layer, designed impedance, FR4 board with castellated pins. Parts are assembled using high temperature solder to withstand surface mount reflow processes. See Fig. 4 for the solder profile.

Data Sheet #: SG033 Page 3 of 12 Rev: P02 Date: 11/ 22 / 04 © Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Recommended Operating Specifications Table 2 Symbol Parameter Minimum Nominal Maximum Units Notes VCC Power Supply Voltage 3.135 3.3 3.465 Volts 2, 9 ICC Power Supply Current - - 270 mA 5, 6 TOP T emperature Range 0 - 70 deg. C FO Available Output Frequencies Q1,Q2 77.76 - 155.52 MHz FREF Reference Frequency - 19.44 - MHz FCAP Capture/Pull-in Range -25 - 25 ppm FBW Jitter Filter Bandwidth - 8 15 Hz 3 TJT OL Input Jitter T olerance - - 31.25 us (Input Jitter Frequencies > 10 Hz) TAQ Acquisition Time - 100 - ms 4 JGEN Jitter Generation Q1,Q2 - - 1 ps RMS 7 Input And Output Characteristics Table 3 Symbol Parameter Minimum Nominal Maximum Units Notes CMOS Input Characteristics VIH High Level Input Voltage 2 - 5.5 V VIL Low Level Input Voltage 0 - 0.8 V TIR Input Reference Pulse Width 12.5 - - nS TIRF Input Rise and Fall Time (20% to 80%) - - 5 nS 8 LVPECL Output Characteristics VOH High Level Output Voltage 2.27 2.34 2.52 V 5 VOL Low Level Output Voltage 1.49 1.51 1.68 V 5 CL Output Capacitance - - 10 pF TSKEW Differential Output Skew - 50 - ps 5 TRF Output Rise and Fall Time (20% to 80%) - - 1 ns 5 D C D u t y C y c l e 4 55 05 5% 5 NOTES: 1: Operation of the device at these or any other condition beyond those listed under Recommended Operating Specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods of time may affect device reliability. 2: Requires e xternal regulation and supply decoupling. (22uF, 330 pF) 3: 3dB loop response. 4: From a 20 ppm step in reference frequency. 5: With L VPECL termination as defined by figure 8 (Z O = 50 Ω). 6: Maximum ICC tested at VCC = 3.46V 7: Jitter based on SONET OC-48 bandwidth ( 12 kHz - 20 MHz). 8: Avoid meta-stable input signals 9: Vcc ramp rate must be monotonic rising. Ramp must be greater than 300 V/s from 2V to 3V .

Data Sheet #: SG033 Page 4 of 12 Rev: P02 Date: 11/ 22 / 04 © Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Pin Description Table 4 Pin # Connection Description

1 N/C Do Not Connect or Route Through

2 REF CMOS Input Reference

3 TDO JTAG pin that is used only by Connor-Winfield for programming. Do not connect

4 GND Ground

5 QN1 Negative LVPECL Differential Output

6 Q1 Positive LVPECL Differential Output

7 V CC Supply Voltage Relative to Ground

8 GND Ground

9 N/C Do Not Connect or Route Through

10 N/C Do Not Connect or Route Through

11 Q2 Positive LVPECL Differential Output

12 QN2 Negative LVPECL Differential Output

13 GND Ground

14 GND Ground

15 V CC Supply Voltage Relative to Ground

16 TDI JTAG pin that is used only by Connor-Winfield for programming. Do not connect 17 TCK JTAG pin that is used only by Connor-Winfield for programming. Do not connect 18 TMS JTAG pin that is used only by Connor-Winfield for programming. Do not connect

19 GND Ground

20 N/C Do Not Connect or Route Through

Data Sheet #: SG033 Page 6 of 12 Rev: P02 Date: 11/ 22 / 04 © Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Tape and Reel Dimensions Figure 5

Data Sheet #: SG033 Page 8 of 12 Rev: P02 Date: 11/ 22 / 04 © Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Recommended L VPECL Termination Figure 8 NOTES: 8: Q & QN are differential open emitter outputs SCGxxx LVPECL OUTPUT Q QN Vcc GND

50 OHM Transmission Line

3.3 VDC

D DN Vcc GND Vcc 2 VDC Q QN Vcc GND LVPECL INPUT D DN Vcc GND 130 D DN Vcc GND Q QN Vcc GND Vcc 2 VDC 100

50 OHM Transmis sion Line

Data Sheet #: SG033 Page 11 of 12 Rev: P02 Date: 11/ 22 / 04 © Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Revision Revision DateNote P00 2/5/02 Preliminary Informational Release P01 11/22/02 Revised Mechanical Drawing P02 11/22/04 Added new frequency, 77.76 MHz

Ordering Information

XXXX equals a specific model (3040) FFF.FFF equals the Oscillator Output frequency (077.76, 155.52) M equals MHZ and is added to all part numbers Example: To order an SCG3040 with a dual LVPECL Output of 155.52 MHz, Order part number SCG3040-155.52M Please contact Connor-Winfield for other frequencies that may be available.

Aurora, Illinois 60505 Phone: 630- 851- 4722 Fax: 630- 851- 5040 www.conwin.com