SCA3100-D04-1 VTI | Alldatasheet
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Doc.Nr. 8257300A.07 Product Family Specification SCA3000 Series 3-axis accelerometer
1 General Description
1.1 Introduction
ASIC packaged into a plastic Molded Interconnection Device package (MID). A block diagram of the SCA3000 product family is presented in Figure 1 below. Figure 1. SCA3000 Block Diagram. specification for an individual sensor is available in the corresponding data sheet.
1.2 Functional Description
1.2.1 Sensing element
robust, stable and low noise & power capacitive sensors. compared to the conventional orthogonal X,Y,Z coordinate system.
1.2.2 Interface IC
generate an interrupt when a pre-defined condition has been met.
1.2.3 Factory calibration
volatile memory during sensor startup.
1.2.4 Supported features
Features supported by individual SCA3000 products are listed in Table 1 below. Table 1. SCA3000 devices’ summary.
1.2.5 Operation modes
1.2.5.1 Measurement
resolution depends on the product type (see Table 1).
1.2.5.2 Motion Detection
the detected direction can be read out from the corresponding status register. Normal acceleration information is not available in MD mode.
1.2.6 Free-Fall Detection
on the individual product. Normal acceleration information is available when the FFD is enabled.
1.2.7 Interrupt
The SCA3000 has a dedicated output pin (INT) to be used as the interrupt for the master controller. Interrupt conditions can be activated and deactivated via the SPI or I2C bus. Once the interrupt has happened, the interrupt source can be read out from the corresponding status register.
1.2.8 Temperature output
Some SCA3000 products provide 9-bit temperature information via the serial interface. See Table 1 for detailed product information.
1.2.9 Output ring buffer
In those applications where real time acceleration information is not needed, the ring buffer memory can be used to buffer accele ration data. This will release µC resources for other tasks or for example, to offer a power saving mode while SCA3000 samples acceleration data into its buffer memory. Acceleration data is sampled at a constant sample rate by the sensor. The buffer is a FIFO type (First In First Out) where the ol dest data is shifted out first. It has separate read and write address pointers, so it can be read and written simultaneously. If the buffer overflows, the oldest data is lost and the new data replaces the oldest samples. Ring buffer logic can be configured to give an in terrupt when the buffer is ½ or ¾ full. The entire ring buffer content can be read by one read sequence.
2 Reset and power up, Operation Modes, HW functions and Clock
2.1 Reset and power up
The SCA3000 has an external active low reset pin. Power supplies must be within the specified range before the reset can be released. After releasing the reset, the SCA3000 will read configuration and calibration data from the non- volatile memory to volatile registers. Then th e SCA3000 will make a check sum calculation to the read memory content. The STATUS register's CSME-bit="0" shows successful memory read operation.
2.2 Measurement Mode
2.2.1 Description
The SCA3000 enters the measurement mode by def ault after power-on and the CV-converter will start to feed data to the signal channel (Figure 1). Data will be reliable in the output registers after the product specific turn-on time. The SCA3000 can also be set to optional me asurement modes. See component specific data sheets for detailed functional parameters in a ll measurement modes. All available measurement modes for the SCA3000 are described in Table 2 below.
Table 2. Available measurement modes for SCA3000.
2.2.1.1 Bypass measurement mode
2.2.1.2 Narrow band measurement mode
a result of a narrower signal bandwidth, the noise level is lower.
2.2.1.3 Wide band measurement mode
widened. As a result of a wider measurement bandwidth, the noise level is higher.
2.2.2 Usage
register to "010" or "001". See section 3.4 for MODE register details. interface. See section 3.3 for output register details.
2.2.2.1 Overflow condition
bits [B7, B6, B5]. If bits [B7, B6, B5] are ‘011’ or ‘100’, data overflow has occurred (see Table 3). This applies for all acceleration output registers (X_LSB … Z_MSB and BUF_DATA). Table 3. Overflow bit patterns in acceleration data registers (X_LSB … Z_MSB and BUF_DATA).
for SCA3000-D0x and SCA3000-E0x are presented. Table 4. Maximum and minimum values in the SCA3000 measuring range.
2.3 Motion Detection Mode
2.3.1 Description
comparator and a configurable trigger function. 0.05 Hz …1 Hz. See Figure 2 below. Figure 2. The MD band-pass filter's frequency response.
each step and axis is not the same, see section 3.4 for threshold level details.
- Any sensing direction can be configured to trigger the interrupt (OR condition).
- Any sensing direction can be configured to be required to trigger the interrupt (AND condition).
Figure 3. Motion detector operation.
2.3.2 Usage
interrupt functionality details.
2.3.3 Examples
- Write "00 000011" (0 3h) into the MODE re gister (en able motion dete ction mod e,
- Acceleration data is not available when the SCA3000 is in motion detection mode.
- The INT-pin is activated when motion is detected, see se ction 2.7 for detailed INT-pin
- Write "0 0000011" (03h) into MODE regi ster (enable m otion dete ction mode ,
- Write "00000000" (00h) into UNLOCK register
- Write "01010000" (50h) into UNLOCK register
- Write "10100000" (A0h) into UNLOCK register
- Write "00000010" (02h) into CTRL_SEL register (to select indirect MD_CTRL register)
- Write "00 000011" (0 3h) i nto CTRL_ DATA r egister (this data i s written into MD_CTRL
- Acceleration data is not available when the SCA3000 is in motion detection mode
- The INT -pin is activated when motion is det ected in the X- or Y-axis directi on (Z -axis
direction is ignored), see section 2.7 for detailed INT-pin information.
2.4 Free-Fall Detection
2.4.1 Description
Figure 4. Free Fall condition.
2.4.2 Usage
interrupt functionality details.
2.4.3 Example
- Write "00010000" (10h) into the MODE register (enable free fall detection, FFD_EN = '1')
- Acceleration data can be read normally
- INT-pin is a ctivated whe n free fall is det ected, see se ction 2 .7 for detailed INT-pi n
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2.5 Ring Buffer
2.5.1 Description
The SCA3000's Ring Buffer is a 192 acceleration data samples long (64 samples of 11 bit three axis data) internal memory to relax the real-time operation requirements of the host processor. The following parameters are configurable: 1. Each measurement axis can be individually disabled. If measurement data from e.g. Y-axis is not needed, available memory can be used for X- and Z-axis data. 2. Buffer data length can be changed from 11 to 8 bits. In 8-bit mode, data can be read out using shorter read sequence. 3. Ring buffer's input sample rate can be the same as the sensor's data rate or divided by 2 or 4. When the divider is e.g. 2, only every 2nd acceleration data will be stored. 4. The Interrupt condition, when enabled, can be selected between two: interrupt in INT-pin occurs when the buffer is 50% or 75% full.
2.5.2 Usage
The ring buffer can be enabled by setting BUF_EN bit in MODE register to "1". After enabling the buffer, acceleration data can be read from BUF_DA TA register using decrement register read, 2C interface. Each measurement axis can be individually disabled by setting corresponding bits in BUF_X_EN, BUF_Y_EN and BUF_Z_EN in OUT_CTRL register to "0". Output data length can be changed from 11 bits to 8 bits by setting bit BUF_8BIT in MODE register to "1". See section 3.3 for bit level descriptions. The count of available data samples in output ri ng buffer can be read from BUF_COUNT register. Register value is updated only when it is accessed over the SPI or I2C. Data shift out order is X,Y,Z. In 11 bit mode two bytes must be read to get all 11 bits out. In that case, the MSB byte is 1st. Examples: 1. 11 bits data length, X&Y&Z axis enabled: X1_MSB, X1_LSB, Y1_MSB, Y1_LSB, Z1_MSB, Z1_LSB, X2_MSB, X2_LSB, ... latest Z_LSB 2. 11 bits data length, Y&Z axis enabled: Y1_MSB, Y1_LSB, Z1_MSB, Z1_LSB, Y2_MSB, Y2_LSB, Z2_MSB, Z2_LSB, Y3_MSB, Y3_LSB, ..., latest Z_LSB 3. 8 bits data length, all axis enabled: X1, Y1, Z1, X2, Y2, Z2,..., latest Z 4. 8 bits data length, X&Z axis enabled: X1, Z1, X2, Z2, X3, Z3, ..., latest Z 5. 8 bits data length, Z axis enabled: Z1, Z2, Z3, ... , latest Z See section 2.7 for interrupt functionality details. Acceleration data is available in X_LSB, X_MSB, Y_LSB, Y_MSB, Z_LSB and Z_MSB when the ring buffer is enabled.
2.5.2.1 Overflow condition
Overflow is detected from data ring buffer in same way as from the output registers. See section 2.2.2.1 for details.
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2.5.3 Examples
A simple example of output ring buffer usage: 1. Write "10000000" (C0h) into MODE register (enable output ring buffer, BUF_EN = '1') 2. Acceleration data can be read normally 3. INT-pin is activated when buffer is ½ full, see section 2.7 for detailed INT-pin information. In the n ext example, the output Ring Buffer is conf igured to sample only the Z-axis acceleration data with 8 bit resolution and red uced data rate (only every second sample is stored into output ring buffer). In addition, the SCA3000 is configured to give an interrupt when the output ring buffer is ¾ full: 1. Write "11000000" (C0h) into the M ODE register (enable output ring buffer, BUF_EN = '1', set data length to 8 bits, BUF_8BIT = '1') 2. Write "00000000" (00h) into UNLOCK register 3. Write "01010000" (50h) into UNLOCK register 4. Write "10100000" (A0h) into UNLOCK register 5. Write "00001011" (0Bh) into CTRL_SEL register (to select indirect OUT_CTRL register) Unlock sequence for register lock 6. Write "0 0000101" (03h ) in to CT RL_DATA regi ster (this data i s written into OUT_CTRL register, store Z-axis data, BUF_Z_EN = '1', divide data rate by 2, BUF_RATE = '01') 7. Write " 10000001" (81h) i nto INT_MASK regi ster (set buffer i nterrupt level to ¾ full, BUF_F_EN = '1', set INT-pin to active high, INT_ACT = '1') 8. Acceleration data can be read normally for all axis and with full resolution. The buffer data can be read from BUF_DATA register 9. INT-pin is activated when the output ring buffer is ¾ full of Z-axis accele ration data, se e section 2.7 for detailed INT-pin information.
2.6 Temperature measurement
2.6.1 Usage
Nine bit tem perature information is av ailable in the TEMP_MSB and TEMP_LSB registe rs, if the feature is enabled in the product (see Table 1). The TEMP_MSB register must be read before the TEMP_LSB register in order to g et valid tempe rature data. Registers are updated with the latest temperature data when accessed. See section 3.3 for register details. The temperature registers’ typical output at +23 °C is 256 counts and a 1 °C change in temperature typically corresp onds to a 1.8 LSB chang e in the SCA3000 tempe rature output. Tem perature information is converted to [°C] as follows Equation 1 C LSB LSBTempCCTemp dec −+°=° 8.1 25623 where Temp[°C] is temperature in Celsius and Tempdec is the tem perature fro m TEMP_MSB and TEMP_LSB registers in decimal format.
2.7 Interrupt function (INT-pin)
2.7.1 Usage
The Motio n Detector a nd Free Fall Detector will gene rate a n interrupt t o INT-pin when the corresponding function is enabled and the interrupt condition is met. The SCA3000's ring buffer will generate an interrupt wh en interrupt function ality has bee n ena bled. Setting BUF_F _EN bit in INT_MASK register "1" results in interrupt when the regis ter is 75% full. Setting BUF_H_E N bit in INT_MASK register "1" results in interrupt when the register is 50% full. Setting INT_ALL bit in INT_MASK register will mask all interrupts.
VTI Technologies Oy 14/ 43 The interrupt polarity (active high/low) can be configured with INT_MASK register's INT_ACT bit. Once the interrupt has happened, the INT_STATUS register must be read to acknowledge the interrupt. 1. If at least one of MD bits in INT_STATUS register is "1", motion has been detected. 2. If FFD bit in INT_STATUS register is "1", free-fall has been detected. 3. If BUF_FULL bit is "1", Ring Buffer is 75% fu ll. Correspondingly, if BUF_HALF is "1", the Ring Buffer is 50% full. See section 3.3 for INT_STATUS register details.
2.8 Clock
The SCA3000 has an internal factory trimmed oscillator and clock generator. Internal frequencies vary product by product.
3 Addressing Space
3.1 Register Description
The SCA3000 addressing space is presented in Table 5 below. Table 5. List of registers.
VTI Technologies Oy 16/ 43 Addr. Name Description Mode (R, W, RW, IA) Reg. type Locked 21h INT_MASK HW interrupt mask register (configures the operation of INT-pin): - interrupt when output buffer is ¾ full (enable / disable) - interrupt when output buffer is ½ full (enable / disable) - mask all interrupts on INT-pin (enable / disable) - INT-pin activity (INT active low / INT active high) RW, NV Conf 22h CTRL_DATA Data to/from register which address is in CTRL_SEL (18h) register RW, NV, IA Conf x 23h ... 3Fh Reserved - Add. is the register address in hex format. RW – Read / Write register, R – Read-only register, NV – Register mirrors NV-memory data (NV = non-volatile). IA – indirect addressing used. Registers whose read and write access is blocked by register lock is marked in "Locked" column.
3.2 Non-volatile memory
The SCA3000 has an internal non-volatile memory for calibration and configuration data. Memory content will be programmed during production and is not user configurable. Initial configuration values can be found in the following section 3.4.
3.3 Output Registers
The SCA3000 output registers (marked with 'Output' in Table 5) contents and bit definitions are described in this section. Output registers c ontain information of measured acceleration and temperature as well as information of the operating state and interrupts of SCA3000. When reading the output values an MSB register must be read first because MSB register reading latches the data in to all other acceleration output registers Address: 04h Register name: X_LSB, X-axis LSB frame Bits Mode Initial Value Name Description 7:0 R 00h DATA X-axis LSB frame Address: 05h Register name: X_MSB, X-axis MSB frame Bits Mode Initial Value Name Description 7:0 R 00h DATA X-axis MSB frame Address: 06h Register name: Y_LSB, Y-axis LSB frame Bits Mode Initial Value Name Description 7:0 R 00h DATA Y-axis LSB frame
acceleration the output is ideally 00h. Table 6. Bit level description for acceleration registers of SCA3000-D01 and SCA3000-D02. Table 7. Bit level description for acceleration registers of SCA3000-E01 and SCA3000-E02.
Table 8. Bit level description for acceleration registers of SCA3000-E04. Table 9. Bit level description for acceleration registers of SCA3000-E05. Table 10. Bit level description for temperature registers [TEMP_MSB … TEMP_LSB].
VTI Technologies Oy 19/ 43 Address: 15h Register name: BUF_COUNT, output ring buffer status Bits Mode Initial Value Name Description 7:0 R 00h COUNT Count of available data samples in output ring buffer, for more information see section 2.5.2. Address: 16h Register name: INT_STATUS, interrupt status register (all interrupts that are available in current operation mode) Bits Mode Initial Value Name Description
7 R 0 BUF_FULL Output ring buffer is ¾ full
1 – Ring buffer is ¾ full 0 – Ring buffer is not full
6 R 0 BUF_HALF Output ring buffer is ½ full
1 – Ring buffer is ½ full 0 – Ring buffer is not full 5:4 Reserved
3 R 0 FFD Free-fall detection
1 – Free-fall detected (0 g acceleration) 0 – Free-fall not detected 2:0 R 000 MD Motion detector triggered channel indication 1xx – Trigger on Y-axis x1x – Trigger on X-axis xx1 – Trigger on Z-axis
3.4 Configuration Registers
SCA3000 configuration register (m arked with 'Conf' in Table 5) contents and bit definitions are described in this section. Configuration registers are used to configure SCA3000 operation and the operation parameters. Address: 00h Register name: REVID, ASIC revision ID number tied in metal Bits Mode Initial Value Name Description 7:4 R 2h REVMAJ Major revision number 3:0 R 1h REVMIN Minor revision number Address: 02h Register name: STATUS, status register Bits Mode Initial Value Name Description 7:6 Reserved
5 R 0 LOCK Status of lock register
0 – Lock is closed 1 – Lock is open 4:2 Reserved
1 R 0 CSME EEPROM checksum error
1 – EEPROM checksum error 0 – No error 0 R 0 SPI_FRAME SPI frame error. Bit is reset, when next correct SPI frame is received (only for products with SPI bus). 1 – SPI frame error 0 – No error
VTI Technologies Oy 20/ 43 Address: 14h Register name: MODE, operation mode selection Bits Mode Initial Value Name Description
7 RW 0 BUF_EN Output ring buffer
1 – Enabled 0 – Disabled (Buffer in power down)
6 RW 0 BUF_8BIT Output ring buffer data length
1 – Ring buffer is read in single 8 bit frame per stored axis (8 bit mode) 0 – Ring buffer is read in two 8 bit frames per stored axis (11 bit mode). Unused bits are set to 0.
5 Reserved
4 RW 0 FFD_EN Free-fall detection
1 – Enabled 0 – Disabled (detection in power down)
3 Reserved
2:0 RW 000 MODE_BITS Selects SCA3000 series operation mode 000 – Normal measurement mode 010 – Optional measurement mode 1 (see Table 2) 001 – Optional measurement mode 2 (see Table 2) 011 – MD, Motion Detector Other combinations are reserved Address: 17h Register name: I2C_RD_SEL, register address for I2C read operation Bits Mode Initial Value Name Description 7:0 W 00h ADDR Address of register to be read via I2C. Register is used only for I2C read access. Address: 18h Register name: CTRL_SEL, Control register selector, UNLOCK REQUIRED Bits Mode Initial Value Name Description 7:5 RW 000 Reserved 4:0 RW 00000 SELECT Indirect control registers, select register address for read / write access: 00001 – I2C_DISABLE 00010 – MD_CTRL (Motion Detector control) 00011 – MD_Y_TH (Motion Detector Y- threshold) 00100 – MD_X_TH (Motion Detector X- threshold) 00101 – MD_Z_TH (Motion Detector Z- threshold) 01011 – OUT_CTRL (Output control) Other combinations are reserved CTRL_SEL register works as an address pointer for registers listed below. When this register is written the content of selected register is available for reading/writing from/to register CTRL_DATA.
VTI Technologies Oy 21/ 43 Address value: 00010 Register name: MD_CTRL, Motion Detector control (Indirect access via CTRL_SEL) Bits Initial Value Name Description Note 7:6 Reserved 5 0 REQ_Z 1 – Require trigger on Z-channel 0 – Not required 4 0 REQ_X 1 – Require trigger on X-channel 0 – Not required 3 0 REQ_Y 1 – Require trigger on Y-channel 0 – Not required Bits 5:3 can be used to build logical AND operation between channels. Example: X and Y = Require X and Y, ignore Z → 00 011 011 2 1 EN_Z 1 – Enable trigger on Z-channel 0 – Not required 1 1 EN_X 1 – Enable trigger on X-channel 0 – Not required 0 1 EN_Y 1 – Enable trigger on Y-channel 0 – Not required Bits 2:0 can be used to build logical OR operation between channels. Example: X or Y = Disable Z → 00 000 011 Address value: 00011 Register name: MD_Y_TH, Motion Detector Y-threshold (Indirect access via CTRL_SEL) Bits Initial Value Name Description 7:0 10h or 08h Y_TH Threshold for Y-acceleration change when MD is used. Address value: 00100 Register name: MD_X_TH, Motion Detector X-threshold (Indirect access via CTRL_SEL) Bits Initial Value Name Description 7:0 10h or 08h X_TH Threshold for X-acceleration change when MD is used. Address value: 00101 Register name: MD_Z_TH, Motion Detector Z-threshold (Indirect access via CTRL_SEL) Bits Initial Value Name Description 7:0 10h or 08h Z_TH Threshold for Z-acceleration change when MD is used. Initial values for registers MD_X_TH, MD_Y_T H and MD_Z_TH vary with SCA3000 product types. Initial value is:
- 10h for SCA3000-D01, SCA3000-D02, SCA3000-E01 and SCA3000-E02
- 08h for SCA3000-E04 and SCA3000-E05 The bit level descriptions for registers MD_X _TH, MD_Y_TH and MD_Z_TH are presented in, Table 11 ...Table 14 below. The threshold levels ar e in unsigned format and they are absolute values for the acceleration that triggers the mo tion detector interrupt. Values presented below are typical threshold values and they are not factory calibrated.
Table 11. Bit level description for motion detec tor typical threshold levels (SCA3000-D01 and Table 12. Bit level description for motion detector typical threshold levels (SCA3000-E01 and Table 13. Bit level description for motion detector typical threshold levels (SCA3000-E04). Table 14. Bit level description for motion detector typical threshold levels (SCA3000-E05).
VTI Technologies Oy 23/ 43 Address value: 01011 Register name: OUT_CTRL, Output configuration (Indirect access via CTRL_SEL) Bits Initial Value Name Description 7:5 Reserved 4 1 BUF_X_EN Store X-axis acceleration data to ring buffer 1 – enabled 0 – disabled 3 1 BUF_Y_EN Store Y-axis acceleration data to ring buffer 1 – enabled 0 – disabled 2 1 BUF_Z_EN Store Z-axis acceleration data to ring buffer 1 – enabled 0 – disabled 1:0 00 BUF_RATE Additional data rate reduction after calibration before data is loaded to ring buffer (no effect on output registers data rate, see section 2.5.1) 11 – No rate reduction 10 – divide rate by 4 01 – divide rate by 2 00 – No rate reduction Address: 1Eh Register name: UNLOCK, Unlock register lock Bits Mode Initial Value Name Description 7:0 RW 00h KEY Lock can be opened by writing the following sequence into this register: 00h, 50h, A0h Writing any other sequence closes the lock. Lock state can be read from STATUS register. Address: 21h Register name: INT_MASK, HW interrupt mask register configures the operation of the INT pin. Bits Mode Initial Value Name Description
7 RW 0 BUF_F_EN Interrupt when output ring buffer is ¾ full
1 – Enabled 0 – Disabled
6 RW 1 BUF_H_EN Interrupt when output ring buffer is ½ full
1 – Enabled 0 – Disabled 5:2 Reserved
1 RW 0 INT_ALL Mask all interrupts (only effects on the INT-pin)
1 – Mask all interrupts (including free fall detection and motion detector) 0 – Mask interrupts according to configured mode
0 RW 1 INT_ACT INT-pin signal activity
1 – INT active high (INT-pin high) 0 – INT active low (INT-pin low) Address: 22h Register name: CTRL_DATA, Control register data, UNLOCK REQUIRED Bits Mode Initial Value Name Description 7:0 RW 00h DATA Data bits [7:0] of selected 8-bit control register. Write this register to actually perform the write operation to selected location. See register CTRL_SEL for information on register contents.
4 Serial Interfaces
4.1 SPI Interface
Figure 5. Typical SPI connection.
4.1.1 SPI frame format
SCA3000 SPI frame format and transfer protocol is presented in Figure 6. Figure 6. SPI frame format.
bits to MISO line are latched out on falling edge of SCK. previous data bits of the addressed register. (please see "error conditioning" in section 4.1.2). rising edge of SCK. The output register is shifted out MSB first over MISO output. When the CSB is high state between data transfers, the MISO line is in the high-impedance state.
4.1.2 SPI bus error conditioning
error bit i s sent out as SPI_FRA ME bit (se e SPI_FRAME in MISO line in Fig ure 6 ). STATUS.SPI_FRAME bit is reset, if correct frame is received. the last output value is considered invalid.
4.1.3 Examples of SPI communication
4.1.3.1 Example of register read
register name is X_MSB (X-axis MSB frame). 7th bit is set to '0' to indicate the read operation. sensor replies to the requested operation by transferring the register content MSB first. Figure 7. An example of SPI read communication.
4.1.3.2 Example of decremented register read
reading is possible only for registers X_LSB ... Z_MSB. Figure 8. An example of decremented read operation.
4.1.3.3 Example of ring buffer read
continues shifting out the ring buffer content as long as µC continues supplying the SCK pulses. Figure 9. An example of output ring buffer read operation.
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4.2 I 2C Interface
I2C is a 2-wire serial interface. It consists of one master device and one or more slave devices. The master is defined as a micro controller providing the serial clock (SCL), and the slave as any integrated circuit receiving the SCL clock from the master. The SCA3000 sensor always operates as a slave device in master-slave operation mode. When using an SPI interface , a hardware addressing is used (slaves have dedicated CSB signals), the I 2C interface uses a software based addressing (slave devices have dedicated bit patterns as addresses). The SCA3000 is compatible to the Philips I 2C specification V2.1. Main used features of the I 2C interface are: - 10-bit addressing, SCA3000 I 2C device address is 0x1F1 - Supports standard mode and fast mode - Start / Restart / Stop - Slave transceiver mode - Designed for low power consumption In addition to the Philips specification, the SCA3000 I2C interface supports multiple write and read mode.
4.2.1 I 2C frame format
4.2.1.1 I 2C write mode
In I2C write mode, the first 8 bits after device address define the SCA3000 internal register address to be written. If multiple data words are transf erred by the master, the register address is decreased automatically by one (see cases 1 and 2 in Figure 10).
4.2.1.2 I 2C read mode
The read mode operates as described in Philips I 2C specification. I 2C read operation returns the content of the register which address is defined in I2C_RD_SEL register. So when performing the I2C read operation, the register address to be re ad has to be written into I2C_RD_SEL register before actual read operation. Read operation star ts from register address that has been written earlier in I2C_RD_SEL register. Read data is acknowledged by I 2C master. Automatic read address change depends on the selected start address (see cases 3 and 4 in Figure 10). - If address is some of registers between X_LSB Æ Z_MSB the register address is automatically cycled as follows: - If the start address is any other register, the read address is NO T automatically incremented or decremented (the data transfer continues from t he same address.) This enables the burst read from output ring buffer (register BUF_DATA).
4.2.1.3 Decremented register read
Decremented reading is possible only for regist ers X_LSB ... Z_MSB. Refer to decremented read with SPI interface section 4.1.3.2.
4.2.2 Examples of I2C communication
Examples of I2C communication are presented below in Figure 10. CASE 4: I2C 16 bit read (any number of bytes can be read, length is determined by end condition generated by master). Automatic register address changing depends on selected start address in I2C_RD_SEL (noted by addr and addr_x on the figure). Figure 10. I2C frame format.
5 Electrical Characteristics
All voltages are reference to ground. Currents flowing into the circuit have positive values.
5.1 Absolute maximum ratings
The absolute maximum ratings of the SCA3000 are presented in Table 15 below. Table 15. Absolute maximum ratings of the SCA3000
- 1 m drop on concrete may cause >>10000 g shock.
ULTRASONIC AGITATION NOT ALLOWED.
5.2 Power Supply
Please refer to the corresponding product datasheet.
5.3 Digital I/O Specification
5.3.1 Digital I/O DC characteristics
Table 16. DC characteristics of digital I/O pins.
1 Pull up current:
2 Pull down current:
3 Pull up current
5.3.2 Digital I/O level shifter
5.3.3 SPI AC characteristics
The AC characteristics of the SCA3000 SPI interface are defined in Figure 11 and in Table 17. Figure 11. Timing diagram for SPI communication. Table 17. AC characteristics of SPI communication.
1 Time from CSB (10%)
2 Time from SCK (10%)
3 SCK low time Load
4 SCK high time Load
5 SCK Frequency fsck =
6 Time from changing
7 Time from SCK (90%)
8 Time from CSB (10%)
9 Time from CSB (90%)
10 Time from SCK (10%)
11 Time between SPI
5.3.4 I 2C AC characteristics
6 Packag e Characteristics
6.1 Dimensions
Figure 12. SCA3000 package dimensions.
7 Application information
7.1 Pin Description
SCA3000 pin numbers are presented in Figure 14 below and pin descriptions in Table 18. Figure 13. SCA3000 sensing directions. Figure 14. SCA3000 pin numbers. Table 18. SCA3000 pin descriptions.
1 NC Not connected Not connected
2 XRESET External reset, active low External reset, active low
3 INT Interrupt output Interrupt output
4 CLK Connect to ground Connect to ground
5 DVSS Digital ground Digital ground
6 DVDD Digital supply Digital supply
7 DVIO Digital I/O supply Digital I/O supply
8 CSB Chip select Not connected
9 NC Not connected Not connected
10 NC Not connected Not connected
11 SCK_SCL SPI serial clock (SCK) I2C serial clock (SCL)
12 MISO_SDA SPI data out (MISO) I2C data in / out (SDA)
13 MOSI SPI data in (MOSI) Not connected
14 AVDD Analog supply Analog supply
15 AVSS Analog ground Analog ground
16 AVSS Analog ground Analog ground
17 ATSTIO Not connected Not connected
18 NC Not connected Not connected
7.2 Recommended circuit diagram
- Connect 100 nF SMD capacitor between each supply voltage and ground level.
- Connect 1 µF capacitor between each supply voltage and ground level.
- Use one regulator for analog and digital supply (AVDD and DVDD).
- Use separate regulator for digital IO supply (DVIO).
- Xreset is needed always in start up: when Xreset is low, raise power supplies inside
specification, then set Xreset high.
- INT-pin is used with output buffer as well as in Free Fall and Motion Detection mode.
- Serial interface (SPI or I2C) logical '1' level is determined by DVIO supply voltage level.
Recommended circuit diagram for the SCA3000 with SPI interface is presented in Figure 15 below.
Recommended circuit diagram for the SCA3000 with I2C interface is presented in Figure 16 below. Figure 15. Recommended circuit diagram for the SCA3000 with SPI interface. Figure 16. Recommended circuit diagram for the SCA3000 with I2C interface.
7.3 Recommended PWB layout
- Locate 100 nF SMD capacitors right next to the SCA3000 package.
- 1 µF capacitors can be located near the node where AVDD and DVDD are routed on separate
- Use separate ground planes for AGND and DGND. Connect separate ground planes together
- Use double sided PWB, connect the bottom side plane to DGND.
diagram presented in Figure 16 above). Figure 19. Recommended PWB layout for SCA3000 with I2C interface (not actual size,
7.4 Assembl y instructions
detailed information of SCA3000 assembly.
7.5 Tape and reel specifications
8 Data sheet references
8.1 Offset
earth’s gravitation) position, see Figure 20. Figure 20. SCA3000 offset (0 g) position.
8.1.1 Offset calibration error
8.1.2 Offset temperature error
position for every measurement point.
8.2 Sensitivity
measuring axis at a time parallel to the earth’s gravitation, see Figure 21. Figure 21. SCA3000 positions for Y-axis sensitivity measurement.
8.2.1 Sensitivity calibration error
8.2.2 Sensitivity temperature error
measured Y-axis sensitivity [counts/g] at room temperature RT.
8.3 Linearit y
components that have measuring range ±3g or below. acceleration values are applied in parallel to the sensor’s measuring axis. Figure 22. Centrifugal acceleration applied for SCA3000 Z-axis. Figure 23. SCA3000’s linearity error at input acceleration acc.
FS is sensor’s full scale measuring range [g] (for example for SCA3000-D01 ±2g → FS = 2 g). because it is not included in to linearity error.
8.4 Noise
and nZ is sensor’s Z-axis noise [g]. “SCA3000 DEMO KIT User Manual 8259300”.
8.5 Bandw idth
constant amplitude (Figure 24). Figure 24. SCA3000 movement in Z-axis bandwidth measurement.
8.6 Cross-axis sensitivity
sensitivity of one axis is a geometric sum of the sensitivities in two perpendicular directions.
acceleration [Count/g] and SX is sensitivity of X-axis [Count/g]. acceleration [Count/g] and SY is sensitivity of Y-axis [Count/g]. acceleration [Count/g] and SZ is sensitivity of Z-axis [Count/g]. measurement of cross-axis sensitivity.
8.7 Turn-on time
FS = 2 g). Turn-on time definition for Z-axis is presented in Figure 25 below. Figure 25. Turn-on time definition for one axis.
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9 Order Information
Order code Description Packing Quantity SCA3000-D01-1 3-Axis accelerometer with SPI interface, +/-2g, 100 pcs T&R 100 SCA3000-D01-10 3-Axis accelerometer with SPI interface, +/-2g, 1000 pcs T&R 1000 SCA3000-D01-25 3-Axis accelerometer with SPI interface, +/-2g, 2500 pcs T&R 2500 SCA3000-D02-1 3-Axis accelerometer with I2C interface, +/-2g, 100 pcs T&R 100 SCA3000-D02-10 3-Axis accelerometer with I2C interface, +/-2g, 1000 pcs T&R 1000 SCA3000-D02-25 3-Axis accelerometer with I2C interface, +/-2g, 2500 pcs T&R 2500 SCA3000-E01-1 3-Axis accelerometer with SPI interface, +/-3g, 100 pcs T&R 100 SCA3000-E01-10 3-Axis accelerometer with SPI interface, +/-3g, 1000 pcs T&R 1000 SCA3000-E01-25 3-Axis accelerometer with SPI interface, +/-3g, 2500 pcs T&R 2500 SCA3000-E02-1 3-Axis accelerometer with I2C interface, +/-3g, 100 pcs T&R 100 SCA3000-E02-10 3-Axis accelerometer with I2C interface, +/-3g, 1000 pcs T&R 1000 SCA3000-E02-25 3-Axis accelerometer with I2C interface, +/-3g, 2500 pcs T&R 2500 SCA3000-E04-1 3-Axis accelerometer with SPI interface, +/-6g, 100 pcs T&R 100 SCA3000-E04-10 3-Axis accelerometer with SPI interface, +/-6g, 1000 pcs T&R 1000 SCA3000-E04-25 3-Axis accelerometer with SPI interface, +/-6g, 2500 pcs T&R 2500 SCA3000-E05-1 3-Axis accelerometer with SPI interface, +/-18g, 100 pcs T&R 100 SCA3000-E05-10 3-Axis accelerometer with SPI interface, +/-18g, 1000 pcs T&R 1000 SCA3000-E05-25 3-Axis accelerometer with SPI interface, +/-18g, 2500 pcs T&R 2500 SCA3000-D01 PWB PWB assy, 3-Axis accelerometer with SPI interface, +/-2g Bulk 1 SCA3000-D02 PWB PWB assy, 3-Axis accelerometer with I2C interface, +/-2g Bulk 1 SCA3000-E01 PWB PWB assy, 3-Axis accelerometer with SPI interface, +/-3g Bulk 1 SCA3000-E02 PWB PWB assy, 3-Axis accelerometer with I2C interface, +/-3g Bulk 1 SCA3000-E04 PWB PWB assy, 3-Axis accelerometer with SPI interface, +/-6g Bulk 1 SCA3000-E05 PWB PWB assy, 3-Axis accelerometer with SPI interface, +/-18g Bulk 1 SCA3000-D01DEMO SCA3000-D01 DEMOKIT Bulk 1
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10 Document Change Control
Version Date Change Description 0.01 09.09.2005 Initial draft. 0.08 20.09.2005 Draft release for schematic and layout design. 0.09 23.09.2005 FF and MD description added. 0.10 12.10.2005 Introduction and functional descriptions edited, measurement mode, ring buffer, temperature measurement, interrupt, oscillator, reset and register descriptions added. Register and bit names changed to be more descriptive. 0.11 13.10.2005 Typo etc minor corrections. 0.12 14.10.2005 Draft release. 0.13 01.11.2005 Register initial values and examples added. 0.14 09.11.2005 Language corrections. 0.15 26.01.2006 New product versions updated. Output and ring buffer bit level definitions changed. This definition is valid from samples v0.3 onwards. Register level changes in temperature output. 0.16 15.02.2006 Updated: - absolute maximum ratings, - temperature output equation, - I C device address, specification references 0.17 14.03.2006 Updated: - recommended circuit diagrams, sections “Packing” and “Handling and storage” added 0.18 27.03.2006 Layout change A 27.04.2006 Updated: - recommended circuit diagrams, - sections “Packing” and “Handling and storage” - section “Specification references” updated and renamed to “Data sheet references” MD threshold levels A.01 27.06.2006 Updated: - document name changed to "SCA3000 Pr oduct Family Specification" - section "6.1 Package dimensions" updated sections "7.4 Solder paste and stencil parameters" and "7.5 Reflow" updated to "7.4 Assembly instructions" - section "9.1 Packing and handling" updated to "7.5 Tape and reel specifications" Contact information A.02 30.6.2006 Order information added A.03 11.9.2006 SCA3000-E04 information added A.04 27.03.2007 Added: - SCA3000-E04 wide band measurement mode, - Typos corrected - New product types: SCA3000-E05 and SCA3000-L01 A.05 01.06.2007 Added: - New product type: SCA3000-D03 - I2C communication added for SCA3000-L01 A.06 30.10.2007 Corrections: typos, axis orientation
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11 Contact Information
(head office) VTI Technologies Oy P.O. Box 27 Myllynkivenkuja 6 FI-01621 Vantaa Finland Tel. +358 9 879 181 Fax +358 9 8791 8791 E-mail: sales@vti.fi Germany VTI Technologies Oy Branch Office Frankfurt Rennbahnstrasse 72-74 D-60528 Frankfurt am Main, Germany Tel. +49 69 6786 880 Fax +49 69 6786 8829 E-mail: sales.de@vti.fi USA VTI Technologies, Inc. One Park Lane Blvd. Suite 804 - East Tower Dearborn, MI 48126 USA Tel. +1 313 425 0850 Fax +1 313 425 0860 E-mail: sales@vtitechnologies.com Japan VTI Technologies Oy Tokyo Office Tokyo-to, Minato-ku 2-7-16 Bureau Toranomon 401 105-0001 Japan Tel. +81 3 6277 6618 Fax +81 3 6277 6619 E-mail: sales.japan@vti.fi China VTI Technologies Shanghai Office 6th floor, Room 618
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P.R. China Tel. +86 21 5132 0417 Fax +86 21 513 20 416 E-mail: sales.china@vti.fi To find out your local sales representative visit www.vti.fi