SC7106 SILAN | Alldatasheet
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HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:1.2 2006.02.27 Http: www.silan.com.cn Page 1 of 22 31/2 DIGITS, LCD/LED DISPLAY , A/D CONVERTERS FOR DMM
DESCRIPTION
The SC7106 and SC7107 are high perform ance, low power, 31/2 digit A/D converters. Included are seven segment decoders, display drivers, a reference, and a clock. The SC7106 is designed to interface with a liquid crystal display (LCD) and includes a multiplexed backplane drive; the SC7107 will directly drive an instrument size light emitting diode (LED) display. The SC7106 and SC7107 bring together a combination of high accuracy, versatility, and true economy. It features autozero to less than 10µ V , z e r o d r i f t o f l e s s t h a n 1µ V/°C, input bias current of 10pA (Max), and rollover error of less than one count. True differential inputs and reference are useful in all systems, but give the designeran uncommon advantage when measuring load cells, strain gauges and other bridge type transducers. Finally, the true economy of single power supply operation (SC7106), enables a high performance panel meter to be built with the addition of only 10 passive components and a display.
ORDERING INFORMATION
Part No. Temp. Range(°C) Package SC7106CPL 0~70 DIP406002.54 SC7106RCPL 0~70 DIP406002.54 SC7106 0~70 QFP4410X100.8 SC7107CPL 0~70 DIP406002.54 SC7107RCPL 0~70 DIP406002.54 SC7107 0~70 QFP4410X100.8 NOTE: “ R” indicates device with reversed leads for mounting to PC board underside. DIP406002.54 QFP4410 x100.8
FEATURES
- Guaranteed zero reading for 0V input on all scales * True polarity at zero for precise null detection * Low power dissipationtypically less than 10mW * True differential input and reference, direct display drive LCD SC7106, LED SC7107 * Low noise (less than 15µ Vpp) * On chip clock and reference * 1pA typical input current * No additional active circuits required
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:1.2 2006.02.27 Http: www.silan.com.cn Page 2 of 22 BLOCK DIAGRAM ABSOLUTE MAXIMUM RATING Characteristics Symbol Value Unit SC7106 V+ ~ V 15 SC7107 V+ ~ GND 6Supply Voltage SC7107 V ~ GND 9 V Analog Input Voltage(Either Input) (Note 1) V+ ~ V Reference Input Voltage(Either Input) V+ ~ V SC7106 TEST to V+ Clock Input SC7107 GND to V+ Operating Temperature Topr 0 ~ +70 °C Storage Temperature Tstg 65 ~ 150 °C Thermal resistance(typical) (Note 2) θ JA 50 °C/W Maximum Junction Temperature 150 °C NOTE: 1. Input voltages may exceed the supply voltages provided the input current is limited to±100µ A. 2. θ JA is measured with the component mounted on an evaluation PC board in free air. 3. Not tested, guaranteed by design. 4. Back plane drive is in phase with segment drive for "off" segment, 180 degrees out of phase for "on" segment. Frequency is 20 times conversion rate. Average DC component is less than 50mV.
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:1.2 2006.02.27 Http: www.silan.com.cn Page 3 of 22 ELECTRICAL CHARACTERISTICS(Unless otherwise noted, specificatons apply to both the SC7106 and SC7107 at Ta mb=25°C , Fclo ck=48kHz, SC7106 is tested in the circuit of Figure 1. SC7107 is tested in the circuit of Figure 2.) Characteristics Test Conditions Min. Typ. Max. Unit SYSTEM PERFORMANCE Zero Input Reading VIN=0.0V, Full Scale=200mV 000.0 ±000. +000. Digital Reading Ratiometric Reading VIN=VREF, VREF=100mV 999 999/ 1000 1000 Digital Reading Rollover Error VIN=+VIN ≈ 200mV Difference In Reading For Equal Positive And Negative Inputs Near Full Scale ±0.2 ±1 Counts Linearity Full Scale =200mV Or Full Scale =2V Maximum Deviation From Best Straight Line Fit (Note 3) ±0.2 ±1 Counts Common Mode Rejection Ratio VCM=1V,VIN=0V,Full Scale=200mV (Note 50 µ V/V Noise VIN=0V,Full Scale=200mV,(PeakToPeak Value Not Exceeded 95% of Time) 15 µ V Leakage Current Input VIN=0(Note 3) 1 10 pA Zero Reading Drift VIN=0, 0°C To 70°C(Note 3) 0.2 1 µ V/°C Scale Factor Temperature Coefficient VIN=199mV, 0°C TO 70°C (Ext.Ref.0ppm/°C) (Note 3) 1 5 ppm/ °C End Power Supply Character V+ Supply Current VIN=0(Does Not Include LED Current For SC7107) 1.0 1.8 mA End Power Supply Character V Supply Current SC7107 Only 0.6 1.8 mA COMMON Pin Analog Common Voltage 25kΩ Between Common And Positive Supply (With Respect To V+ Supply) 2.4 3.0 3.2 V Temperature Coefficient Of Analog Common 25kΩ Between Common And Positive Supply (With Respect To V+ Supply) 80 ppm/ °C DISPLAY DRIVER (SC7106 ONLY) PeakToPeak Segment Drive Voltage PeakToPeak Backplane Drive Voltage V+ To V=9V(Note 4) 4 5.5 6 V DISPLAY DRIVER (SC7107 ONLY) Segment Sinking Current (Except Pins 19 And 20) 5 8 mA Pin 19 Only 10 16 mA Pin 20 Only V+=5V, Segment Voltage=3V 4 7 mA
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:1.2 2006.02.27 Http: www.silan.com.cn Page 4 of 22 PIN CONFIGURATION DEEN INTEN TEST OSC3 HOLD OSC2 OSC1 AB4 POL BP/GND LB
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:1.2 2006.02.27 Http: www.silan.com.cn Page 5 of 22 DESIGN INFORMATION SUMMARY SHEET OSCILLATOR FREQUENCY fosc=0.45/RC; Cosc>50pF; Rosc>50kΩ ; fosc(Typ)=48kHz OSCILLATOR PERIOD tosc=RC/0.45 INTEGRATION CLOCK FREQUENCY Fclock=fosc/4 INTEGRATION PERIOD tI NT=1000x(4/fosc) 60/50Hz REJECTION CRITERION tI NT/ t60Hz or tINT/ t50Hz=Integer OPTIMUM INTEGRATION CURRENT II NT=4µ A FULL SCALE ANALOG INPUT VOLTAGE VINFS(Typ)=200mV or 2V INTEGRATE RESISTOR RI NT=VINFS/IINT INTEGRATE CAPACITOR CI NT=(tI NT) (IINT)/VI NT INTEGRATOR OUTPUT VOLTAGE SW ING VI NT=(tI NT) (IINT)/CI NT VI NT MAXIMUM SWING (V+0.5V)<VI NT<(V+0.5V), VINT(Typ)=2V DISPLAY COUNT COUNT=1000x (VIN/VREF) CONVERSION CYCLE tCYC=tCLOCKx4000; tCYC=toscx16000; when fosc=48kHz; tCYC=333ms COMMON MODE INPUT VOLTAGE (V+1V)<VIN<(V+0.5V) AUTOZERO CAPACITOR 0.01µ F<CAZ<1µ F REFERENCE CAPACITOR 0. 1µ F<CREF<1µ F VCOM Biased between Vi and V VCOM ≈ V+− 2.8V Regulation lost when V+ to V<≈ 6.8V ;if VCOM is externally pulled down to (V+ to V)/2, the VCOM circuit will turn off. SC7106 POWER SUPPLY: SINGLE 9V V+ to V=9V, digital supply is generated internally, VGND≈ V+− 4.5V SC7106 DISPLAY: LCD Type: Direct drive with digital logic supply amplitude. SC7107 POWER SUPPLY:DUAL±5.0V V+=+5V TO GND, V=5V TO GND, Digital Logic and LED driver supply V+ to GND SC7107 DISPLAY: LED Type: NonMultiplexed Common Anode
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:1.2 2006.02.27 Http: www.silan.com.cn Page 8 of 22 3. SIGNAL INTEGRATE PHASE During signal integrate, the autozero loop is opened, the internal short is removed, and the internal input high and low are connected to the external pins. The converter then integrates the differential voltage between IN HI and IN LO for a fixed time. This differential voltage can be within a wide common mode range: up to 1V from either supply. If, on the other hand, the input signal has no return with respect to the converter power supply, IN LO can be tied to analog COMMON to establish the correct common mode voltage. At the end of this phase, the polarity of the integrated signal is determined. 4. DEINTEGRATE PHASE The final phase is deintegrate, or reference integrate. Input low is internally connected to analog COMMON and input high is connected across the previously charged reference capacitor. Circuitry within the chip ensures that the capacitor will be connected with the correct polarity to cause the integrator output to return to zero. The time required for the output to return to zero is proportional to input signal. Specifically the digital reading displayed is: DISPLAY COUNT=1000 (VIN/VREF). 5. DIFFERENTIAL INPUT The input can accept differential voltages anywhere within the common mode range of the input amplifier, or specifically from 0.5V below the positive supply to 1V above the negative supply. In this range, the system has a CMRR of 86dB typical. However, care must be exercised to assure the integrator output does not saturate. A worst case condition would be a large positive common mode voltage with a near fullscale negative differential input voltage. The negative input signal drives the integrator positive when most of its swing has been used up by the positive common mode voltage. For these critical applications the integrator output swing can be reduced to less than the recommended 2V fullscale swing with little loss of accuracy. The integrator output can swing to within 0.3V of either supply without loss of linearity. 6. DIFFERENTIAL REFERENCE The reference voltage can be generated anywhere within the power supply voltage of the converter. The main source of common mode error is a rollover voltage caused by the reference capacitor losing or gaining charge to stray capacity on its nodes. If there is a large common mode voltage, the reference capacitor can gain charge (increase voltage) when called up to deintegrate a positive signal but lose charge (decrease voltage) when called up to deintegrate a negative input signal. This difference in reference for positive or negative input voltage will give a rollover error. However, by selecting the reference capacitor such that it is large enough in comparison to the stray capacitance, this error can be held to less than 0.5 count worst case. (See Component Value Selection.) 7. ANALOG COMMON This pin is included primarily to set the common mode voltage for battery operation (SC7106) or for any syste m where the input signals are floating with respect to the power supply. The COMMON pin sets a voltage that is approximately 2.8V more negative than the positive supply. This is selected to give a minimum endof life battery voltage of about 6V. However, analog COMMON has some of the attributes of a reference voltage. When the total supply voltage is large enough to cause the zener to regulate (>7V), the COMMON voltage will have a low voltage coefficient (0.001%/V), low output impedance (≈ 15Ω ), and a temperature coefficient typically less than 80ppm/°C.
negative TC may cycle between overrange and a nonoverrange count as the die alternately heats and cools. All these problems are of course eliminated if an external reference is used. reference can easily be added, as shown in Figure 4. FIGURE 4. USING AN EXTERNAL REFERENCE 6 show such an application. No more than a 1mA load should be applied.
1) Figure 9A. An external oscillator connected to pin 40. 2) Figure 9B. An RC oscillator using all three pins. independent of input voltage. For three readings/second, an oscillator frequency of 48kHz would be used. To achieve maximum rejection of 60Hz pickup, the signal integrate cycle should be a multiple of 60Hz. that 40kHz (2.5 readings/second) will reject both 50Hz and 60Hz (also 400Hz and 440Hz). FIGURE 9. CLOCK CIRCUITS undetectable errors at reasonable cost.
speed of recovery from overload and is adequate for noise on this scale. prevent rollover error. Generally 1µ F will hold the rollover error to 0.5 count in this instance. f=0.45/RC, for 48kHz clock (3 Readings/sec), C=100pF. and the variable (or fixed) offset voltage between COMMON and IN LO. 2) The signal is less than ±1.5V. 3) An external reference is used. FIGURE 10. GENERATING NEGATIVE SUPPLY FROM +5V
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:1.2 2006.02.27 Http: www.silan.com.cn Page 20 of 22 PACKAGE OUTLINE DIP406002.54 UNIT: mm 5.1 MAX3.7±0.1 0.5MIN 15.24±0.25 14.0±0.3 QFP4410X100.8 UNIT: mm
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:1.2 2006.02.27 Http: www.silan.com.cn Page 21 of 22 HANDLING MOS DEVICES: Electrostatic charges can exist in many things. All of our MOS devices are internally protected against electrostatic discharge but they can be damaged if the following precautions are not taken:
- Persons at a work bench should be earthed via a wrist strap.
- Equipment cases should be earthed.
- All tools used during assembly, including soldering tools and solder baths, must be earthed.
- MOS devices should be packed for dispatch in antistatic/conductive containers.