SC3010 SILAN | Alldatasheet
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HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:2.2 2005.12.15 Http: www.silan.com.cn Page 1 of 15 INFRARED REMOTE CONTROL TRANSMITTER OF RC5 CODE FORMAT DIP28 SOP28
DESCRIPTION
SC3010 is a remote control transmitter utilizing CMOS Technology specially designed for use on general purpose (RC5) infrared applications with low voltage supply and large debounce time. SC3010 supports 32 systems. Each system has a maximum of 64 commands; thus, SC3010 can provide up to a total of 2,048 commands.
FEATURES
- CMOS Technology * Low Voltage Supply * Supports up to 32 syste ms * Single Pin Oscillator * Biphase Transmission Technique * Provides 2,048 Commands
APPLICATIONS
- Television * VCR * Audio Equipment * MultiMedia Syste m * Personal Computer
ORDERING INFORMATION
SC3010 DIP286002.54 SC3010S SOP283751.27 BLOCK DIAGRAM
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:2.2 2005.12.15 Http: www.silan.com.cn Page 2 of 15 ABSOLUTE MAXIMUM RATING (Ta mb=25°C, unless otherwise specified) Characteristics Symbol Test conditions Value Unit Supply Voltage* VDD VSS 0.3 ~ 5.5 V Input Voltage* VIN V DD=3 V 0.5 ~ VDD+0.5 V Output Voltage* VOUT V DD=3 V 0.5 ~ VDD+0.5 V Operating Temperature TOPR V DD=3 V 20~85 °C NOTE: * = with reference to Vss. ELECTRICAL CHARACTERISTICS (Ta mb=25°C, unless otherwise specified) Characteristics Symbol Test conditions Min Typ Max Unit Supply Voltage VDD Freq=455KHz 2.0 3.0 5.5 V StandBy Current IDD V DD =3V (Output no load) 0 10 µ A Input Current(KI0~KI7,C0~C3) IIN VI=0V T1=0 T2=0 SMS=0 15 600 µ A High Level Input Voltage (KI0~KI7,C0~C3,SMS,T1,T2) VIH VDD =3V, (KI0~KI7 And C0~C3 Connected To VDD) 0.7VDD V Low Level Input Voltage (KI0~KI7,C0~C3,SMS,T1,T2) VIL VDD=3V ,( T1,T2,OSC,SMS Connected To VSS) 0.3VDD V VI=3V VDD=3V T1=T2=High 0 1.0 Input Current Leakage (KI0~KI7,C0~C3) ILEAK1 VI=0V VDD=3V T1=T2=High 0 1.0 µ A ILEAK2 VI=0V VDD=3V T1=T2=High 0 1.0 Input Current Leakage (OSC) ILEAK3 VI=3V VDD=3V T1=T2=High 4.5 15 30 µ A VI=3V VDD=3V T=25°C 0 1.0Input Leakage Current (SMS,T1,T2) ILEAK4 VI=0V VDD=3V T=25°C 0 1.0 µ A High Level Output Voltage (Dout, MDOUT) VOH V DD=3V IOH=0.4mA VDD 0.3 Low Level Output Voltage (Dout, MDOUT) VOL V DD=3V IOH=0.6mA 0.35 V Vo=3V VDD=3V T=25°C 10Output Current Leakage (Dout, MDOUT) ILEAK5 Vo=0V VDD=3V T=25°C 1 µ A Low Level Output Voltage (KO0~KO7) VOL V DD=3V IOL=0.3mA 0.8 V Vo=3V VDD=3V T=25°C 0 1 Output Current Leakage (KO0~KO7) ILEAK6 Vo=3V VDD=3V T= 25~85°C 3 10 µ A Drive Current (Dout, MDout) ID VDD=3V Vo=1.5V 1.5 2 mA Operational Frequency Fosc1 V DD=3V 400 600 KHz FreeRunning Frequency Fosc2 V DD=3V 50 100 KHz
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:2.2 2005.12.15 Http: www.silan.com.cn Page 3 of 15 PIN CONFIGURATIONS PIN DESCRIPTION Pin No. Symbol Description
1 KI7 Key Sense Input Pin
2 SMS Syste m Mode Selection Input Pin
3~6 C0~C3 Key Sense Input Pins
7 MDOUT
Generated Output Data Pin modulated with 1/12 oscillator frequency at a 25% duty factor
8 DOUT Generated Output Data Pin
9~13 KO7~KO3 Scan Driver Pins
14 VSS Negative Power Supply
15~17 KO2~KO0 Scan Driver Pins
18 OSC Oscillator Input Pin
19 T2 Test Pin 2
20 T1 Test Pin 1
21~27 KI0~KI6 Key Sense Input Pins
28 VDD Positive Power Supply
- KEY INPUT OPERATION A Key Input Operation may be considered legal or illegal depending on the keys pressed. For key interconnection refer to the application circuit diagram in APPLICATION CIRCUIT SECTION. The maximum value of the switched key contact series resistance is 7kΩ . a). Legal Key Input A legal key input operation enables the device to activate the corresponding codes. A key input operation is considered as legal if it is 1). a connection of one KInput (KI0~KI7) to one KOutput (KO0~KO7), or 2).a
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:2.2 2005.12.15 Http: www.silan.com.cn Page 5 of 15 Both the DOUT and the MDOUT are nonconducting (3state outputs) when in the quiescent state. The Scan Driver Outputs (KO0~KO7) are open drain nchannel and conduct when the circuit is in the quiescent state. 4. SYSTEM MODES a). Combined System Mode (SMS=Low) The KI and the C Sense Inputs have pchannel pullup transistors (meaning they are normally in HIGH state). They are pulled to LOW state when an output is connected, to them as a result of a legal key operation. A legal key operation in the KIKO or CKO Matrix will initiate a debounce cycle. Once key contact has been established for 18bit time without any interruption, the Oscillator Enable Signal is latched and the key may be released. The device is reset when there is an interruption during the 18bit time period. At the end of the debounce cycle, KO Outputs are switched off and two scan cycles begins. When KI or C Input senses a low level output, a LatchEnable Signal is fed to the System (CInput) or Command (KIInput) Latches. After latching a system number, the device will generate the last command (i.e. all command bits logic 1) in the selected system for as long as the key is pressed. Latching of a command number causes the chip to generate this command together with the system number stored in the system latch. By releasing the key, the device will be reset if no data is to be transmitted at the time. The complete code frame is transmitted even if the key is released during code transmission. b). Single System Mode (SMS=High) In the Single System Mode, the KISense Inputs are also pulled High by the pchannel pullup transistors, as in the Combined System Mode. The CSense Inputs, however, are disabled by switching off their pullhigh transistors. A system code is provided by a wired connection between the CKO Matrix. The debounce cycle can ONLY be started by any legal key operation in the KIKO Matrix. Once the key contact has been established for 18bit time without any interruption, the OscillatorEnable Signal is latched and the key may be released. Any interruption during the 18bit time period resets the internal action. At the end of the debounce cycle, the pullup transistors in the KILines are then switched off and the pullup transistors in the Clines are turned ON for the first scan cycle. The wired connection in the Cmatrix matrix is then translated into a system number and stored in the system latch. At the end of the first scan cycle, 1) the C Input pullup transistors are switched off and the inputs are again disabled, 2) KISense Input pullup transistors are turned on. The command number is generated by the second scan cycle. This command number is then latched and transmitted together with the system number. 5. KEY RELEASE DETECTION An additional control bit is complemented after key release. This additional control bit tells the decoder that the next code is a new command. This feature is important in cases where more digits are needed to be inputted (i.e. Teletext channel numbers or Viewdata pages). The extra control bit will only be complemented after the completion of at least one code transmission. The scan cycles are repeated before every code transmission; thus, even with the Take Over of key operation during the code transmission, the correct system and command numbers are generated. 6. RESETTING THE DEVICE The device will imm ediately reset under the following conditions: 1). A key is released during the debounce time 2). A key is released between two codes
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:2.2 2005.12.15 Http: www.silan.com.cn Page 6 of 15 3). During Matrix Scanning a). A key is released while one of the drivers outputs is in the low ohmic state (Logic 0) b). A key is released before that key has been detected. c). There is no wired connection in the CKO Matrix when SMS is in High State. 7. OSCILLATOR The OSC is a 1pin oscillator input/output terminal. The oscillator is constructed by connecting in series a ceramic resonator like TOKO CRK429. 8. TEST MODE When T1, T2 and OSC Pins are in HIGH State, the circuit initializes. All internal nodes except for the LATCH are defined. The latch is defined when a scan cycle starts by pulling down a KI or a C Input while the oscillator is active. If the debounce cycle has been completed, then the scan cycle can be accomplished 3x23 time s faster by setting the T1 to HIGH. If the scan cycle has been completed, the Latch contents can be read 3x27 times faster by setting the T2 to HIGH.
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:2.2 2005.12.15 Http: www.silan.com.cn Page 7 of 15 SC3010 COMMAND MATRIX DATA CODE The Command Matrix Data Code is given in the table below: KILine KOLine Command Bits No. 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 5 4 3 2 1 0 0 • • 0 0 0 0 0 0 1 • • 0 0 0 0 0 1 2 • • 0 0 0 0 1 0 3 • • 0 0 0 0 1 1 4 • • 0 0 0 1 0 0 5 • • 0 0 0 1 0 1 6 • • 0 0 0 1 1 0 7 • • 0 0 0 1 1 1 8 • • 0 0 1 0 0 0 9 • • 0 0 1 0 0 1 10 • • 0 0 1 0 1 0 11 • • 0 0 1 0 1 1 12 • • 0 0 1 1 0 0 13 • • 0 0 1 1 0 1 14 • • 0 0 1 1 1 0 15 • • 0 0 1 1 1 1 16 • • 0 1 0 0 0 0 17 • • 0 1 0 0 0 1 18 • • 0 1 0 0 1 0 19 • • 0 1 0 0 1 1 20 • • 0 1 0 1 0 0 21 • • 0 1 0 1 0 1 22 • • 0 1 0 1 1 0 23 • • 0 1 0 1 1 1 24 • • 0 1 1 0 0 0 25 • • 0 1 1 0 0 1 26 • • 0 1 1 0 1 0 27 • • 0 1 1 0 1 1 28 • • 0 1 1 1 0 0 29 • • 0 1 1 1 0 1 30 • • 0 1 1 1 1 0 31 • • 0 1 1 1 1 1 32 • • 1 0 0 0 0 0 33 • • 1 0 0 0 0 1 34 • • 1 0 0 0 1 0 35 • • 1 0 0 0 1 1 (To be continued)
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:2.2 2005.12.15 Http: www.silan.com.cn Page 8 of 15 (Continued) KILine KOLine Command Bits No. 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 5 4 3 2 1 0 36 • • 1 0 0 1 0 0 37 • • 1 0 0 1 0 1 38 • • 1 0 0 1 1 0 39 • • 1 0 0 1 1 1 40 • • 1 0 1 0 0 0 41 • • 1 0 1 0 0 1 42 • • 1 0 1 0 1 0 43 • • 1 0 1 0 1 1 44 • • 1 0 1 1 0 0 45 • • 1 0 1 1 0 1 46 • • 1 0 1 1 1 0 47 • • 1 0 1 1 1 1 48 • • 1 1 0 0 0 0 49 • • 1 1 0 0 0 1 50 • • 1 1 0 0 1 0 51 • • 1 1 0 0 1 1 52 • • 1 1 0 1 0 0 53 • • 1 1 0 1 0 1 54 • • 1 1 0 1 1 0 55 • • 1 1 0 1 1 1 56 • • 1 1 1 0 0 0 57 • • 1 1 1 0 0 1 58 • • 1 1 1 0 1 0 59 • • 1 1 1 0 1 1 60 • • 1 1 1 1 0 0 61 • • 1 1 1 1 0 1 62 • • 1 1 1 1 1 0 63 • • 1 1 1 1 1 1
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:2.2 2005.12.15 Http: www.silan.com.cn Page 9 of 15 SC3010 SYSTEM MATRIX DATA CODE The Syste m Matrix Data Code for KKO Lines are given in the table below: CLine KOLine System BitsSystem No. 0 1 2 3 0 1 2 3 4 5 6 7 4 3 2 1 0 0 • • 0 0 0 0 0 1 • • 0 0 0 0 1 2 • • 0 0 0 1 0 3 • • 0 0 0 1 1 4 • • 0 0 1 0 0 5 • • 0 0 1 0 1 6 • • 0 0 1 1 0 7 • • 0 0 1 1 1 8 • • 0 1 0 0 0 9 • • 0 1 0 0 1 10 • • 0 1 0 1 0 11 • • 0 1 0 1 1 12 • • 0 1 1 0 0 13 • • 0 1 1 0 1 14 • • 0 1 1 1 0 15 • • 0 1 1 1 1 16 • • 1 0 0 0 0 17 • • 1 0 0 0 1 18 • • 1 0 0 1 0 19 • • 1 0 0 1 1 20 • • 1 0 1 0 0 21 • • 1 0 1 0 1 22 • • 1 0 1 1 0 23 • • 1 0 1 1 1 24 • • 1 1 0 0 0 25 • • 1 1 0 0 1 26 • • 1 1 0 1 0 27 • • 1 1 0 1 1 28 • • 1 1 1 0 0 29 • • 1 1 1 0 1 30 • • 1 1 1 1 0 31 • • 1 1 1 1 1
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:2.2 2005.12.15 Http: www.silan.com.cn Page 10 of 15 APPLICATION CIRCUIT NOTE: There is a connection between the C0~C3 Lines and KO0~KO7 Lines if SMS is tied to VDD.
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:2.2 2005.12.15 Http: www.silan.com.cn Page 11 of 15 CHIP TOPOGRAPHY 25 24 23 22 21 20 19 18 11109876543 size: 1.71 x 1.69 mm2 PAD COORDINATES (Unit: µ m) No. Symbol X Y No. Symbol X Y 1 P1 674.50 407.50 15 P15 693.50 49.00 2 P2 674.50 554.00 16 P16 693.50 91.00 3 P3 674.50 704.00 17 P17 693.50 231.00 4 P4 450.50 704.00 18 P18 537.00 680.50 5 P5 309.75 704.25 19 P19 386.75 680.50 6 P6 146.50 704.25 20 P20 246.75 680.50 7 P7 18.75 704.25 21 P21 97.25 680.50 8 P8 221.75 704.25 22 P22 42.75 680.50 9 P9 400.25 704.25 23 P23 192.25 680.50 10 P10 539.25 704.25 24 P24 332.00 680.50 11 P11 679.00 704.25 25 P25 481.50 680.50 12 P12 693.50 468.75 26 P26 674.50 614.50 13 P13 693.50 329.00 27 P27 674.50 449.00 14 P14 693.50 189.00 28 P28 674.50 267.375 Note: The original point of the coordinate is the die center.
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:2.2 2005.12.15 Http: www.silan.com.cn Page 12 of 15 PCB WIRE LAYOUT SCHEMATIC Transmitting tube output ground line The transmitting tube ground line and IC ground line should layout separated or overstriking ground line. The above IC only use to hint, not to specified. Note: * In wire layout, the power filter capacitor should near to IC. * In wire layout, should avoid power line and ground line too long. * Recommended infrared transmit unit and IC ground line should layout separated, or overstriking lines. * The e mitter of triode connect 1ȍ resistor at least. * Recommended triode use 9014.
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:2.2 2005.12.15 Http: www.silan.com.cn Page 13 of 15 PACKAGE OUTLINE DIP286002.54 UNIT: mm 13.8±0.25 0.5MIN 4.96MAX3.00MIN 15.24 0.25±0.05 SOP283751.27 UNIT: mm 10.2±0.4 7.6±0.3 9.525
2.8 MAX
17.75±0.25 16.51 0.45 0.15±0.051.27
HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:2.2 2005.12.15 Http: www.silan.com.cn Page 14 of 15 HANDLING MOS DEVICES: Electrostatic charges can exist in many things. All of our MOS devices are internally protected against electrostatic discharge but they can be damaged if the following precautions are not taken:
- Persons at a work bench should be earthed via a wrist strap.
- Equipment cases should be earthed.ҏ
- All tools used during assembly, including soldering tools and solder baths, must be earthed.
- MOS devices should be packed for dispatch in antistatic/conductive containers. Note: IC oscillator input mustn't be on the outside layer, thus to avoid the abnormal working when human body touches the re mote controller without crust in testing.