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Features

n Integrated Enclosure Processor – ARM ® Cortex-R4 @ 300MHz n 12Gb/s SAS Interface – 48, 40, 36-port SAS/SATA expanders – Supports 12Gb/s, 6Gb/s, and 3Gb/s SAS, and 6Gb/s and 3Gb/s SATA data transfer rates – Ports are non-denominational - initiator and target connect – Supports narrow and wide port configurations – Spread spectrum clocking – Supports SSP initiator and target, SMP initiator and target, STP initiator and SATA protocols – DataBolt ™ Bandwidth Optimizer (40 ports) n T-10 zoning – 255 zones n Port mirroring n 16 GPIO Pins (64) n 1 LED Pins per Phy – Configurable for link status, drive activity, fault LED outputs – Can be used as GPIOs n SFF-8485 Compliant (2 SGPIO ports) n External memory interface support – 8/16 bit FLASH/NVSRAM LSI SAS3x48 LSI® 12Gb/s SAS/SATA Expander LSI SAS3x48, LSI SAS3x40, LSI SAS3x36

For more information and sales office locations, please visit the LSI website at: www.lsi.com LSI, LSI & Design logo, MegaRAID, DataBolt and FusionMPT are trademarks or registered trademarks of LSI Corporation. All other brand or product names may be trademarks or registered trademarks of their respective companies. LSI Corporation reserves the right to make changes to any products and services herein at any time without notice. LSI does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by LSI; nor does the purchase, lease, or use of a product or service from LSI convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual property rights of LSI or of third parties. Copyright ©2013 by LSI Corporation. All rights reserved. > 1113 North American Headquarters San Jose, CA LSI Europe Ltd. European Headquarters United Kingdom T: [+44] 1344.413200 LSI KK Headquarters Tokyo, Japan Product Brief Debug port. API support is also included for most HAL functions including, but not limited to, SSP and SMP Target and Initiator, STP Initiator, UART, ISTWI Master and Slave, all LED management including GPIO and SGPIO, Configuration Page Management, PHY configuration and control, firmware event logging and firmware tracing. Features (Continued) n Communication Interfaces – Twelve I2C interfaces for enclosure management services or debug – Two UART interfaces for debug as well as an out of band communication port – 10/100/1000 Ethernet Management Port interface for out of band communication n USB 2.0 port n JTAG support n 1020 FPB32GU (33mm x 33mm) RAID Controller RAID Controller 36-Drive RAID/JBOD Up to 36 SAS/SATA Drives LSI SAS3x48 LSI SAS3x48 4 4 Enclosure Functions

  • LED Control
  • Temp Monitoring
  • Drive/Array Control
  • Fan Control/Monitor
  • Power Supply Control/Monitor
  • Alarms/Notifications LSI SAS3 x48 SAS Expander Technical Specifications SEP ARM Cortex R4 300MHz Pulse Width Modulator 2 Instructions 1.6 DMIPs/MHz DDR Interface DDR3 - 20 bit interface (16-bits Data w/ 4 bits ECC) Internal Memory 2MB SRAM External Memory Interfaces 8/16-bit Flash, w/ 6 chip selects SRAM, NVSRAM SAS Ports 48, 40, 36 Security Features TRNG/Hash & HMAC Generator/Secret Root Key Data Transfer 12.0/6.0/3.0 Gb/s SAS 6.0/3.0 Gb/s SATA 8-bit SEP interface Y DataBolt Bandwidth Optimizer (EDFB) 40 ports (LSI IP) I2C Interfaces 12 SSC (Spread Spectrum Clocking ) Y SGPIO interface 2, SFF- 8485 Port Mirroring Y (LSI IP) Ethernet Interface 10/100/1000 Direct, Table, & Subtractive Routing Methods Y USB 2.0 Interfaces 1 Route Table Entries 2048 UART Interfaces 2 Phy Based Zoning, T-10 Zoning Y LED 1 LED pin per PHY T-10 Optical Support Y GPIO 16 A/D Converter 1, (2 analog inputs) Package 1020 FPB32GU 1.0 mm pad pitch (33mm x 33mm)