SAB8282A SIEMENS | Alldatasheet
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Technical content
“Uy © Fully compatible with SAB 8282/SAB 8283 © Fully Parallel 8-Bit Data @ 40% Less Power Supply Current Register and Buffer than Standard SAB 8282/SAB 8283 © No Output Low Noise when Entering or @ Address Latch for Leaving High Impedance State SAB 80286, SAB 80186, SAB 8086, SAB 8085, © 3-State Outputs SAB 8048 and SAB 8051 Families © Transparent during Active Strobe @ High Output Drive Capability for @ 20-Pin Package Driving System Data Bus Pin Configuration Pin Names on) mpke wl! mp ke PerPh o,Cj2 19[D0g «=O 2 19] 00a o3nt4 73002 O34 17-100, ouC]s can woo; = og )5 eA 16{ J50; OE Output Enable Oss soo, =O 6 15[ 00, xs soo oc whee e ots 300s O78 131-1005 or Xs at Joo, oEL\\9 12[00; Vee Power Supply (+5V) GNo L410 nfsta GnoC]10 np ste GND Ground (OV) The SAB 8282A and SAB 8283A are 8-bit Thus, all of the principal peripheral and bipolar latches with 3-state output buffers. input/output functions of a microcomputer system They can be used to implement latches, buffers, can be implemented with these devices. or multiplexers. The SAB 8283A inverts the input This device is fabricated in a fast bipolar ASBC data at its outputs while the SAB 8282A does not. {Advanced Standard Buried Collector) process of Siemens.
735 January 1985
Logic Diagrams SAB 8282 SAB 82834, ee | i} | | ' ' I 1 ! 1 1 1 I _ Digo t P>t—+ 00 Oly © to a}-f>+— Dog 1 | ! Louk t i“ 1 ms ' I 1 l ‘ 1 ! | t eee [ee | Oho © DO; Dl; O- ° 1D; Oke a sor Oy oP to 0, a t+ Dis ° _ 005 Dy sone _ © Ds D4 oF ty? ol, o——- 1 0 Dls0 a 005 Ols 0 ° Ws Olg 005 OG en © DOs Oly o pot 00, Dl; o- , ° D0; A A STB 01 & sta °F Pin Definitions and Functions Input (I) Symbol Number Output (0) | Function STB 1 STROBE - STB is an input control pulse used to strobe data at the data input pins (Ag—A;) into the data latches. This signal is active HIGH to admit input data. The data is latched at the HIGH to LOW transition of STB. OE OUTPUT ENABLE - OE is an input control signal which when active LOW enables the contents of the data latches onto the data output pin (DO,~ DO; or DOg—DO>). OE being inactive HIGH forces the output buffers to their high impedance state. DIp—Dl, DATA INPUT PINS — Data presented at these pins satisfying setup time requirements when STB is strobed and latched into the data input latches. DO,—DO, DATA OUTPUT PINS — When OE is true, the data in the (SAB 8282A) data latches is presented as inverted (SAB 8283A) or DO,-DO, non-inverted (SAB 8282A) data onto the data output pins. (SAB 8283A) GND of srounaiovs 736
a Functional Description The SAB 8282A and SAB 8283A octal latches are _Data is presented to the data output pins by 8-bit latches with 3-state output buffers. activating the OE input line. When OE is inactive Data having satisfied the setup time requirements HIGH the output buffers are in their high impedance is latched into the data latches by strobing the STB _state. Enabling or disabling the output buffers will tine HIGH to LOW. Holding the STB line in its not cause negative-going transients to appear on active HIGH state makes the latches appear the data output bus. transparent. Absolute Maximum Ratings” Temperature Under Bias Oto +70°C Storage Temperature 65 to + 150°C All Output and Supply Voltages -05to +7V All Input Voltages —1.0to +5.5V Power Dissipation 1w D. C. Characteristics Ty = Oto 70°C; Voc = +5V £10% Symbol __| Paramet Limit Valves | Units | Test Conditi yymbol ‘arameter [min. _[Max. _| nits: fest Conditions Ve Input Clamp Voltage [1 [|v | Ic =—5 mA lec Power Supply Current SAB 8282A 100 |mA _— |atl outputs open SAB 8283A 90 le Forward Input Current Ve = 0.45V In Reverse Input Current [so [a Va = 5.25V Vou Output LOW Voltage Jo. = 32 MA joas |, Vou Output HIGH Voltage [2a [- | Ton = 5 MA Tore Output Off Current Vorr = 0.45 to 5.25V Ve Input LOW Voltage [os | v Voc = 5.0V2 Via input HIGH Voltage [20 |- | F=1MHe Cw Input Capacitance 12 pF Vous = 2.5V, Vec = 5V Ta = 25°C 1) Stresses above those listed under 2) Output Loading: fo, = 32 MA; Ton = —5 mA; “Absolute Maximum Ratings” may cause Ci = 300 pF permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 737
A.C. Characteristics Tx = Oto +70°C; Voc = +5V + 10% Loading Outputs: fo. = 32 MA; Ion = —5 MA; C, = 300 pF symbol arameter [itin. —_[Max. —| nits | Test Conditions tivov Input to Output Delay —Inverting —Non-Inverting tsHov STB to Output Delay —Inverting 10 —Non-Inverting 10 2) tenoz Output Disable Time [Is _[e | tevov Output Enable Time Oe Eo tvs Input to STB Setup Time fo Tsux Input to STB Hold Time [2 | terse STB HIGH Time [is | fu fo.on _| Input, Output Rise Time [20 | From 0.8 to 2.0V ‘wi fonar__| Input, Output Fall Time From 2.0 to 0.8V A.C. Testing Input, Output Waveform Input/Output 1S—+— Test Points-=1.5 0.45 are made at 1.5V for both a logic “1” and “0”. Waveforms All timing measurements are made at 1.5 V unless otherwise noted. Timing Inputs — fiyst al ASX STB sHsi OF 4 E tivov oz ELOV Voy OV Outputs ee Vo. +0.1V tsuow ? 1) SAB 8283A Only — Output may be momentarily 2) See waveforms and test load circuit. invalid following the high going STB transition. 738
a Output Test Load Circuits 15V 15V 214V 33Q 1802 52.72 Output Output 0? Output a 300 pF 300pF 300 pF L 3-state to Vo, 3-state to Yo, switching Output Delay vs. Capacitance ns ns 50 50 SAB SAB 8282A 8283A | 40 40 z Baan z PELL & o S 30 a | S 30 uP 0 0 0 200 400 «600 = 800 1000pF 0 200 400 600 «= 800 1000 pF Load ——= Load ——= 739
Ordering Information
Type Description Ordering code SAB 8282A—P Octal Latch, non inverting (plastic) Q67020-Y149 SAB 8283A—P Octal Latch, inverting (plastic) Q67020-—Y150 740