SAB8032 SIEMENS | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 18

Technical content

SIEMENS SAB 8052/8032 Family 8-Bit Single-Chip Microcontroller SAB 8052B Microcontroller with factory mask programmable ROM (8K) SAB 8032B Microcontroller for external ROM @ Versions for 12 MHz/ 16 MHz/20 MHz @ Multiply and divide in 4 us/3 1s/2.4 ps operating frequency @ Six interrupt vectors, two priority levels @ 8 Kx 8 ROM (SAB 8052B only) @ RAM power-down supply @ 256 x8 RAM @ Packages P-DIP-40 and PL-CC-44 @ Four 8-bit ports, 32 I/O lines @ Full backward compatibility with SAB @ Three 16-bit timer/event counters 8051/8031 @ High-performance _full-duplex _ serial @ Three temperature ranges available channel with flexible transmit/receive baud Oto 70°C rate capability -40 to 85°C @ External memory expandable up to 128 40 to 110°C Kbytes @ Boolean processor © Most instructions execute in: 1 us instruction cycle time at 12 MHz 750 ns instruction cycle time at 16 MHz 14 600 ns instruction cycle time at 20 MHz Figure 12 —— Pin Configuration P-DIP-40 PL-CC-44 rayp.0 TS 401] Ne Fe] e-an Roe 846883 raver i[f2 saf] poo a00 ee 222ea pi2(]s ssf] Por aot BSRBITS6 -Begsg2 pis(}e gif] poz a02 prelfs ef] Pos a0 pis(s ssf] po apa P1sq7 39 POA ADA piel}? sal] pos 205 P1.6q8 e) 386 PO.5 ADS profs suf] P06 ave P1749 37H PO.6 ADE . 151% (fs sf] vo? a07 RST/ Yoo C}10 36) P0.7 ADT woolo gag IT RxD/P3.0 G11 ah novsi(fiy 8032 sof} ae N.C.C12 SAB 8052/8032 Family 34) N.C. itiyes 2 [s2 ety of] Pan Tx0/P3.113 33 ALE amriessitis asf] 7 a5 iNTO/P3.2 chs 32 PSEN roves athe ofeee ae INT /P3.3 Chis 31 P2.7 AIS iikyes.e [fie as{] P24 a12 TPES iy 9 9 24 20 25 24 25 26 7 WY Oe? ANS wyes7 (liv zafl eas at Boo ta = MRSS vane (he 2s[] p22 ato peg eSosedag rat fis aif] Pe as Sie ** egoua sie g2e=zg (20 aif] peo a8 =a © Siemens Components, Inc. 4et M@™ 8235605 0055780 L4T me

The SAB 8052/8032 family are standalone, _ write data memory, 32 I/ O lines, three 16-bit high-performance single-chip _microcon- _timer/counters, a six-source, two-priority- trollers fabricated in +5V advanced level nested interrupt structure, a serial VO N-channel, silicon-gate Siemens MYMOS port for either multiprocessor ~com- technology, packaged in a 40-pin plastic munications, /O expansion, or full-duplex dual-in-line package (P-DIP-40) or 44-pin —_ UART, as well as an on-chip oscillator and Plastic leaded chip carrier (PL-CC-44) clock circuits. Package. It is backwardly compatible with 4, «, 7 a , systems that require extra capability, the the SAB 8051A/8031A and Provides the standard TTL compatible memories and the hardware features, architectural enhance- ‘ i" 4 byte-oriented SAB 8080 and SAB 8085 ments, and instructions that are necessary to peripherals can be used to expand the make it a powerful and cost-effective P i bigs Be SAB 8052 / 8032 family. controller for applications requiring up to 64 ’ Kbytes of program memory and/or up to 64 The parts are ayailable for standard Kbytes of data memory. temperature range (0 to 70 °C) and extended The controllers of the SAB 6052/8032 fo"Tho'sd"e ranges (— 40 10 85°C and — 40 family contain a non-volatile 8 Kx 8 read-only . Program memory, a volatile 256 x 8 read/ Figure 13 SAB 8052 / 8032 family SAB 8051/8031 RAM RAM 126x8 > 128x8 rat 0 K=> vo rats KD "0 ” cru Usaar frat 2 KD "e . > ROM = wcaois7e (2 wm 8235605 0055781 O8b ml © Siemens Components, ne

Ordering Information

(it single- microcontroller) ‘SAB 80328-P for external memory, 12 MHz. saan SAB 8032B-16-P for external memory, ‘SAB 8032B-20-P for external memory, Sa) zo SAB 8052B-P with 8-KByte mask-programmable ROM, ‘SAB 80528-16-P with 8-KByte mask-programmable ROM, © Siemens Components, Inc. 4-23 M™ 6235605 0055742 Tle EEO ———

~~ 2 -_ e _- 2 <> joe | S XTAL2 3 z _— > 3 EA 5S __ —?T PSEN <— T2EX SAB ALE = 8032 iS SE 8052 > ~ Family RxD —» +) — BE me MCLOO751 a 424 mm a235605 0055783 959 a © Siemens Components, ine. a

Pin Definitions and Functions Symbot [Pine Tipu) anaion omar (©) P1.0-P1.7 PORT 1 is an 8-bit quasi-bidirectional /O port. Itis used for the low-order address byte during program verification. Port 1 can sink/source four LS TTL loads. Port 1 also contains the timer 2 pins as a secondary func- tion. The output latch corresponding to a secondary func- tion must be programmed to a one (1) for that function to operate. The secondary functions are assigned to the pins of port 1, as follows: ~T2 (P1.0). Input to counter 2. ~ T2 (EX (P1.1). Capture/Reload trigger of timer 2. RST/veo RESET input. A high level on this pin resets the SAB 8052B. A small intemal pulldown resistor permits pow- @r-on reset using only a capacitor connected to VCC. If V Po is held within its spec while V cc drops below spec, V po will provide standby power to the RAM. When V ro is low, the RAM’s current is drawn from Voc. P3.0-P3.7 [10-17 | 11 PORT 3 is an 8-bit quasi-bidirectional /O port. It also con- 13-19 tains the interrupt, timer, serial port and RD and WR pins ‘that are used by various options. The output latch corre- : sponding to a secondary function must be programmed to a one (1) for that function to operate. Port 3 4 can sink/source four LS TTL loads. The secondary func- tions are assigned to the pins of port 3, as follows: ~ RxD/data (P3.0). Serial port's receiver data input (asynchronous) or data input/output (synchronous). = TxDiclock (P3.1). Serial port's transmitter data output (asynchronous) or clock output (synchronous). — INTO (P3.2). Interrupt 0 input or gate contro! input for counter 0. . = INTI (P3.3). Interrupt 1 input or gate control input for counter 1. — TO (P3.4). Input to counter 0. -T1(P3.5). Input to counter 1. — WR (P3.6). The write control signal latches the data byte from port 0 into the external data memory. - RD (P3.7). The read control signal enables extemal data memory to port 0. XTAL1 19 21 XTAL 1 input to the oscillator's high gain amplifier. Re- XTAL2 18 20 quired when a crystal is used. Connect to vss when exter- nal source is used on XTAL 2. XTAL 2 output from the oscillator’s amplifier. Input to the in- ternal timing circuitry. A crystal or extemal source can be used. P2.0-P2.7 |21-28 PORT 2s an 8-bit quasi-bidirectional VO port. It also emits the high-order address byte when accessing extemal mem- ory. Itis used for the high-order address and the control sig- nals during program verification. Port 2 can sink/source four LS TTL toads. ‘© Siemens Components, inc, 4:25 MB 6235605 0055784 895 me

SAB 8052/8032 Family : : Pin Definitions and Functions (continued) Symbol [Pie [Input () [Function eiceea [mm PSEN ‘The Program Store Enable output is a control signal that enables the extemal program memory to the bus during ex- temal fetch operations. Itis activated every six oscillator pe- tiods, except during external data memory accesses. Re- mains high during internal program execution. ALE Provides Address Latch Enable output used for latching the address into external memory during normal operation. Itis activated every six oscillator periods except during an ‘extemal data memory access. EA External Access enable. When held at a TTL high level, the ROM-versions executes instructions from the internal ROM when the PC points to the intemal ROM address space. When held at a TTL low level, the ROM-versions fetch all in- structions from extemal program memory. For the ROM- less versions this pin must be tied low. PO0.0-PO.7. Port Q is an 8-bit open drain bidirectional /O port. Itis also the multiplexed low-order address and data bus when using ‘external memory. It is used for data output during program Verification. Port 0 can sink/source eight LS TTL loads. vec +5 V Power Supply during operation and program verification, NC 1,12, No Connection 23,34 SSS 4-26 © Siemens Components, inc. MB 8235605 0055785 72] a acc

t oon eee == fee co Tae 7 ime 1 1 \\ 1 \\ Oscillator rogram Three 16-Bit | | ' & Memory oe Gres Timer/Event |! | Timing (ROM Versions only) io Memory Counters \\ 1 1 1 y 1 | L _ 1 \\ cPU - | 1 ' f 1 i \\ i ; ib Jb ! | | Programmable] | 1 {| 64 Kbyle Bus Serial port 1 1 | Expansion Programmable |/0 leFull duplex UART] | I | Control lesynchronous 1 ' i Shifter \\ wcea07s6 Interrupts Control Parallel Ports Serial Serial Address Data Bus Input Output and |/0 Pins . SS © Siemens Components, Inc. 427 M@™@ 6235605 0055746 bho a 0 dQd,)d)CQ)(Q(OQOOQO OOOO OO OOOO OOOO OO OOOO EE EE ————oOV7OEO Oe

Absolute Maximum Ratings Note: Stresses above those listed under Ambient temperature under bias fone Recline iA SAB 8052810828 ns 010 470 C device. "The la svese stg only

96 FomperatUre and functional operation of the

Voltage on any pin with device at these or any other specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC Characteristics Voc = 5 V + 10%; Vss = 0 V Ta= 0 to +70 °C for SAB 8052B/8032B ™ eS" | ee vin Input high voltage vec+ 0.5 - (except RST/Vpo and XTAL 2) Vint Input high voltage to Voc+0.5 | V | XTALI to vss RST/vro for reset, XTAL 2 Veo Power down voltage v [| vec=0v to RST/vPo Ports 1, 2,3 Vou ‘Output low volta Vo | fu =3.2mA Port 0, ALE, PSEN Vou Output high voltage 24 V | on =-80yA Ports 1, 2,3 Vous ‘Output high voltage V | eH == 400A Port 0, ALE, PSEN SSS “28MM 8235605 0055787 ST4 i © Siemens Components, nc. tS

DC Characteristics (cont'd) ‘Symbol | Parameter Test Conditions min. m Logical 0 input current ~ Ww =0.45V Ports 1, 2,3 m2 Logical 0 input current XTAL 2 XTAL1 = Yss ‘SAB 8052B/8032B - 12/16/20 ma | m=0.45V ma Input high current to yA [v= Voc-1.5V RST/Veo for reset rn) Input leakage current WA \\0V<vN< Veo to port 0, EA ec Power supply current All outputs SAB 80528/8032B 175 mA | disconnected SAB 8052B-16/8032B-16 175 mA SAB 8052B-20/8032B-20 175 mA Teo Power down current voc = 0 V; So Pa a © Siemens Components, inc. 4-29 @™ 6235605 0055786 430 EEE

AC Characteristics for SAB 8052B/8032B, 12 MHz Voc = § V + 10%; Vss = 0 V (Cv for port 0, ALE and PSEN outputs = 100 pF; C: for all other outputs = 80 pF) Ta=0 to + 70°C for SAB 8052B/8032B . Please refer to AC characteristics for SAB 8051A/8031A, 12MHz AC Characteristics for SAB 8052B/8032B, 16 MHz Voc = 5 V+ 10%; Vs=0V (Cc for port 0, ALE and PSEN outputs = 100 pF; C: for all other outputs = 80 pF) Ta= 0 to 70°C; for SAB 8052B/8032B-16 Please refer for AC characteristics to the SAB 8051A/8031A-16, 16MHz SSS 4-30 © Siemens Components, Inc. mm 8235605 0055789 377 a a

AC Characteristics for SAB 8032B-20, 20 MHz Ta= 0 t0 70°C; Voc = 5 Vt 10%; Vos= OV (Cv for port 0, ALE and PSEN outputs = 100 pF; C: for all other outputs = 80 pF) a ..4 20 MHz clock Aker. = 1.2 MHz to 20 MHz [min, [max fin. [max | Program Memory Characteristics a ram | PSE wa = daca [=r a *) Interfacing the SAB 8032B-20 to devices with float times up to 45 ns is permissible. This limited bus contention will not cause any damage to port 0 drivers. © Siemens Components, Inc. 431 @™® 46235605 0055790 099 eee —V_ETe—e

AC Characteristics for SAB 8032B-20, 20 MHz (cont'd) ‘Symbol Limit Values Unit 20MHzclock | t/icLct = 1.2 MHz to 20 MHz External Data Memory Characteristics muon | Wiguse wan [ano [= Jar t00 [= [re rR mor [Datareseter@ fa [- fo th wor [Daa teataterAD == [wo [- [mart Ire wor [MBean [=| Le um [NEWWRaRS [100 [a0 [saarso|onaes [re wom [Adesso Wor fro [= [waanta6 |= [re amt [WRorAD nono aLe nin [20 [so aa90 mean [ns row | DatavatstoWA anetin [5 [= mamas [= [rs roan [DaaseupreteWR [200 [= [teants0 [= [ne mwron [Oatarodianerwa ft = fens [= a maz [accresstoataterAD [= fe [| fo External Clock Drive XTAL2 sat [Osstorporos = 508 Tr et Romane is rm mex flowin = fs A ore [Fatime es SSS 4-32 ‘© Siemens Components, Inc. M™ 8235605 0055791 Tes

ROM Verification Characteristics for SAB 8052B/8032B Family Ta= 25°C+5 °C; Voo= 5 V+ 10%; Ves = OV Symbol _| Parameter "Limit Values Unit tov ‘Address to valid data [- [aa | ns re1az Data ficat after ENABLE fo s[aBrace [rs thact Oscillator frequency 4 | MHz Figure 16 ROM Verification Port , 2 (scree) a 4 PortO Data OUT =f | teoy voz a P2.7 ENABLE I we000049 Microcontroller Address ~~ [Data Inputs SAB 80528 P1.0-P1.7 =A0-A7 Port0 =D0-D7| P2.5—P2.6, PSEN =vss 8Kx8 | P20-Pa24=AB-At2 ALE, EA =m Rev/veD =v Waveforms Please refer to SAB 8051A/8031A for AC waveforms. a ‘© Siemens Components, Inc. 4-33 Wm 46235605 0055792 4b) eee aaa

S ~ i 15,24802 gq .2480.2—m aac aaaanaa aan { _Pe ! at —aHg2s™ 254 1.5mox 045°" al.3 4 E- thos | 15,24¢12 | 40 21 [ GPD0SOSS ahahaha 50.9-o8 .4max Approx. weight 5.99 Dimensions in mm Plastic Package, P-DIP-40 (Dual-In-Line Package)

20 B 40 DIN 41870 T10

© Siemens Components, Inc. ot MB 6235605 OOSb4b2 379 a

1 44 . poo eet Sooo d a h | 0 t 1 1) 0 U q n 9 ; Le 8 q I FoF og 0 q 3? 1 3 1 N lt ) . SSS See oo 0.5 min 1.27 3.55 167 02 0.81 max. 438 03 Dimensions in mm Plastic Package, P-LCC-44 (Plastic Leaded—Chip Carrier) -SMD 92 © Siemens Components, Inc. @™§ 6235605 OOSb4b3 2cOS mm

25.15 +0.3 24,21+0.3 Cl hh oh aS [ee We . u SE § im q p SEIN i p ote q p =o 21s} 4 E 4 +03| 4 ‘ eI 1 p Se] q p 212 GE} q ! +05 CE] - d b ote 24.21 f ds +03] 5 det d t =o , 043 hq q £01 TJ q " oe =| | | El : P27 | Foy 5 ee | 1.03 0.5min 1.27 0.74 + 0.07 4.64 + 0.45 Dimensions in mm Plastic Package, PLCC-68 (SMD) (plastic leaded chip carrier) ‘Components, I 93 © Siemens ents, Ine MB 6235605 OOSb4E4 141 om eee

80.295 29.31 Index Marking 02 1 a4 Se ee _ : I = | i q H B ra | | B SI q : f = 4 | | B = 2 4 i BS 38 = R 4 r Pe § i. | | = f : H = ts 1.27 0.81 max 0.5 min | . 4403 as Dimensions in mm . : : Plastic Package, PLCC-84 (SMD) (plastic leaded chip carrier) *4 MM 8235605 OOSb4b5 085 mm Siemens Components, In.

Pin Mark No. 1 915+0'06 3 1 100 + A s C\\ IAIN sa \\ Z S © = = a = a = = : » = Code E 8 as Ve =. = = = = 2S = mf —— . == 0.5 min, | Ca = C7 1 4320.68.97 °° C/T = ‘ {o.1] 100 pins | 9 | SMD = Surface Mounted Device Dimensions in mm Plastic Package, P-QFP-100 (Plastic Quad-Flat-Pack) - SMD © Siemens Componenis,ine. 8235605 OOSb4bh Th4 Mm * a