S3029A

S3029 AMCC | Alldatasheet

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S3029SONET/SDH/ATM 155 MBIT/S QUAD TRANSCEIVER February 19, 1999 / Revision B BiCMOS PECL CLOCK GENERATOR DEVICE SPECIFICATION SONET/SDH/ATM 155 MBIT/S QUAD TRANSCEIVER S3029

FEATURES

• Complies with ANSI, Bellcore, and ITU-T specifications for jitter tolerance, jitter generation
• Five on-chip high frequency PLLs with internal loop filters for clock recovery
• Supports clock recovery for STS-3/STM-1 (155.52 Mbit/s) NRZ data
• Clock Multiplier PLL for transmit clock generation
• 19.44 or 51.84 MHz reference frequency
• Lock detect—monitors run length and frequency
• Low-jitter differential interface
• 3.3V supply
• Available in a 64-pin TQFP package
• Compatible with IgT WAC-413 ATM Quad- UNI processor GENERAL DESCRIPTION The function of the S3029 clock synthesis and recov- ery unit is to derive high speed timing signals for SONET/SDH-based equipment. The S3029 is imple- mented using AMC C’s proven Phase Locked Loop (PLL) technology. The S3029 receives four STS-3/STM-1 scrambled NRZ signals and recovers the clock from the data and generates a 155 MHz transmit clock. The chip out- puts a differential PECL bit clock and retimed data. Figure 1 shows a typical network application. The S3029 utilizes five on-chip PLLs which consist of a phase detector, a loop filter, and a voltage con- trolled oscillator (VCO). The phase detector compares the phase relationship between the VCO output and the serial data input. A loop filter converts the phase detector output into a smooth DC voltage, and the DC voltage is input to the VCO whose fre- quency is varied by this voltage. A block diagram is shown in Figure 2. There is a single clock multiplier PLL which generates a 155 MHz transmit clock from a 19.44 or 51.84 MHz input.

Figure 1. System Block Diagram

155 Mbp/s

Figure 2. Functional Block Diagram

155 MHz CLK

equivalent of 1 dB power penalty. the waveforms shown in Figure 4. Figure 4. Clock Output to Data Transition Delay

155.52 MHz

Figure 3. Input Jitter Tolerance Specification

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S3029SONET/SDH/ATM 155 MBIT/S QUAD TRANSCEIVER February 19, 1999 / Revision B emaNniPl eveLO /I# niPn oitpircseD WOPoXT 0WOPoURC 1WOPoURC 2WOPoURC 3WOPoURC latigiD rewoP —8 4 )gnilpuocedlaudividni(V3.3+ DRGoXT 0DRGoURC 1DRGoURC 2DRGoURC 3DRGoURC latigiD dnuorG —7 4 )dnuorg(V0 CCVOCV CCVAPO 0WOPURCA 1WOPURCA 2WOPURCA 3WOPURCA golanA rewoP —8 5 dna)60A23MLBataruM.g.e(daebetirreFlaudividniaivV3.3+ .gnilpuocedlaudividni DRGOCV DRGAPO 0DRGURCA 1DRGURCA 2DRGURCA 3DRGURCA golanA dnuorG —7 5 )dnuorg(V0 S3029 Transceiver Pin Assignment and Descriptions (continued)

Figure 5. S3029 64 TQFP Package

Figure 6. S3029 64 TQFP Pinout

S3029 SONET/SDH/ATM 155 MBIT/S QUAD TRANSCEIVER February 19, 1999 / Revision B Performance Specifications retemaraPn iMp yTx aMs tinUn oitidnoC OCVlanimoN ycneuqerFretneC 25.551z HM kcolCecnerefeR ecnareloTycneuqerF 02- 001- 02+ 001+ mpp mpp timsnarT3-COTENOSroF ecnareloTycneuqerF timsnarTMTAs/tibM551roF ecnareloTycneuqerF 3-STS/3-CO egnaRerutpaC 1 egnaRkcoL tuptuOkcolC elcyCytuD0 4 ± mpp002 %21-,8+ 06I Ufo% ecnereferdexifottcepserhtiW ycneuqerf emiTkcoLnoitisiuqcA 1 3-STS/3-CO 46 µ ces puderewopydaerlaecivedhtiW .KLCFERdilavdna kcolCecnerefeR elcyCytuDtupnI 030 7 fo% doirep &esiRkcolCecnerefeR semiTllaF 0.2s ne dutilpmafo%09ot%01 &esiRtuptuOLCEP semiTllaF 5.1s n 05,%09ot%01 Ω V2-CCVot pacfp5,daoltnelaviuqe N/POKLCXT .I.U51.0=timilcepsHDS/TENOS 1 Guaranteed but not tested.

S3029SONET/SDH/ATM 155 MBIT/S QUAD TRANSCEIVER February 19, 1999 / Revision B Recommended Operating Conditions Absolute Maximum Ratings retemaraPn iMp yTx aMt inU )lairtsudni(saiBrednuerutarepmeTtneibmA0 4-5 8+C ° )laicremmoc(saiBrednuerutarepmeTtneibmA0 0 7+C ° saiBrednuerutarepmeTnoitcnuJ0 1-0 31+C ° DNGottcepseRhtiwCCVnoegatloV4 1.33 .36 4.3V niPtupnILTTynAnoegatloV0 .0C CVV niPtupnILCEPynAnoegatloV2 -CCVC CVV 05(tnerruCecruoStuptuOLCEP Ω )V2-ccVot4 15 2A m tnerruCylppuSCCI 5226 72A m retemaraPn iMp yTx aMt inU saiBrednuerutarepmeTesaC5 5-5 21+C ° saiBrednuerutarepmeTnoitcnuJ5 5-0 51+C ° erutarepmeTegarotS5 6-0 51+C ° DNGottcepseRhtiwCCVnoegatloV5 .0-0 .7+V niPtupnILTTynanoegatloV5 .0-5 .5+V niPtupnILCEPynanoegatloV0 .2-CCVC CVV tnerruCkniStuptuOLTT 02A m tnerruCecruoStuptuOLTT 01A m tnerruCecruoStuptuOLCEPdeepShgiH 05A m egatloVegrahcsiDcitatS 005V

S3029 SONET/SDH/ATM 155 MBIT/S QUAD TRANSCEIVER February 19, 1999 / Revision B TTL Input/Output DC Characteristics1 1. These conditions will be met with no airflow. 2. When not used, tie the positive differential PECL pin to VCC and the negative differential PECL pin to ground via a 3.9K resistor. (TA = -40°C to +85°C, VCC = 3.3 V ±5%) PECL Output Loading Recommended Termination of Differential PECL Signals PECL Input/Output DC Characteristics1,2 (TA = -40°C to +85°C, VCC = 3.3V ±5%) 2. These input levels provide a zero–noise immunity and should only be tested in a static, noise-free environment. Symbol Parameter Test Conditions Min Max Unit VIL VIH2 IIL IIH II IOS VIK VOL VOH Input LOW Voltage Input HIGH Voltage Input LOW Current Input HIGH Current Input HIGH Current at Max VCC Output Short Circuit Current Input Clamp Diode Voltage TTL Output LOW Voltage TTL Output HIGH Voltage Guaranteed Input LOW Voltage for all inputs VCC = MAX, VIN = 0.5V VCC = MAX, VIN = 2.7V VCC = MAX, VIN = 3.5V VCC = MAX, VOUT = 0.5V VCC = MIN, IIN = -18.0mA VCC = MIN, IOL = 2mA VCC = MIN, IOH = -.10mA 2.0 -400.0 -50.0 2.2 0.8 50.0 1.0 -5.0 0.5 Volts Volts uA uA mA mA Volts Volts -1.2 Volts Guaranteed Input HIGH Voltage for all inputs Symbol VIL VIH VIL VIH VOL VOH VOD VID IIHD IILD Input LOW Voltage Input HIGH Voltage Input LOW Voltage Input HIGH Voltage Output LOW Voltage Output HIGH Voltage Guaranteed Input LOW Voltage for single-ended inputs Guaranteed Input HIGH Voltage for single-ended inputs Guaranteed Input LOW Voltage for differential inputs Guaranteed Input HIGH Voltage for differential inputs 400 ohm termination to GND 400 ohm termination to GND Differential Output Voltage Differential Input Voltage VID = 500mV VID = 500mV-0.500 -0.500 0.390 0.200 0.500 VCC -2.000 VCC -1.225 VCC -1.441 VCC -0.570 VCC -2.000 V CC -0.700 VCC -1.750 V CC -0.450 VCC -2.000 V CC -1.300 VCC -1.110 V CC -0.670 Volts Volts Volts Volts Volts Volts Volts Volts µA µA 20.000 20.000 1.400 1.000Output Diff. Voltage Input Diff. Voltage Diff. Input High Current Diff. Input Low Current IIH SD Inputs have internal 1K to GND load resistor. SD Inputs have internal 1K to GND load resistor. mASingle-ended input High Current IIL mASingle-ended input LOW Current Parameter Min Typ Max Unit Conditions 400Ω 400Ω 100Ω 400Ω

S3029SONET/SDH/ATM 155 MBIT/S QUAD TRANSCEIVER February 19, 1999 / Revision B X XXXX XX Prefix Device Package

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