S24163 SUMMIT | Alldatasheet

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SUMMIT MICROELECTRONICS, Inc. • 300 Orchard City Drive, Suite 131  Campbell, CA 95008  Telephone 408-378-6461  Fax 408-378-6586  www.summitmicro.com Characteristics subject to change without notice© SUMMIT MICROELECTRONICS, Inc. 2000 2014 2.1 8/2/00 SUMMIT MICROELECTRONICS , Inc. S24163

FEATURES

  • Precision Supply Voltage Monitor — Active Low — Integrated memory write lockout  Guaranteed RESET (RESET#) assertion to VCC = 1V  Power-Fail Accuracy Guaranteed  No External Components  3V and 5V system versions  Low Power CMOS — Active current less than 3mA — Standby current less than 25µA  Memory Internally Organized 2k X 8 — Two Wire Serial Interface (I 2C™) – Bidirectional data transfer protocol – Standard 100KHz and Fast 400KHz Precision RESET Controller with 16K I2C Memory  High Reliability — Endurance: 100,000 erase/write cycles — Data retention: 100 years  8-Pin SOIC Packages OVERVIEW The S24163 is a power supervisory device with 16,384- bits of serial E 2PROM. It is fabricated using SUMMIT's advanced CMOS E2PROM technology and is suitable for both 3 and 5 volt systems. The S24163 is internally organized as 2048 x 8. It fea- tures the I2C serial interface and software protocol allow- ing operation on a simple two-wire bus. BLOCK DIAGRAM 3 and 5 Volt Systems GND VCC RESET# VTRIP RESET PULSE GENERATOR 5kHz OSCILLATOR RESET CONTROL MODE DECODE ADDRESS DECODER WRITE CONTROL DATA I/O E2PROM MEMORY ARRAY 1.26V SCL 6 SDA 5 2014 T BD 2.0

2014 2.1 8/2/00 ENDURANCE AND DATA RETENTION The S24163 is designed for applications requiring up to 100,000 erase/write cycles and unlimited read cycles. It provides 100 years of secure data retention, with or without power applied, after the execution of 100,000 erase/write cycles.

APPLICATIONS

The S24163 is ideal for applications requiring low voltage and low power consumption. This device provides microcontroller RESET control and can be manually resettable. This device also uses a cost effective, space- saving, 8-pin SOIC or PDIP plastic package. Typical applications include alarm devices, electronic locks, meters, keys, pagers and cellular phones. RESET CONTROLLER DESCRIPTION The device provides a precise reset output to a microcontroller and it’s associated circuitry ensuring cor- rect system operation during power-up/down conditions and brownout situations. The output is open drain, allow- ing control of the reset function by multiple devices. During power-up the reset output remains in a fixed active state until V CC passes through the reset threshold and remains above the threshold for 200ms. The reset output is valid whenever VCC ≥ 1V. If VCC falls below the threshold for more than tGLITCH the device will immediately generate a reset and drive the output. The reset pin is an I/O; therefore, forcing the pin to the active state can also manually reset the device. Because the I/O needs to be an open drain, the internal timer can only be triggered by the leading edge of the input. The resulting reset output will either be t PURST , or the exter- nally applied reset signal, whichever is longer. This can provide an affective debounce or reset signal extender solution. CHARACTERISTICS OF THE I 2C BUS General Description The I2C bus was designed for two-way, two-line serial communication between different integrated circuits. The two lines are a serial data line (SDA), and a serial clock line (SCL). The SDA line must be connected to a positive supply by a pull-up resistor, located somewhere on the bus (See Figure 1). Data transfer between devices may be initiated with a START condition only when SCL and SDA are HIGH (bus is not busy). PIN DESCRIPTIONS SCL — Serial Clock: The SCL input is used to clock data into and out of the device. In the WRITE mode data must remain stable while SCL is HIGH. In the READ mode data is clocked out on the falling edge of SCL. SDA — Serial Data: The SDA pin is a bidirectional pin used to transfer data into and out of the device. Data may change only when SCL is LOW, except START and STOP conditions. It is an open-drain output and may be wire- ORed with any number of open-drain or open-collector outputs. RESET# — Reset: This is an active low open drain output. It is driven low whenever V CC is below VTRIP. It is also an input and can be used to debounce a switch input or perform signal conditioning. The pin has an internal pull-up and should be left unconnected if the signal is not used in the system. However, an external pull-up resistor must be connected when the pin is tied to a system RESET# line. V CC — Power: VCC is the voltage input, typically 2.7 to 5.5 volts. GND — Ground: Power return. NC — No Connect: The no connect inputs are not used. However, to ensure proper operation, they can be uncon- nected or tied to ground. They must not be tied to VCC . PIN CONFIGURATION NC RESET# NC VSS VCC NC SCL SDA SMS24163 8-Pin PDIP or 8-Pin SOIC 2014 T PCon 2.0

FIGURE 6. PAGE/BYTE WRITE MODE page to be written during tWR . address, ACKnowledge and data transfer sequence. The S24163 is capable of a 16-byte page write operation. will respond with an ACKnowledge. all inputs are disabled during the internal write cycle.

FIGURE 9. RANDOM ADDRESS BYTE READ MODE WRITE) followed by the address of the word it is to read. S24163 to the desired address. the address, acknowledge and data transfer sequence.

ACKnowledge, and issues a STOP conditions. address, acknowledge and data transfer sequence. FIGURE 10. SEQUENTIAL READ OPERATION (starting with a Random Address READ)

2014 2.1 8/2/00 ABSOLUTE MAXIMUM RATINGS NOTE: These are STRESS ratings only. Appropriate conditions for operating these devices are given elsewhere in this specification. Stresses beyond those listed here may permanently damage the part. Prolonged exposure to maximum ratings may affect device reliability. DC ELECTRICAL CHARACTERISTICS S24163, TA = -40°C to +85°C, VCC = 5V + 10% S24163-3, TA = -40°C to +85°C, VCC = 2.7V to 5.5V Symbol Parameter Conditions Min Max Units SCL = CMOS Levels @ 100KHz V CC =5.5V 3 mA ICC Supply Current (CMOS) SDA = Open All other inputs = GND or VCC VCC =3.3V 2 mA ISB Standby Current (CMOS) SCL = SDA = V CC VCC =5.5V 50 µA All other inputs = GND ILI Input Leakage V IN = 0 To VCC 10 µA ILO Output Leakage V OUT = 0 To VCC 10 µA VIL Input Low Voltage S0, S1, S2, SCL, SDA, RESET 0.3xV CC V VIH Input High Voltage S0, S1, S2, SCL, SDA 0.7xV CC V VOL Output Low Voltage I OL = 3mA 0.4 V VCC =3.3V 25 µA 2014 PGM T1 1.0 2.7V to 4.5V 4.5V to 5.5V Symbol Parameter Conditions Min Max Min Max Units fSCL SCL Clock Frequency 0 100 400 KHz tLOW Clock Low Period 4.7 1.3 µs tHIGH Clock High Period 4.0 0.6 µs tBUF Bus Free Time Before New Transmission 4.7 1.3 µs tSU:STA Start Condition Setup Time 4.7 0.6 µs tHD:STA Start Condition Hold Time 4.0 0.6 µs tSU:STO Stop Condition Setup Time 4.7 0.6 µs tAA Clock to Output SCL Low to SDA Data Out Valid 0.3 3.5 0.2 0.9 µs tDH Data Out Hold Time SCL Low to SDA Data Out Change 0.3 0.2 µs tR SCL and SDA Rise Time 1000 300 ns tF SCL and SDA Fall Time 300 300 ns tSU:DAT Data In Setup Time 250 100 ns tHD:DAT Data In Hold Time 0 0 ns TI Noise Spike Width Noise Suppression Time Constant 100 100 ns @ SCL, SDA Inputs tWR Write Cycle Time 10 10 ms AC ELECTRICAL CHARACTERISTICS S24163, TA = -40°C to +85°C, VCC = 5V + 10% S24163-3, TA = -40°C to +85°C, VCC = 2.7V to 5.5V 2014 PGM T2 1.0

FIGURE 11. BUS TIMING

8 Places

FIGURE 12. RESET OUTPUT TIMING

8 Pin SOIC (Type S) Package JEDEC (150 mil body width)

2014 2.1 8/2/00 NOTICE SUMMIT Microelectronics, Inc. reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. SUMMIT Microelectronics, Inc. assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained herein reflect representative operating parameters, and may vary depending upon a user’s specific application. While the information in this publication has been carefully checked, SUMMIT Microelectronics, Inc. shall not be liable for any damages arising as a result of any error or omission. SUMMIT Microelectronics, Inc. does not recommend the use of any of its products in life support or aviation applications where the failure or malfunction of the product can reasonably be expected to cause any failure of either system or to significantly affect their safety or effectiveness. Products are not authorized for use in such applications unless SUMMIT Microelectronics, Inc. receives written assurances, to its satisfaction, that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; and (c) potential liability of SUMMIT Microelectronics, Inc. is adequately protected under the circumstances. © Copyright 2000 SUMMIT Microelectronics, Inc. I2C is a trademark of Philips Corporation.

ORDERING INFORMATION

A = 4.5V to 5.5V VTRIP min. @ 4.25V B = 4.5V to 5.5V VTRIP min. @ 4.50V Tape & Reel Option Blank = Tube T = Tape & Reel S24163 SA T Base Part Number Package S = 8 Lead 150mil SOIC 2014 Tree 2.0