S1T8528X0

S1T8528 SAMSUNG | Alldatasheet

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Technical content

ENHANCED-1 CHIP CT0 RF IC S1T8528 INTRODUCTION S1T8528 is a 1 CHIP RF IC which can be used in high performance CTO CLP systems at max. 60MHz. S1T8528 is designed to include a receiver, PLL and COMPANDER to minimize PCB space requirements. Improved RX characteristics such as inter-modulation, spurious response and adjacent channel interface have been included to satisfy the universal standards. The 1 CHIP RF IC has considerably reduced the cost by including a build-in 1 ’ st mixer, low battery detector, fMCU, RSSI, RF regulator and speaker amp. Also, it fulfills carrier detector threshold control, speaker volume control, operating mode selection and MUTE function using S/W, thus making external application easier.

FEATURES

• Operating voltage range: 2.0V ~ 5.5V
• Typical supply current: 8.9mA at 3.6V
• Built-in speaker volume control and speaker amplifier
• Built-in splatter filter
• Support mode selection ( Active, Rx, Standby and Inactive mode )
• FM Receiver — Excellent Receiver characteristics — RSSI ( Linear ) and Carrier detector output ( Digital ) function
• Compander — Easy gain control and application using external component —- Included ALC (Automatic Level Control) circuit
• Universal PLL — RX (TX) divided counter range : 1/16 ~ 1/16383 — Reference frequency divided counter range : 1/16 ~ 1/4095 — Lock detector signal output — Serial interface with MICOM for controlling each block — Clock Output for MICOM oscillator substitution. ( X-tal divided clock by 2, 3, 4 and 5 )

ORDERING INFORMATION

< 10.7MHz crystal filter used > Input sensitivity Adjacent channel rejection Spurious rejection (image of the second IF) Intermodulation rejection 0.7 mVrms at 12dB SINAD > 55dB > 60dB > 50dB Device Package Operating Temperature + S1T8528X01-Q0R0 48 −QFP −1010E −20C to + 70C + : New product 48 −QFP −1010E

S1T8528 ENHANCED-1 CHIP CT0 RF IC BLOCK DIAGRAM Limiting IF AMP RSSI Carrier Detector Rectifier Gain Cell Regulator (Vcc/2) Limiter Gain Cell Rectifier IF AMP (455KHz) Quadrature Detector FSK COMP ALC RX VCO IF AMP (10.7MHz) 1st MIX PLL Regulator ( 2.05 V ) Programmable Counter ( REF ) RX Phase Detector TX Phase Detector fMCU 4_25 CNT CONTROL Buffer SUM AMP MIC AMP SPK AMP2 SUM AMP PRE AMP AMP Compander mute X-tal OSC Low Battery Detector 2nd MIX 36 34 33 32 31 30 29 28 27 26 25 121110 9 8 754 3 1 2 VREF CRC CO SFI SFO CDO/LDT CLKO CLK DATA LBD EN AGIC PDT EPI ERC SAI SAO1 SAO2 VCC (COMP) GND (COMP) CPI CPO ALC

24 V REF

(COMP) 2MO VCC (RX) LI LD GND (RX) QCI RAO DSCI DSCO RSSI 2LOI 372LOI GND (PLL) V REF (RF) 2MI 1LOI 1LOI 1MI TIF 1MI 1MO V REF (PLL) VCO RX PDR 20 EO Splatter Filter VREF Programmable Counter ( RX ) Programmable Counter ( TX ) Internal cap. SPK AMP1 Volume control VCC (RX)

ENHANCED-1 CHIP CT0 RF IC S1T8528 PIN CONFIGURATION 1 2 3 4 5 6 7 8 9 10 11 12 EPI ERC EO SAI SAO1 SAO2 VCC (COMP) GND (COMP) CPI CPO CRC 2MI VCC (RX) LI LD GND (RX) QCI RAO DSCI DSCO RSSI V REF(COMP) ALC KB8528 36 35 34 33 32 31 30 29 28 27 26 25 CO SFI SFO CDO/LDT CLKO CLK DATA LBD EN AGIC GND (PLL) V REF(RF) 2MO 2LOI 2LOI 1LOI 1LOI 1MI TIF 1MI 1MO V REF(PLL) PDT VCO RX PDR S1T8528

S1T8528 ENHANCED-1 CHIP CT0 RF IC PIN DESCRIPTION Pin No Symbol Description 1 PDT Phase detector output terminal of the transmitter at PLL. If f TX > f REF or f TX is leading → the output is negative pulse If f TX < f REF or f TX is lagging → the output is positive pulse If f TX = f REF and the same phase → the output is High Impedance

2 CO Compressor output terminal of compander: connected to the splatter filter amp input

terminal. 3 SFI Input terminal of Splatter filter amp. 4 SFO Output terminal of Splatter filter amp. 5 LDT/CDO LDT: Output terminal of transmitter lock detector in PLL block. Output is low if PLL is in lock state and is high if PLL is in unlock state. CDO: As an output terminal of the carrier detector buffer, connected to (RSSI ) terminal of MICOM. This pin outputs the contents of Meter Driver buffer which is turned on/off, according to the signal level detected by Meter Driver. 6 fMCU Clock output terminal for MCU crystal. This pin provides the clock source for MCU or other system as an output of X-tal osc. ÷ 2/ ÷ 3/ ÷ 4/ ÷ 5. Which can be controlled by the bit of the control register. Clock ON/OFF control is possible by MCU CLK DATA EN These pins are serial interface terminals for programming reference counter, auxiliary reference counter, TX channel counter, RX channel counter and control block that controls internal each block with 4 mode selection. During the normal operation, output level is low, but it is high at low battery detection. As this pin is an open collector type, it requires a pull-up resister.

11 AGIC This pin bypasses AC elements at the feedback loop which come from the SUM amp

block of COMPRESSOR. A capacitor should be connected between this terminal and GND. ( C = 2.2uF )

12 CRC Converts waveform from the full wave rectifier to DC element at the rectifier block of

Compressor. ( RC = 33 msec at C = 3.3uF) 13 CPO- Pre-amp output terminal of Compressor. Used as an input terminal for voice signals. 14 CPI Inverting type Pre-amp input terminal of Compressor. 15 GND (COMP ) Ground. Ground of Compander. 16 Vcc (COMP) Supply voltage. Power supply terminal of Compander. 17 SAO 2 Output terminal of speaker amp 2. This signal is the same as SAO1 output, but phase difference is 180 ° for SAO1 DC voltage level is Vcc / 2.

ENHANCED-1 CHIP CT0 RF IC S1T8528 18 SAO 1 Output terminal of Speaker amp 1. DC voltage level is Vcc/ 2. 19 SAI Speaker Amp 1 input terminal. Between this terminal and Expander output terminal, apply DC coupled capacitor.

20 EO Output terminal of Expander

21 ERC Converts waveform from the full wave rectifier to DC element at the rectifier block of

Expander. ( RC = 33 msec at C = 3.3uF ) 22 EPI Pre-amp inverting input terminal of Expander. Adjusts the negative feedback loop gain. ( in application, gain is 5 )

23 ALC Reference current input terminal of Automatic Level Control ( ALC); Adjusts THD of

compressor output voltage to less than 3% or limits the frequency deviation of TX if the input is higher than a certain level. The ALC circuit may be turned off depending on the ALC reference current or the magnitude of output voltage may be limited if it is higher than a certain level. 24 V REF(COMP) Reference voltage ( VREF= 1/2 VCC ). Supplies a regulator voltage to the Compressor and Expander of COMPANDER.

25 RSSI Received Signal Strength Indicator terminal ( Analog type )

26 DSCO Output terminal of Data Slicing comparator. Separates Frequency Shift Keying ( FSK ) serial data and executes data shaping and limiting. 27 DSCI Input terminal of Data slicing comparator. Non-inverting type with the negative input terminal biased to 1/2 Vcc. 28 RAO Recovered Audio Output terminal. Voice signals detected by the Quadrature Detector are amplified and then output through this terminal. 29 QCI Quadrature coil input terminal. The 455kHz oscillator circuit is an Lp = 680uH, Cp = 180pF valued LC tank circuit. Voice signals are detected by mixture of 455kHz ( by phase difference ) which is converted from mixer 2. 30 GND RX Ground . Ground for Receiver. LD LI Limiter input and decoupling terminal. Limiter block removes amplitude modulation elements caused by fading or FM signal noise. Limiting IF stage makes the second intermediate frequency amplify and limit. The input impedance of the limiting IF amplifier is set to 1.5k Ω . While FM waves are transmitted with constant magnitude, their magnitudes are slightly modulated due to reflection from obstacles, fading phenomenon, noise wave and mixing with AM wave elements before entering the receiver ’ s antenna. The limiter makes amplitude uniform by removing these AM wave elements. 33 V CC(RX) Supply voltage. Supplies power to the Receiver. PIN DESCRIPTION (Continued) Pin No Symbol Description

S1T8528 ENHANCED-1 CHIP CT0 RF IC 34 2MI Input terminal of mixer 2. Output from mixer 1 is entered to mixer 2 input terminal via 10.7MHz ceramic filter. Second mixer converts frequency to second intermediate frequency ( 455kHz: AM IF ). 35 2MO Output terminal of Mixer 2. Second intermediate frequency ( 455kHz ), generated by mixing first intermediate frequency ( 10.7MHz ) and Second Local Oscillator is output. 2LOI 2LOI Input terminal of second local oscillator. These pins generate 2 ’ nd local oscillation frequency and are designed as colpitt type oscillator. 10.24MHz or 10.245MHz can be applied as for 2 ’ nd local oscillator. 38 1MO Output terminal of mixer 1. The signal from mixer 1 and the frequency of the first local oscillator are mixed to produce the first intermediate frequency, which is the output through this terminal. The output terminal is an emitter follower with an output impedance of 330 Ω to match the 330 Ω input / output impedance of the 10.7MHz ceramic filter. 1LOI 1LOI Input terminal of the first local oscillator. The local oscillator is a voltage controlled oscillator. Local oscillation frequency and received frequency are mixed at mixer 1 and then converted to the first intermediate frequency of 10.7MHz or 10.695MHz. 41 VCO RX The terminal which variable capacitor is included in the chip. Used as an input terminal where 1st local oscillation frequency is changed by varying the capacitor connected between 1st local oscillator terminals. The internal variable capacitor has the value of 18.73 ~ 15.86 pF depending on the applied voltage. ( 1.0 ~ 2.0V ) 1MI 1MI Input terminal of Mixer1. This mixer is made of doubly balanced multiplier. The received signal amplified at RF AMP is input to this terminal. 44 GND (PLL) Ground. Ground for analog at PLL. 45 PDR Phase detector output terminal of the receiver at PLL. If f RX > f REF or f RX is Leading → The output is negative pulse If f RX < f REF or f RX is Lagging → The output is positive pulse If f RX = f REF and the same phase → The output is high impedance 46 V REF(RF) An internal PMOS pass transistor provides power supplier for the RF pre amplifier. PMOS pass transistor is on in Active/Rx mode and off in Standby/Inactive mode. 47 V REF(PLL) PLL voltage reference output pin. An internal voltage regulator provides a stable power supply voltage for the RX and TX PLLs. (2.05V) 48 TIF Input terminal of TX channel counter. AC coupling with TX VCO. Minimum input level is 300 mVp-p ( at 60MHz ). PIN DESCRIPTION (Continued) Pin No Symbol Description

ENHANCED-1 CHIP CT0 RF IC S1T8528 ABSOLUTE MAXIMUM RATINGS CURRENT CONSUMPTION AT EACH MODE ( VCC = 3.6V ) CURRENT CONSUMPTION IN EACH BLOCK ( VCC = 3.6V ) Characteristic Symbol Value Unit Maximum Supply Voltage Vcc 5.5 V Power Dissipation P D 600 mW Operating Temperature T OPR −20 — + 70 °C Storage Temperature T SCG −55 — + 150 °C Modes Min. Typ. Max. Active mode (Communication mode ) − 8.9mA − RX mode − 4.8mA − Stand-by mode − 700uA − Inactive mode (Battery Saving Mode) − 50uA 70uA Modes Min. Typ. Max. Receiver part − 3.5mA 4.6mA Expander part − 0.8mA 1.1mA Speaker part − 1.0mA 1.4mA compressor part − 1.7mA 2.1mA PLL RX part − 1.2mA 1.6mA TX part − 0.7mA 1.1mA Total − 8.9mA 11.9mA

S1T8528 ENHANCED-1 CHIP CT0 RF IC

ELECTRICAL CHARACTERISTICS

Characteristic Symbol Test Conditions Min. Typ. Max. Unit Operating Voltage Vcc − 2.0 − 5.5 V RECEIVER ( V CC = 3.6V, f C = 49.7MHz, f DEV = ± 3kHz, f MOD = 1kHz,Ta = 25°C, unless otherwise specified ) Sensitivity (input for 12dB SINAD) V SEN MIX1 Matched Impedance Input − 0.7 2.0 µVrms Input for -3dB Limiting V LIM MIX1 Matched Impedance Input − 0.7 2.0 µVrms S/N Ratio S/N RFin = 1mVrms 48 55 − dB Recovered Audio Output V O(RA) RFin = 1mVrms, After 2nd stage LPF 147 177 207 mVrms Recovered Audio Output Voltage Drop V O(RAD ) Vcc = 5.5V → 2.0V RFin = 1mVrms −3.0 −1.5 − dB Detector Output Resistance R O(DET) RFin = 1mVrms − 1.2 − K Ω Detect Output Voltage V O(DET) RFin = 1mVrms 1.0 1.5 2.0 V Detector Output Distortion THD DET RFin = 1mVrms (with CCITT Filter) − 1.0 2.5 % Comparator Threshold Voltage Difference ΔV TH V COMP = 360mVp-p R HYS = 180K Ω 70 110 150 mV Comparator Output Voltage 1 V OH V COMP =360mVp-p R HYS = 180k Ω Vcc-0.4 − − V Comparator Output Voltage 2 V OL V COMP = 360mVp-p R HYS = 180k Ω − 0.1 0.4 V First Mixer Conversion Voltage Gain ΔG V(1M) V MIX1 1/2 = 1mVrms R L = 330k Ω 12 15 18 dB Second Mixer Conversion Voltage Gain ΔG V(2M) V MIX2 = 1mVrms R L = 1.5k Ω 18 22 26 dB Demodulator Bandwidth DBW RFin = 1mVrms − 10 − kHz Limiter Input Sensitivity V I(LIM) Fc = 455kHz , −3dB Limiting − 20 40 uVrms AM Rejection Ratio AMRR RFin = 1mVrms AM MOD = 30% @1kHz − 40 − dB First Mixer 3rd Order Intercept Point IMD3 MIX1 Input 50 Ω Termination − − 15 − dBm First Mixer Input Impedance R I(1M) / C I(1M) Fc = 50MHz − 690 7.2 − Ω pF First Mixer output Impedance Ro (1M) Fc = 10.7MHz − 330 − Ω

ENHANCED-1 CHIP CT0 RF IC S1T8528 Second Mixer input Impedance R I(2M) Fc = 10.7MHz − 4 − k Ω Second Mixer output Impedance Ro (2M) Fc = 455kHz − 1.5 − k Ω Carrier Detector Threshold CD TH MIX1 Single-Ended Matching, Default Threshold=1010 − −95 − dBm Low Battery Detector LBD LBD0 ~ LBD3 = 0 ( Default ) Only LBD2 = 0 Only LBD1 = 0 Only LBD3 = 0 LBD0 ~ LBD3 = 1 − 0.15 3.45 3.3 3.0 0.1 V −0.1 2.2 2.1 0.075 RSSI Slope V RSSI MIX1 Single-Ended Matching − 30 − mV/dB RSSI Output Voltage Dynamic Range RSSI MIX1 Single-Ended Matching − 60 − dB Carrier Detect Output High Voltage V OH RFin = 1 µVrms Default Threshold = 1010 Vcc-0.4 − − V Carrier Detect Output Low Voltage V OL RFin = 10 µVrms Default Threshold = 1010 − − 0.4 V COMPRESSOR ( Vcc = 3.6V, fc = 1kHz, Ta = 25°C, unless otherwise specified ) Standard Output Voltage Vo(com) Vinc = 63.2mVrms → 0dB ALC disabled (pin 13) 269 316 363 mVrms Compressor Gain Difference ΔG V1(COM) Vinc = −20dB −10 0 1.0 dB ΔG V2(COM) Vinc = −40dB −1.5 0 1.5 dB Compressor Output Distortion THD COM Vinc = 63.2mVrms → 0dB − 0.5 1.0 % Mute Attenuation Ratio ATT MUTE Vinc = 0dB 60 80 − dB Compressor Limiting Voltage V LIM(COM) Vinc = Variable 1.05 1.35 1.65 Vp-p ALC VALC R ALC = 150k Ω, Vinc = 10dB 310 390 450 mVrms Splatter filter Vo(SF) V INC = 63.2mVrms → 0 dB 269 316 363 mVrms Maximum Output Voltage V OMIC(MAX) RL = 10K Ω − 2.8 − Vp-p EXPANDER (Vcc = 3.6V, fc = 1kHz, Ta = 25°C, unless otherwise specified) Standard Output Voltage V O(EXP) Vin E = 63.2mVrms → 0dB 309 356 403 mVrms ELECTRICAL CHARACTERISTICS (Continued) Characteristic Symbol Test Conditions Min. Typ. Max. Unit

S1T8528 ENHANCED-1 CHIP CT0 RF IC Expander Gain Difference ΔG V1(EXP) Vin E = −10dB −1.0 0 1.0 dB ΔG V2(EXP) Vin E = − 20dB −1.5 0 1.5 dB ΔG V3(EXP) Vin E = − 30dB −2.0 0 2.0 dB Expander Output Distortion THD EXP Vin E = 63.2mVrms → 0dB − 0.5 1.0 % Mute Attenuation Ratio ATT MUTE Vin E = 63.2mVrms → 0dB 60 80 − dB Expander Maximum Output Voltage V OEXP(MAX) Vin E = Variable THD = 10% 800 − − mVrms Maximum Output Voltage V OSPK(MAX) R L = 150 Ω − 2.2 − Vp-p RL = 600 Ω − 3.0 - Vp-p Input Current IIH Vin = Vcc − − 5 µA IIL Vin = 0V −5 − − µA Input Voltage V IH − Vcc-0.3 − − V V IL − − − 0.3 V Output Current IOH Vout = Vcc 0.3 − − mA IOL Vout = 0V 0.3 − − mA Output Voltage V OH1 PDT,PDR: Io = -0.3mA ( Sourcing ) Vcc-0.4 − − V V OL1 PDT,PDR: Io = 0.3mA ( Sinking ) − − 0.4 V V OH2 LD,f MCU : Io = − 0.1mA ( Sourcing ) Vcc-0.5 − − V V OL2 LD,f MCU : Io = 0.1mA ( Sinking ) − − 0.5 V PLL regulator voltage V PLLREG − 1.90 2.05 2.20 V Regulator Load Current IREG Vout = V REG (OPEN)-0.05V − 3.0 − mA ELECTRICAL CHARACTERISTICS (Continued) Characteristic Symbol Test Conditions Min. Typ. Max. Unit

S1T8528 ENHANCED-1 CHIP CT0 RF IC — Auxiliary - Register(16bits) Figure 3.

• Programmable Counter — RX - counter: Setting frequency for RX.VCO ( 14 Bits --> 1/16 ~ 1/16383 ) [ Default_CH. = USA_#21 ( REMOTE ) : 36.075MHz ( Div._NO = 7215 )] < RX. Register (16bits) > — TX - counter: Setting frequency for TX.VCO ( 14 Bits --> 1/16 ~ 1/16383 ) [ Default_CH. = USA_#21 ( REMOTE ) : 49.830MHz ( Div._NO = 9966 )] < TX. Register (16 bits) > Bit Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Name PMC0 PMC1 D13 D12 D11 D10 D9 D8 Default value 7215 * 0 1 1 1 0 0 Bit Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Name D7 D6 D5 D4 D3 D2 D1 D0 Default value 7215 0 0 1 0 1 1 1 1 Bit Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Name PMC0 PMC1 D13 D12 D11 D10 D9 D8 Default value 9966 * 1 0 0 1 1 0 DATA EN CLK MSB LSB PMC CD_TH(4bits) LBD(3bits) TEST(2bits)CLO(6bits)

ENHANCED-1 CHIP CT0 RF IC S1T8528 * Program Latch Assignl — Ref - counter: Setting reference frequency for phase detector ( 12 Bits --> 1/16 ~ 1/4095 ) [ Default_Divider = 2048, X-tal_OSC = 10.240 MHz -->Fref = 5KHz ]< Ref. Register (16bits) > < Ref. Register (16bits) > — UK_Selection Bit Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Name D7 D6 D5 D4 D3 D2 D1 D0 Default value 9966 1 1 1 0 1 1 1 0 PMC0 (Bit15) PMC1 (Bit14) Register Assign 0 0 Control 0 1 UPLL_Rx 1 0 UPLL_Ref 1 1 UPLL_Tx Bit Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Name PMC0 PMC1 UK_S1 UK_S0 D11 D10 D9 D8 Default value 2048 * Ref.freq. selection for United Kingdom 1 0 0 0 Bit Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Name D7 D6 D5 D4 D3 fMCU_M FMCU1 FMCU0 Default value 2048 0 0 0 0 0 MPU CLK Mute MPU CLK CNTl_1 MPU CLK CNTL_0 UK_S0 UK_S1 FR1 FR2 FrefTX FrefRX 0 0 fREF (A) − fREF (A) fREF (A) 1 0 fREF (A) fREF/4 (B) fREF/4 (B) fREF/4 (B) 0 1 fREF/4 (B) fREF/25 (C) fREF/4 (B) fREF/25 (C) 1 1 fREF/4 (B) fREF/25 (C) fREF/25 (C) fREF/4 (B)

Figure 4. Reference frequency selection

• Control program Control register (16 Bits) Bit Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Name PMC0 PMC1 BS1 BS0 LBD_BS CO_M EX_M SPK_M Description Program Mode Control_0 Program Mode Control_1 Power Save Control_1 Power Save Control_0 Low Battery Detector Battery Save Compressor Mute Expander Mute Speaker Mute Function * Program Latch Assign Power Save Mode 0:Normal (LBD-On) 1:LBD-Part Power-Off 0: Normal 1: Mute 0:Normal 1:Mute 0:Nomal 1:Mute Bit Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Name SPK3 SPK2 SPK1 SPK0 LDT/CDO fMCU_M fMCUS1 fMCUS0 Description SPK Control_3 SPK Control_2 SPK Control_1 SPK Conrol_ LDT/CDO Select MCU Clock Mute MCU Clock Control_1 MCU Clock Control_0 Function Speaker Volume Control 0: CDO 1: LDT 0: Normal 1: Mute *** MCU Clock Output

12 Bits Reference

ENHANCED-1 CHIP CT0 RF IC S1T8528 Power Save Mode Assign * MCU Clock Output Control & Frequency *** Speaker Amplifier Volume Control BS1 (Bit13) BS0 (Bit12) Power Save Mode 0 0 Rx Default 0 1 Active 1 0 STD_By 1 1 Inactive fMCU_M fMCUS1 fMCUS0 Clock Output Divider X-tal 10.24MHz 11.15MHz 12.0MHz

1 Don ’ t Care Don ’ t Care Low Divider

0 0 0 2 2 5.120MHz 5.575MHz 6.0MHz 0 0 1 3 3 3.413MHz 3.717MHz 4.0MHz 0 1 0 4 4 2.560MHz 2.788MHz 3.0MHz 0 1 1 5 (Default) 5 2.048MHz 2.230MHz 2.4MHz DATA Gain/Attenuation Output Level [SAO1-SAO2] SPK3 SPK2 SPK1 SPK0 0 0 0 0 −18dB 25mVrms 0 0 0 1 −16dB − 0 0 1 0 −14dB − 0 0 1 1 −12dB 50mVrms 0 1 0 0 −10dB − 0 1 0 1 −8dB − 0 1 1 0 −6dB 100mVrms 0 1 1 1 −4dB − 1 0 0 0 −2dB − 1 0 0 1 0dB 200mVrms 1 0 1 0 +2dB − 1 0 1 1 +4dB − 1 1 0 0 +6dB 400mVrms 1 1 0 1 +8dB − 1 1 1 0 +10dB − 1 1 1 1 +12dB 800mVrms

S1T8528 ENHANCED-1 CHIP CT0 RF IC

• Auxiliary Register (16 Bits) Auxiliary Register Function **** TEST Mode & LDT-CDO Mode Bit Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Name PMC CLO5 CLO4 CLO3 CLO2 CLO1 CLO0 CD_TH3 Description Auxiliary register Selection Control_3 Program Mode Control 1 ’ st LO Cap Select CD Control_3 Bit Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Name CD_TH2 CD_TH1 CD_TH0 LBD3 LBD2 LBD1 TEST2 TEST1 Description CD_TH Control_2 CD_TH Control_1 CD_TH Control_0 LBD Control_3 LBD Control_2 LBD Control_1 TEST Mode2 TEST Mode1 Function Carrier Detector Threshold Control Low Battery Detector Voltage Control LDT-CDO Mode LDT/CDO TEST1 TEST2 LDT / CDO Remark 0 0 0 Rx block CDO Default 1 0 Rx block CDO − 0 1 4_25cnt block FR2 − 1 1 4_25cnt block FR2 − 1 0 0 PLL block LDT − 1 0 PLL block LDT − 0 1 Test PLL_RX − 1 0 Test PLL_TX −

ENHANCED-1 CHIP CT0 RF IC S1T8528 **** Carrier Detector Threshold Control DATA Carrier Detector Threshold CD_TH3 CD_TH2 CD_TH1 CD_TH0 0 0 0 0 −20dB 0 0 0 1 −18dB 0 0 1 0 −16dB 0 0 1 1 −14dB 0 1 0 0 −12dB 0 1 0 1 −10dB 0 1 1 0 −8dB 0 1 1 1 −6dB 1 0 0 0 −4dB 1 0 0 1 −2dB 1 0 1 0 0dB (Default) 1 0 1 1 +2dB 1 1 0 0 +4dB 1 1 0 1 +6dB 1 1 1 0 +8dB 1 1 1 1 +10dB

S1T8528 ENHANCED-1 CHIP CT0 RF IC

• Operating internal circuit blocks in each mode
• Auxiliary Register(CLO_LBD Program) [ Rx - 1st local oscillation internal cap. for U.S.A - 25CH & low battery detecting voltage ] — CLO register ( 6 bits ) : Receiver 1st local oscillator internal capacitor selection Mode ( state ) Operating circuit blocks Active state ( Communication mode ) PLL regulator / MICOM I/F ( Data, CLK, EN ) / 2nd local oscillator / Receiver/ 1st local oscillator/ RX PLL/ Carrier detector / FSK comparator / Low battery detector / TX PLL / Expander & speaker amp / Compressor /Splatter filter amp, Clock Output Receiving mode PLL regulator / MICOM I/F( Data, CLK, EN ) / 2nd local oscillator / Receiver/ 1st local oscillator/ RX PLL/ Carrier detector / FSK comparator / Low battery detector, Clock Output Stand-by mode (Battery Save Mode#2) PLL regulator, MICOM I/F ( Data, CLK, EN ), 2nd local oscillator, Clock Output Inactive state (Battery Saving Mode#1) Interrupt Bit Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Name PMC CLO5 CLO4 CLO3 CLO2 CLO1 CLO0 Default Value 0 0 0 0 0 0 0 Function - 0:Normal 1:Internal Cap. for USA 25 Channel = 5.9pF 0:Normal 1:Internal Cap. for USA 25 Channel = 4.8pF 0:Normal 1:Internal Cap. for USA 25 Channel = 3.2pF 0:Normal 1:Internal Cap. for USA 25 Channel = 1.6pF 0:Normal 1:Internal Cap. for USA 25 Channel = 1.3p F 0:Normal 1:Internal Cap. for USA 25 Channel = 0.8pF

ENHANCED-1 CHIP CT0 RF IC S1T8528 *** PMC ( Program Mode Control ) PMC = ‘ HIGH ’ & EN = ‘ HIGH ’ ---> Auxiliary Register Program Mode — Rx-Low Battery Detect Voltage *** PMC ( Program Mode Control ) PMC = ‘ HIGH ’ & EN = ‘ HIGH ’ ---> Auxiliary Register Program Mode

• Example 1 > Low battery detector voltage : 2.1V ( Ext_L = 0.45uH, EXT_C = 30pF ) — 16 bit data format Figure 5. Bit Bit15 (MSB) Bit 4 Bit 3 Bit 2 Low Battery Detector Voltage Remark Name PMC LBD3 LBD2 LBD1 Default Value 0 0 0 3.45V Default Function 1 1 0 1 3.3V − 1 1 1 0 3.0V − 0 0 1 1 2.2V − 1 1 1 1 2.1V − DATA EN CLK MSB LSB PMC LBD3 LBD2 LBD1 1 1 1 1 CLO5 CLO4 CLO3 CLO2 CLO1 CLO0 0 1 1 0 1 0 1( 0 ) 1( 0 ) 1( 0 ) 1( 0 ) 1( 0 )1( 0 )

S1T8528 ENHANCED-1 CHIP CT0 RF IC

• Example data for U.S.A 25_channel selection Phase detector / Lock Detector Output Waveforms Figure 6. 1st Local Osc. Internal Capacitor Select Base Channels Hand Channels Varicap Value External C External L Internal C Bit5 (CLO5) Bit4 (CLO4) Bit3 (CLO3) Bit2 (CLO2) Bit1 (CLO1) Bit0 (CLO0) 1 ~ 25CH. 1 ~ 25CH. 1.0V~2.0V TYP 1.5V 27pF (30pF) 0.45uH pF 0 0 0 0 0 0 16~25CH. 18.73 ~15.86pF 27pF 0.44uH - 0 0 0 0 0 1 - 16~25CH. 18.73 ~15.86pF 47pF 0.20uH 0.8 0 0 0 0 1 1 01~04CH. 18.73 ~15.86pF 27pF 0.44uH 2.1 0 0 0 1 0 0 05~10CH. 18.73 ~15.86pF 27pF 0.44uH 1.6 0 0 0 0 0 1 11~15CH. 18.73 ~15.86pF 27pF 0.44uH 0.8 0 1 1 0 1 0 - 01~06CH. 18.73 ~15.86pF 47pF 0.20uH 9.3 0 1 0 1 1 0 - 07~15CH. 18.73 ~15.86pF 47pF 0.20uH 8.8

program divider. ¡À4 ¡À25 PD_TX LD PDT fREF (A) fREF ¡À4 (B) fREF ¡À25 (C) FR1 FR2 14 Bits TX. program divider. 2LOI TIF REF.Freq TIF ¡ÀN

Figure 7. Phase Detector / Lock Detector Output Waveform

S1T8528 ENHANCED-1 CHIP CT0 RF IC APPLICATION CIRCUIT ( BASE SET ) 4 .7 k 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 3 6 3 5 3 4 3 3 3 2 3 1 3 0 2 9 2 8 2 7 2 6 2 5 4 8 4 7 4 6 4 5 4 4 4 3 4 2 4 1 4 0 3 9 3 8 3 7 S 1 T 8 5 2 8 + + R 1 0 2 0 K R 1 1 1 0 K C 1 7 IN T X V C O C 2 4 2 .2 u C 2 5 3 . 3 u F T o M I C O M ( M C U ) D a t a fr o m M I C O M ( M C U ) M IC O M C L K T o M I C O M ( M C U ) C 3 0 1 5 0 P R 1 5 2 4 0 K C 2 0 4 . 7 n R 1 6 2 .2 M R 2 3 3 0 K C 2 6 4 7 u F C 3 2 1 0 0 N C 3 3 3 .3 u F C 3 4 1 0 0 N R 2 6 1 2 0 K C 3 5 4 .7 u F C 3 6 1 0 0 N R 2 7 3 3 K C 3 0 2 2 0 u F C 3 7 1 0 N R 2 8 1 0 k C 3 9 1 0 N R 2 9 1 0 kR 3 1 2 7 k C 4 0 1 0 N R 3 3 2 2 k C 4 1 3 3 N R 3 2 4 7 0 K R 3 4 4 7 K T 5C 4 2 6 8 N C 4 3 1 0 N F L T 3 4 5 5 M H z Y 1 1 0 .2 4 M H z R 3 8 C 4 5 2 0 P C 4 4 6 8 P C V 1 2 0 P S 2 3 9 0 F L T 2 1 0 M H z C 4 6 1 0 NR 3 5 2 2 C 4 8 1 0 N T 4 A W I C 4 7 3 0 P C 4 9 1 0 0 N R 3 5 5 6 K T 2 A Y R 3 9 3 .9 K R 4 0 1 .0 K C 5 7 4 .7 NC 5 2 0 .4 7 u F C 5 9 1 0 N C 5 4 1 0 u F C 5 1 1 0 NR 3 7 2 2 0 R X A N T T X D U P L E X F L T 1 2 5 k 5 4 4 L 1

1 B u H

P D T C O S F I S F O L T D /C D O 1 M C U C L K D A T A E N L B D A G IC C R C C P O C P I G N D V C C S A O 2 S A O 1 S A I E O E R C E R I A L C V R E F ( C O M P )

2 L O I 2 M O 2 M I V C C ( R X ) L I L D G N D ( R X ) Q C I R A O D S C I D S C O R S S I

V R E F ( P L L ) V R E F ( R F ) P D R G N D ( P L L )

1 M I

1 L O I

1 M O

2 L O I

ENHANCED-1 CHIP CT0 RF IC S1T8528 APPLICATION CIRCUIT ( HAND SET ) 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 3 6 3 5 3 4 3 3 3 2 3 1 3 0 2 9 2 8 2 7 2 6 2 5 4 8 4 7 4 6 4 5 4 4 4 3 4 2 4 1 4 0 3 9 3 8 3 7 S 1 T 8 5 2 8 + + R 1 0 1 0 K R 1 1 1 0 K C 1 7 1 2 N T X V C O C 2 4 2 .2 u C 2 5 3 .3 u F T o M IC O M ( M C U ) D a t a f r o m M I C O M ( M C U ) M IC O M C L K T o M IC O M ( M C U ) R 1 5 2 4 0 K C 2 0 4 .7 N R 2 3 3 0 K C 2 7 4 7 u F C 3 2 1 0 0 N C 3 3 3 . 3 u F C 3 4 1 0 0 N R 2 6 1 2 0 K C 3 5 4 .7 u F C 3 6 1 0 0 N R 2 7 3 3 K C 3 0 2 2 0 u F C 3 7 1 0 N R 2 8 1 0 k C 3 9 1 0 N R 2 9 1 0 kR 3 1 2 7 k C 4 0 1 0 NR 3 3 1 k C 4 1 3 3 N R 3 2 4 7 0 K R 3 4 4 7 K T 5C 4 2 6 8 N C 4 3 1 0 N F L T 3 4 5 5 M H z Y 1 1 0 .2 4 5 M H zC 4 5 2 0 P C 4 4 6 8 P C V 1 2 0 P S 2 3 9 0 F L T 2 1 0 7 M H z C 4 6 1 0 NR 3 5 2 2 C 4 8 1 0 N T 4 A W I C 4 7 4 7 P C 4 9 1 0 0 N R 3 5 5 6 K T 2 A Y R 3 9 3 .9 K R 4 0 1 .0 K C 5 7 4 7 N C 5 2 0 .4 7 u F C 5 9 1 0 N C 5 4 1 0 u F C 5 1 1 0 NR 3 7 2 2 0 R X A N T T X D U P L E X F E T 1 2 5 k 5 4 4 L 1 P D T C O S F I S F O L T D /C D O 1 M C U C L K D A T A E N L B D A G I C C R C C P O C P I G N D V C C S A O 2 S A O 1 S A I E O E R C E R I A L C V R E F ( C O M P ) V R E F ( P L L ) V R E F ( R F ) P D R G N D ( P L L ) 2 . 2 M M IC R 1 6 2 2 K R 1 7 2 2 K C 2 6 1 0 u F R X D A T A o u t C 5 0 2 P T 3 A Y C 5 3 2 P

S1T8528 ENHANCED-1 CHIP CT0 RF IC VREFCOM P 4.7uF Vin22 1uF 2.2uF Voe 10§Ú + Vine1 1uF 150§Ù SAo1 SAo2 10uF 10nF Vinc 2.2uF 2.2uF 100§Ú CLK DATA EN LBD LD CDo 100§Ú SFout 1§Ú 1nF 10nF 15§Ú Vinc1 1nF 2.2uF 10§Ú PDT Vc 10uF 10nF S48 + 100§Ú 100§Ú 10nF 10uF 1uF 4.3§Ú 1§Ú S45 PDR ~ 1nF 18pF 56§Ú100nF S41 ~ 47pF 0.1uF 68§Ú 680uH 180pF S25 10§Ú 0.01uF 10§Ú 0.01uF 0.01uF 1§Ú 0.1uF 15§Ú 180§Ú DSCO RSSI Vin27 RAo DSCI Vcccom Vin40 Vin43 KB8528 150§Ú S23 2.2uF V28 10nF 10nF 1uF S40 10K 10K 10K 500§Ú-1000§Ú +10uF 10nF VREFRF VREFPLL 37 24 101 3 4 5 6 7 8 9 11 12 36 35 34 33 32 31 30 29 28 27 26 25 PDT CO SFI SFO CDO LDT CLKO LBD EN DATA AGIC CLK CRC CPO CPI VCC(COMP) GND(COMP) SAO2 SAO1 SAI EO ERC EPI ALC VREF(COMP) RSSI DSCO DSCI RAO QCI GND (RX) VCC (RX) LI LD 2MI 2MO 2LOI 2LOI 1MO 1LOI 1LOI VCO(RX) 1MI 1MI GND(PLL) PDR VREF(RF) VREF(PLL) TIF 0.47uH CLKO 150§Ú 100pF 30§Ú Vmico 1uF 68pF 1§Ú 100Ω 82§Ú 33pF 0.47uF + 6.8§Ú 1uF 56§Ú KDS2236 47pF T1(AW) 2.7§Ú 0.41uH 100§Ú 100§Ú 15§Ú 25pF 0.47uH ~Vin48 68pF VCOR VCOT TIF 10.7MHz 1Mo 2Lo 47pF 10nF 20pF 10.240MHz 455KHz Vccrx +10uF S34 390Ω 2MoVaricap 47pF 5.1§Ú TEST CIRCUIT S1T8528

ENHANCED-1 CHIP CT0 RF IC S1T8528

S1T8528 ENHANCED-1 CHIP CT0 RF IC

ENHANCED-1 CHIP CT0 RF IC S1T8528

S1T8528 ENHANCED-1 CHIP CT0 RF IC

ENHANCED-1 CHIP CT0 RF IC S1T8528

S1T8528 ENHANCED-1 CHIP CT0 RF IC

ENHANCED-1 CHIP CT0 RF IC S1T8528

S1T8528 ENHANCED-1 CHIP CT0 RF IC

ENHANCED-1 CHIP CT0 RF IC S1T8528

S1T8528 ENHANCED-1 CHIP CT0 RF IC

ENHANCED-1 CHIP CT0 RF IC S1T8528 NOTES