RS7202-33GRNEP

RS7202 ORISTER | Alldatasheet

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Page No. : 1/7 DS‐RS7202‐05 April, 2011 www.Orister.com RS7202 250mA Low Quiescent Linear Regulator with Enable General Description The RS7202 series is a positive voltage regulator with high accuracy output voltage and ultra‐low quiescent current which is typically 2.0μA. The device is ideal for handheld communication equipments and battery powered applications which require low quiescent current. The RS7202 consists of a bandgap reference voltage source, an error amplifier, a P‐channel pass transistor, a resistor‐ divider for setting output voltage, a current limiter, and temperature limit protectio n circuit. The high‐accuracy output voltage is preset at an internally trimmed voltage 1.8V, 2.5V or 3.3V. Other output voltages can be mask‐ optioned from 1.2V to 5.0V with 100mV increment except the RS7202‐13 which has 1. 3V output voltage and RS7202‐185 which has 1.85V output voltage. The RS7202 has been designed to be used with low cost ceramic capacitors and requires a minimum output capacitor of 1.0μF. The device is available in SOT‐25 package. Features Applications

• 2.0μA Quiescent Current (Typ.)
• Operating Voltages Range：+1.8V to +6V
• Output Voltages Range：+1.2V to +5.0V with 100mV Increment
• Maximum Output Current：250mA
• Low Dropout: 150mV@100mA (VOUT≧2.0V)
• High Accuracy of Output Voltage： ±2.0% : VOUT≧2.5 V ±50mV : VOUT≦2.5 V
• High Ripple Rejection：60dB
• Output Current Limit Protection (350mA)
• Short Circuit Protection (200mA)
• Thermal Overload Shutdown Protection
• Low ESR Capacitor Compatible
• SOT‐25 Package
• RoHS Compliant and 100% Lead (Pb)‐Free and Green (Halogen Free with Commercial Standard)
• Battery‐powered equipment
• Voltage regulator for microprocessor
• Voltage regulator for LAN cards Wireless Communication equipment
• Audio/Video equipment
• Post Regulator for Switching Power
• Home Electric/Electronic Appliance Application Circuits

Page No. : 2/7 DS‐RS7202‐05 April, 2011 www.Orister.com This integrated circuit can be damaged by ESD. Orister Corporation recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. Pin Assignments SOT‐25 PACKAGE PIN CODE (NE) SYMBOL DESCRIPTION

1 VIN Regulator Input Pin

2 GND Ground Pin

3 EN Chip Enable Pin

4 NC No Connection

SOT‐25

5 VOUT Regulator Output Pin

Ordering Information

RS7202‐XX EE YY Z EE is EN Input Logic, Internal Pull‐Up / Dow n Resistor : (see EN Function s Table) YY is package & Pin Assignments designator : NE : SOT‐25 Z is Lead Free designator : P: Commercial Standard, Lead (Pb) Free and Phosphorous (P) Free Package G: Green (Halogen Free with Commercial Standard) EN Functions Table EE Code EN Operational State H ON GR L OFF H OFF GP L ON

Page No. : 3/7 DS‐RS7202‐05 April, 2011 www.Orister.com Block Diagram Absolute Maximum Ratings Parameter Symbol Ratings Units Input Voltage VIN to GND VIN 7.0 V EN to GND Voltage ‐ 7.0 V EN to Input Voltage ‐ 0.3 V Output Current Limit, I(LIMIT) ILIMIT 350 mA Junction Temperature TJ +155 oC Thermal Resistance SOT‐25 θJA 250 oC/W Power Dissipation SOT‐25 PD 400 mW Operating Ambient Temperature TOPR ‐ 40 ~ +85 oC Storage Temperature TSTG ‐ 55~+150 oC Lead Temperature (soldering, 10sec) ‐ +260 oC NOTE: Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and function operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute‐maximum–rated conditions for extended periods may affect device reliability. Electrical Characteristics (TA=25°C, unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. Unit VIN Input Voltage ‐ 1.8 ‐ 6.0 V IMAX Output Current ‐ 250 ‐ ‐ mA ILIMIT Current Limit ‐ ‐ 0.5 ‐ A ISC Short Circuit Current VOUT=0V, VIN＞VOUT+0.48V ‐ 200 300 mA IQ Quiescent Current ILOAD=0mA, VIN=VOUT+1.0V ‐ 2.0 4.5 uA VDROP Dropout Voltage VOUT≧2.5V, IOUT=100mA ‐ 150 200 mV ΔVLINE Line Regulation VOUT+1.0V≦VIN≦6V, ILOAD=1mA ‐ 0.1 0.2 %/V ΔVLOAD Load Regulation IOUT=1mA to 100mA ‐ 0.01 0.02 %/mA VIH EN Pin Input Voltage “H” (see note 2) 1.0 ‐ ‐ V VIL EN Pin Input Voltage “L” (see note 2) ‐ ‐ 0.3 V IEN EN Pin Leakage Current ‐ ‐ 0.05 0.1 uA eN Output Noise F=10KHz, COUT=1uF ‐ 150 ‐ uV(rms) PSRR Ripple Rejection F=100Hz, COUT=1uF ‐ 60 ‐ dB TC Output Voltage Temperature Coefficient IOUT=1mA, ‐40°C≦TA≦80°C ‐ 100 ‐ ppm/oC THYS Thermal Shutdown Hysteresis ‐ ‐ 10 ‐ oC

Page No. : 4/7 DS‐RS7202‐05 April, 2011 www.Orister.com Detail Description The RS7202 is a low quiescent current LDO linear regulator. The device provides preset 1.8V, 2.5V and 3.3V output voltages for output current up to 350mA. Other mask options for special output voltages from1.5V to 5.0V with 100mV increment are also available. As illustrated in function block diagram, it consists of a 1.23V voltage, error amplifier, a P‐channel pass transistor, an ON /OFF control logic, and an internal feedback voltage divider. The 1.23V bandgap reference is connected to the error amplifier, which compares this reference with the feedback voltage and amplifies the voltage difference. If the feedback voltage is lower than the reference voltage, the pass‐transistor gate is pulled lower, which allows more current to pass to the outpu t pin and increases the output voltage. If the feedback voltage is too high, the pass‐transistor gate is pulled up to decrease the output voltage. The output voltage is feedback through an internal resistive divider connected to VOUT pin. Additional blocks include with output current limiter and shutdown logic. Internal P‐channel Pass Transistor The RS7202 features a P‐channel MOSFET pass transistor. Unlike similar designs using PNP pass transistors, P‐channel MOSFETs require no base drive, which reduces quiescent current. PNP–based regulators also waste considerable current in dropout conditions when the pass transistor saturates, an d use high base‐drive currents under large loads. The RS7202 does not suffer from these problems and consumes only 2.0μA (Typical) of current consumption under light loads. Enable Function EN pin starts and stops the regulator. When the EN pin is switched to the power off level, the operation of all internal circuit stops, the build‐in P‐c hannel MOSFET output transistor between pins VIN and VOUT is switched off, allowing current consumption to be drastically reduced. The VOUT pin enters the GND level due to the several MΩ resistance of the feedback voltage divider between VOUT and GND pins. Output Voltage Selection The RS7202 output voltage is preset at an internally trimmed voltage 1.8V, 2.5V or 3.3V. The output voltage also can be digits of part number suffix identify the outp ut voltage (see Ordering Information). For example, RS7202‐33 has a preset 3.3V output voltage. Current Limit The RS7202 also includes a fold back current limiter. It monitors and controls the pass‐transistor’s gate voltage, estimates the output current, and limits the output current within 350mA. Thermal Overl oad Protection Thermal overload protection limits total power dissipation in the RS7202. When the junction temperature exceeds TJ=+155°C, a thermal sensor turns off the pass transistor, allowing the IC to cool down. The thermal sensor turns the pass transistor active again after the junction temperature cools down by 10°C, resulting in a pulsed output during continuous thermal overload conditions. Thermal overload protection is designed to protect the RS7202 in the event of fault conditions. For continuous ope ration, the maximum operating junction temperature rating of TJ=+125°C should not be exceeded. Dropout Voltage A regulator’s minimum input‐output voltage differential, or dropout voltage, determines the lowest usable supply voltage. In battery‐powered systems, this will determine the useful end‐of‐life battery voltage. The RS7202 uses a P‐channel MOSFET pass transistor, its dropout voltage is a function of drain‐to‐source on‐resistance (RDS(ON)) multiplied by the load current. OUTON DSOUTINDROPOUT IRVVV ×=−= ) (

Page No. : 5/7 DS‐RS7202‐05 April, 2011 www.Orister.com SOT‐25 Dimension NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion. D. Falls within JEDEC MO‐193 variation AB (5 pin).

Page No. : 6/7 DS‐RS7202‐05 April, 2011 www.Orister.com Soldering Methods for Orister’s Products 1. Storage environment: Temperature=10oC~35oC Humidity=65%±15% 2. Reflow soldering of surface‐mount devices Profile Feature Sn‐Pb Eutectic Assembly Pb‐Free Assembly Average ramp‐up rate (TL to TP) <3oC/sec <3oC/sec Preheat ‐ Temperature Min (Tsmin) ‐ Temperature Max (Tsmax) ‐ Time (min to max) (ts) 100oC 150oC 60~120 sec 150oC 200oC 60~180 sec Tsmax to TL ‐ Ramp‐up Rate <3oC/sec <3oC/sec Time maintained above: ‐ Temperature (TL) ‐ Time (tL) 183oC 60~150 sec 217oC 60~150 sec Peak Temperature (TP) 240oC +0/‐5oC 260oC +0/‐5oC Time within 5oC of actual Peak Temperature (tP) 10~30 sec 20~40 sec Ramp‐down Rate <6oC/sec <6oC/sec Time 25oC to Peak Temperature <6 minutes <8 minutes 3. Flow (wave) soldering (solder dipping) Products Peak temperature Dipping time Pb devices. 245oC ±5oC 5sec ±1sec Pb‐Free devices. 260oC +0/‐5oC 5sec ±1sec Figure 1: Temperature profile tP tL Ramp-down Ramp-up Tsmax Tsmin Critical Zone TL to TP tS Preheat TL TP t 25oC to Peak Time Temperature

Page No. : 7/7 DS‐RS7202‐05 April, 2011 www.Orister.com Important Notice: © Orister Corporation Orister cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an Orister product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. Orister reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Except as pro vided in Orister’s terms and conditions of sale, Orister assumes no liability whatsoever, and Orister disclaims any express or implied warranty relating to the sale and/or use of Orister products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyrig ht or other intellectual property right. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. Testing and other quality control techniques are utilized to the extent Orister deems necessary to support this warranty. Spe cific testing of all parameters of each device is not necessarily performed. Orister and the Orister logo are trademarks of Orister Corporation. All other brand and product names appearing in this document are registered trademarks or trademarks of their respective holders.