RS7110-33NEG

RS7103 ORISTER | Alldatasheet

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Page No. : 1/10 DS‐RS7103‐02 September, 2009 www.Orister.com RS7103 Low Power 300mA CMOS LDO with Enable General Description The RS7103 is a low‐dropout linear regulator that operates in the input voltage range from +2.5V to +9.0V and delivers 300mA output current. The high‐accuracy output voltage is preset at an internally trimmed voltage 2.5V or 3.3V. Other output voltages can be mask‐optioned from 1.5V to 5.0V with 100mV increment. The RS7103 consists of a 1.25V reference, an error amplifier, a P‐channel pass transistor, and an enable/disable logic circuit. Other features include short‐circuit protection, soft start function, and thermal shutdown protection. The RS7103 device is available in SOT‐25 package. Features Applications

• Operating Voltages Range：+2.5V to +9.0V
• Output Voltages Range：+1.5V to +5.0V with 100mV Increment
• Maximum Output Current：300mA
• Low Dropout: 400mV@300mA (Typ.)
• ±2% Output Voltage Accuracy
• High Ripple Rejection：60dB
• Output Current Limit Protection (500mA)
• Short Circuit Protection (260mA)
• Thermal Overload Shutdown Protection
• Low ESR Capacitor Compatible
• Control Output ON/OFF function
• SOT‐25 Packages
• RoHS Compliant and 100% Lead (Pb)‐Freeand Green (Halogen Free with Commercial Standard)
• Battery‐powered equipment
• Voltage regulator for microprocessor
• Voltage regulator for LAN cards
• Wireless Communication equipment
• Audio/Video equipment
• Post Regulator for Switching Power
• Home Electric/Electronic Appliance Application Circuits Soft‐Start Function VIN=6V IOUT=100mA, CIN=COUT=1uF(ceramic) TA=25°C

Page No. : 2/10 DS‐RS7103‐02 September, 2009 www.Orister.com This integrated circuit can be damaged by ESD. Orister Corporation recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. Pin Assignment SOT‐25 PACKAGE PIN SYMBOL DESCRIPTION

1 VIN Regulator Input Pin

2 GND Ground Pin

3 EN Chip Enable Pin

4 NC No Connection

SOT‐25

5 VOUT Regulator Output Pin

Ordering Information

RS7103‐XX YY Z XX is nominal output voltage (for example, 15 = 1.5V, 33 = 3.3V, 285 = 2.85V). YY is package designator : NE: SOT‐25 Z is Lead Free designator : P: Commercial Standard, Lead (Pb) Free and Phosphorous (P) Free Package G: Green (Halogen Free with Commercial Standard) Block Diagram

Page No. : 3/10 DS‐RS7103‐02 September, 2009 www.Orister.com Absolute Maximum Ratings Parameter Symbol Ratings Units Input Voltage VIN to GND VIN 10 V Output Current Limit, I(LIMIT) ILIMIT 500 mA Junction Temperature TJ +155 oC Thermal Resistance SOT‐25 θJA 250 oC/W Power Dissipation SOT‐25 PD 400 mW Operating Ambient Temperature TOPR ‐ 40 ~ +85 oC Storage Temperature TSTG ‐ 55~+150 oC Lead Temperature (soldering, 10sec) ‐ +260 oC NOTE: Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and function operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute‐maximum–rated conditions for extended periods may affect device reliability. Electrical Characteristics (TA=25°C, unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. Unit VIN Input Voltage ‐ 2.5 ‐ 9.0 V VOUT Output Voltage VIN=VOUT+1.0V, IOUT=30mA ‐ 2% VOUT +2% V IMAX Output Current (see NOTE 1) VOUT+1.0V≦VIN≦9.0V 300 ‐ ‐ mA ILIMIT Current Limit ‐ ‐ 0.5 ‐ A ISC Short Circuit Current VIN= VEN=5V, VOUT=0V ‐ 260 300 mA VIN= VEN=5V, No Load ‐ 40 60 IQ Ground Pin Current VIN= VEN=9V, No Load ‐ 60 100 uA ISD Shutdown Current VIN=VOUT+1V, VEN=0V, No Load ‐ 0.1 1.0 uA VIH EN Pin Input Voltage “H” (see NOTE 2) 2.0 ‐ ‐ V VIL EN Pin Input Voltage “L” (see NOTE 2) ‐ ‐ 0.5 V IEN EN Pin Leakage Current ‐ ‐ 0.1 uA VDROP Dropout Voltage IOUT=300mA ‐ 400 480 mV ΔVLINE Line Regulation VOUT+0.5V≦VIN≦9.0V, IOUT=30mA ‐ 0.2 0.3 %/V ΔVLOAD Load Regulation VIN=VOUT+1.0V, 0μA≦IOUT≦100mA ‐ 0.02 0.03 %/mA eN Output Noise IOUT=100mA , F=1KHz, COUT=10uF ‐ 40 ‐ uV(rms) PSRR Ripple Rejection VIN=VOUT+1V, IOUT=30mA, F=100Hz, Vripple=1VP‐ P ‐ 60 ‐ dB TSD Thermal Shutdown Temperature ‐ ‐ 160 ‐ oC THYS Thermal Shutdown Hysteresis ‐ ‐ 10 ‐ oC NOTES： 1. Measured using a double sided board with 1”x 2” square inches of copper area connected to the GND pins for “heat spreading”. 2. EN pin input voltage must be always less than or equal to input voltage.

Page No. : 4/10 DS‐RS7103‐02 September, 2009 www.Orister.com Detail Description The RS7103 is a low‐dropout linear regulator. The device provides preset 2.5V, 2.85V, and 3.3V output voltages for output current up to 300mA. Other mask options for special output voltages from 1.3V to 5.0V with 100mV increment are also available. As illustrated in function block diagram, it consists of a 1.25V reference, an error amplifier, a P‐channel pass transistor, an ON/OFF control logic and an internal feedback voltage divider. The 1.25V bandgap reference is connected to the error amplifier, which compares this reference with the feedback voltage and amplifies the voltage difference. If the feedback voltage is lower than the reference voltage, the pass‐transistor gate is pulled lower, which allows more current to pass to the output pin and increases the output voltage. If the feedback voltage is too high, the pass‐transistor gate is pulled up to decrease the output voltage. The output voltage is feedback through an internal resistive divider connected to VOUT pin. Additional blocks include with output current limiter and shutdown logic. Internal P‐channel Pass Transistor The RS7103 features a P‐channel MOSFET pass transistor. Unlike similar designs using PNP pass transistors, P‐channel MOSFETs require no base drive, which reduces quiescent current. PNP–based regulators also waste considerable current in dropout conditions when the pass transistor saturates, and use high base‐drive currents under large loads. The RS7103 does not suffer from these problems and consumes only 60μA (Typical) of ground pin current under heavy loads as well as in dropout conditions. Enable Function EN pin starts and stops the regulator. When the EN pin is switched to the power off level, the operation of all internal circuit stops, the build‐in P‐channel MOSFET output transistor between pins VIN and VOUT is switched off, allowing current consumption to be drastically reduced. Output Voltage Selection The RS7103 output voltage is preset at an internally trimmed voltage 2.5V, 2.85V or 3.3V. The output voltage also can be mask‐optioned from 1.5V to 5.0V with 100mV increment by special order. The first two digits of part number suffix identify the output voltage (see Ordering Information). For example, the RS7103‐33 has a preset 3.3V output voltage. Current Limit The RS7103 also includes a fold back current limiter. It monitors and controls the pass‐transistor’s gate voltage, estimates the output current, and limits the output current within 500mA. Thermal Overload Protection Thermal overload protection limits total power dissipation in the RS7103. When the junction temperature exceeds TJ=+155°C, a thermal sensor turns off the pass transistor, allowing the IC to cool down. The thermal sensor turns the pass transistor active again after the junction temperature cools down by 20°C resulting in a pulsed output during continuous thermal overload conditions. Thermal overload protection is designed to protect the RS7103 in the event of fault conditions. For continuous operation, the maximum operating junction temperature rating of TJ=+125°C should not be exceeded. Operating Region and Power Dissipation Maximum power dissipation of the RS7103 depends on the thermal resistance of the case and circuit board, the temperature difference between the die junction and ambient air, and the rate of airflow. The power dissipation across the devices is P = IOUT x (VIN‐VOUT). The resulting maximum power dissipation is: JA AJ CAJC AJ MAX TTTTP θθθ )()( −=+ Where (TJ‐TA) is the temperature difference between the RS7103 die junction and the surrounding air, θJC is the thermal resistance of the package chosen, and θCA is the thermal resistance through the printed circuit board, copper traces and other materials to the surrounding air. For better heat‐sinking, the copper area should be equally shared between the VIN, VOUT, and GND pins.

Page No. : 5/10 DS‐RS7103‐02 September, 2009 www.Orister.com If the RS7103 uses a SOT‐25 package and this package is mounted on a double sided printed circuit board with two square inches of copper allocated for “heat spreading”, the resulting θJA is 180°C/W. Based on a maximum operating junction temperature 125°C with an ambient of 25°C, the maximum power dissipation will be: W400250 25125TTP CAJC AJ MAX .)()( =−=+ −= θθ Thermal characteristics were measured using a double‐side board with 1”x 2” square inches of copper area connected to the GND pin for “heat spreading”. Dropout Voltage A regulator’s minimum input‐output voltage differential, or dropout voltage, determines the lowest usable supply voltage. In battery‐powered systems, this will determine the useful end‐of‐life battery voltage. The RS7103 uses a P‐channel MOSFET pass transistor, its dropout voltage is a function of drain‐to‐source on‐resistance (RDS(ON)) multiplied by the load current. OUTONDSOUTINDROPOUT IRVVV ×=−= )(

Page No. : 6/10 DS‐RS7103‐02 September, 2009 www.Orister.com Typical Operating Characteristics Output Voltage vs. Output Current Dropout Voltage vs. Output Current Supply Current vs. Input Voltage Supply Current vs. Ambient Temperature Output Voltage vs. Ambient Temperature

Page No. : 7/10 DS‐RS7103‐02 September, 2009 www.Orister.com Supply Current vs. Output Current Output Voltage vs. Input Voltage Output Voltage vs. Input Voltage

Page No. : 8/10 DS‐RS7103‐02 September, 2009 www.Orister.com SOT‐25 Dimension NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion. D. Falls within JEDEC MO‐193 variation AB (5 pin).

Page No. : 9/10 DS‐RS7103‐02 September, 2009 www.Orister.com Soldering Methods for Orister’s Products 1. Storage environment: Temperature=10oC~35oC Humidity=65%±15% 2. Reflow soldering of surface‐mount devices Profile Feature Sn‐Pb Eutectic Assembly Pb‐Free Assembly Average ramp‐up rate (TL to TP) <3oC/sec <3oC/sec Preheat ‐ Temperature Min (Tsmin) ‐ Temperature Max (Tsmax) ‐ Time (min to max) (ts) 100oC 150oC 60~120 sec 150oC 200oC 60~180 sec Tsmax to TL ‐ Ramp‐up Rate <3oC/sec <3oC/sec Time maintained above: ‐ Temperature (TL) ‐ Time (tL) 183oC 60~150 sec 217oC 60~150 sec Peak Temperature (TP) 240oC +0/‐5oC 260oC +0/‐5oC Time within 5oC of actual Peak Temperature (tP) 10~30 sec 20~40 sec Ramp‐down Rate <6oC/sec <6oC/sec Time 25oC to Peak Temperature <6 minutes <8 minutes 3. Flow (wave) soldering (solder dipping) Products Peak temperature Dipping time Pb devices. 245oC ±5oC 5sec ±1sec Pb‐Free devices. 260oC +0/‐5oC 5sec ±1sec Figure 1: Temperature profile tP tL Ramp-down Ramp-up Tsmax Tsmin Critical Zone TL to TP tS Preheat TL TP t 25oC to Peak Time Temperature

Page No. : 10/10 DS‐RS7103‐02 September, 2009 www.Orister.com Important Notice: © Orister Corporation Orister cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an Orister product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. Orister reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Except as provided in Orister’s terms and conditions of sale, Orister assumes no liability whatsoever, and Orister disclaims any express or implied warranty relating to the sale and/or use of Orister products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. Testing and other quality control techniques are utilized to the extent Orister deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed. Orister and the Orister logo are trademarks of Orister Corporation. All other brand and product names appearing in this document are registered trademarks or trademarks of their respective holders.