RL1024P

RL0512P PERKINELMER | Alldatasheet

Document overview

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Technical content

Features

• Extended spectral range—250 to 1000 nm
• 40 MHz pixel readout rate
• 2500:1 dynamic range
• 5-volt clocking
• Line rates to 70 kHz
• Ultra low image lag
• Electronic exposure control
• Antiblooming control
• Square pixels with 100% fill factor The two-phase CCD readout register requires only five volts for clocking yet achieves excellent charge transfer efficiency. Additional electrodes provide independent control of expo- sure and antiblooming. Finally, the high-sensitivity readout amplifier provides a large output signal to relax the noise requirements on the camera electronics that follow. Available in array lengths of 512, 1024 and 2048 elements with either low- cost glass or UV-enhanced fused silica windows, these versatile imagers are widely used in high-speed document reading, web inspection, mail sorting, production measurement and gauging position sensing, spectroscopy and many other industrial and scientific applications requiring peak imager performance. Note: While the P-Series imagers have been designed to resist electrostatic discharge (ESD), they can be damaged from such dis- charges. Always observe proper ESD precau- tions when handling and storing this imager. DATASHEET Lighting Imaging Telecom Imaging Product Line DSP-101 01H - 7/2002W Page 1

Description (cont.) P-series imagers combine high-perfor- mance photodiodes with high-speed CCD readout registers and a high- sensitivity readout amplifier. Refer to Figure 1 for construction details. Light Detection Area The light detection area in P-series imagers is a linear array of contiguous pinned photodiodes on 14 µm centers. These photodiodes are constructed using PerkinElmer’s advanced photo- diode design that extends short-wave- length sensitivity into the deep UV below 250 nm, while preserving 100% fill factor and delivering extremely low image lag. This unique design also avoids polysilicon layers in the light detection area that reduces the quantum efficiency of most CCD imagers. The P-series imagers are sup- plied with glass windows for general visible use, and fused silica windows for use in the ultraviolet below 350 nm. See Figure 2 for the sensitivity and window transmission curves. For lowest lag, all P-series imagers feature pinned photodiodes. Pinning, which requires a special semiconduc- tor process step, provides a uniform internal voltage reference for the charge stored in every photodiode. This stable reference assures that every photodiode is fully discharged after every scan. Figure 2a: Spectral Sensitivity Curve 100 250 350 450 550 650 750 850 950 1050 100 Wavelength (nm) Responsivity (V/ J/cm )2 QE (%) Right Scale Left Scale Figure 2b: Window Transmission Curve Wavelength (nm) Transmission (%) 100 150 450350250 550 950850750650 1050 Fused Silica Glass Linear Photodiode Array Imagers www.perkinelmer.com/opto Photodiodes covered with light shields included at one or both ends of the imager provide a dark current reference for clamping. These are separated from the active photodi- odes by two unshielded transition pixels that assure uniform response out to the last active photodiode. Due to the potential for light leak- age, the two dark pixels nearest the transition pixels should not be used as a dark reference. DSP-101 01H - 7/2002W Page 2 Figure 1: Imager Functional Diagram Output Amp 2-Phase Buried Channel CCD Shift Register Transfer Gate Antiblooming/Exposure Control Gate N = 512 for the RL0512P N = 1024 for the RL1024P N = 2048 for the RL2048P

3 Isolation stages

10 Dark pixels (D1 ... D10)

2 Transition pixels (T1,T2)

(Light shield ends between D10 and T1) N Active pixels (1...N)

2 Transition pixels (T3,T4)

(Light shield ends between T4 and D11) 10 Dark pixels (D11...D20) (Not used in RL0512P)

3 CCD Isolation Stages

ø1 and ø2. While the two-phase CCD shift register architecture allows relaxed timing tolerances over those required in three- or four-phase designs, optimum charge transfer effici ency and lowest power dissipation is obtained when the overlap of the two- phase CCD clocks occurs around the 50% transition level. Additionally, the phase difference between signals and ø2 should be maintained near 180° and the duty cycle of both signals should be set near 50% to prevent loss of full-well charge storage capacity and charge transfer efficiency. Readout timing details are shown in Figure 4 with ranges and tolerances in Table 2. Timing Requirements In high-speed applications, fast waveform transitions allow maximum settling time of the output signal. However, it is generally advisable to use the slowest rise and fall times consistent with required video performance because fast edges tend to introduce more transition noise into the video waveform. When the highest speeds are required, careful smoothing of the waveform transitions may improve the balance between speed and video quality. Output Amplifier Charge emerging from the last stage of the shift register is converted to a voltage signal by a charge integrator and video amplifier. The integrator, a capacitor created by a floating diffusion, is initially set to a DC reference volt- age (V RD), by setting the reset transistor voltage (øRG) to its high state. To read out the charge, øRG is pulsed low turning the reset transistor off and isolating the integrator from V RD. The next time ø1 goes low, the charge packet is transferred to the integrator where it generates a voltage propor- tional to the packet size. The reset transistor voltage, øRG, must reach its low state prior to the high-to-low transition of ø1. An apparent clipping of the video signal will result if this Item Sym Min Typ Max ø1, ø2 clock period t 1 25 ns - - ø1, ø2 rise/fall time t 2 -5 n s - øRG rise/fall time t 4 -5 n s - øRG clock - high duration t 5 5 ns - - Delay of ø1 high - low t 6 0 ns - - transition from øRG low* Table 2.Readout Timing Requirements Pixel count 512 elements (RL0512P) 1024 elements (RL1024P) 2048 elements (RL2048P) Pixel size 14 µm x 14 µm Exposure control yes Horizontal clocking 2 Ø (5V clock amplitude) Number of outputs 1 Dynamic range 1 2500:1 Readout noise (rms) amplifier 25 electrons reset transistor 55 electrons total noise without CDS 60 electrons Saturation exposure 2 24 nJ/cm2 Noise equivalent exposure2 9.6 pJ/cm2 Amplifier sensitivity 4 µV/electrons Saturation output voltage 600 mv Saturation charge capacity 150,000 electrons Charge transfer efficiency 0.99995 Peak responsivity 25V/µJ/cm PRNU match across array ±10% Dead pixels 0 Lag < 1% Spectral response range 250 nm - 1000 nm Data rate (per output) 40 MHz Table 3.Imager Performance (Typical) Linear Photodiode Array Imagers www.perkinelmer.com/opto Notes: 1. Defined as Qsat/rms noise (total). 2. For illumination at 750 nm. Note:The cross over point for ø1 and ø2 clock transitions should occur within the 10 - 90% level of the clock amplitude. Horizontal Shift Registers (cont.) DSP-101 01H - 7/2002W Page 4

ments and overlap tolerances. transferred to the readout register. data on the next readout cycle. Table 4. Operating Voltages Table 5. Absolute Maximum Rating Above Which Useful Life May Be Impaired ments facilitate optimum designs.

5 N/C No connection

6 N/C No connection

7 N/C No connection

8 N/C No connection

9 N/C No connection

11 LS Light shield/die attach

12 N/C No connection

13 N/C No connection

14 N/C No connection

18 V OG Output gate 8 8 8

20 V RD Reset drain

Table 6. Pinout Description and Capacitance Values of Clocked Phases Figure 5. Pinout Configuration and tested for seal integrity.

Figure 6: Outline Drawings A B 0.300 (7.62) Pixel 1 Sensing Area 14 m (at stand off) 0.395 ± 0.008 (10.03 ± 0.20) 0.100 ± 0.005 (2.54 ± 0.13) 0.900 ± 0.005 (22.86 ± 0.13) 0.018 ± 0.002 (0.46 ± 0.05) 0.080 ± 0.009 (2.032 ± 0.23) 0.020 ± 0.002 (0.508 ± 0.05) 0.020 ± 0.002 (0.508 ± 0.05) 0.400 ± 0.010 (4.32) 0.020 ± 0.002 (0.50 ± 0.05) 0.205 ± 0.0075 (5.21 ± 0.19) 0.450 ± 0.0075 (11.43 ± 0.19) * Measurements in inches (millimeters) * Maximum angular error is ±15 milliradians www.perkinelmer.com/opto Linear Photodiode Array Imagers Device Inches mm Inches mm Notes: 1. Includes active and transition pixels. Table 7. Package Dimensions and Tolerances Table 8. Stock Part Numbers

Ordering Information

The RL0512, RL1024 and RL2048 P-series imagers are available with either glass or fused silica windows. On special orders, PerkinElmer can supply anti-reflectance coated windows or windowless packages. Imagers are individually packed in electrostatic- resistant boxes and identified by lot number for tracking. DSP-101 01H - 7/2002W Page 7 AB

site at www.perkinelmer.com/opto. subject to change without notice. Table 9. Sales Offices