RFL1P08 NJSEMI | Alldatasheet

Document overview

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Technical content

Features

  • 1 A,-80V and-100V ' rDS(ON) = 3.65fl
  • SOA is Power Dissipation Limited
  • Nanosecond Switching Speeds
  • Linear Transfer Characteristics
  • High Input Impedance
  • Majority Carrier Device

Ordering Information

Description

These are P-Channel enhancement mode silicon gate power field effect transistors designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated cir- cuits. Symbol Go NOTE: When ordering, include the entire part number. Packaging JEDEC TO-205AF DRAIN . (CASE) SOURCE GATE NJ Semi-Conductors reserves the right to change test conditions, parameter limits and package dimensions without notice. Information furnished by NJ Semi-Conductors is believed to be both accurate and reliable at the time of going to press. However, NJ Semi-Conductors assumes no responsibility for any errors or omissions discovered in its use. NJ Semi-Conductors encourages customers to verify that datasheets are current before placing orders. Quality Semi-Conductors

Absolute Maximum Ratings Tc = 25°C, Unless otherwise Specified Drain to Source Voltage (Note 1 ) Maximum Temperature for Soldering RFL1P08 -80 -80 ±20 8.33 0.0667 -55 to 150 RFL1P10 -100 -100 ±20 8.33 0.0667 -55 to 150 300 300 UNITS V V A A V W W/°C AUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: = 25°Cto125°C. Electrical Specifications Tc = 25°C, Unless Otherwise Specified PARAMETER Drain to Source Breakdown Voltage RFL1P08 RFL1P10 Gate to Threshold Voltage Zero Gate Voltage Drain Current Gate to Source Leakage Current Drain to Source On-Voltage (Note 2) Drain to Source On Resistance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse-Transfer Capacitance Thermal Resistance Junction to Case SYMBOL BVDSS VGS(TH) 'DSS 'GSS VDS(ON) rDS(ON) td(ON) tr 'd(OFF) tf CISS coss CRSS R9JC TEST CONDITIONS ID = 250nA, VGS = o VGS = VDS, ID = 250|j.A VDS = Rated BVDSs, VGS = ov VDS = 0.8 x Rated BVDSS VGS = 0, TC=125°C ves = ±2ov, VDS = o ID = 1A, VGS = -10V ID = 1A> VGS = -10V (Figures e, 7) ID=1A,VDD = -50V RG — 50£1 VGS = -10V RL = 47Q (Figures 10, 11, 12) VGS = OV, VDS = -25V (Figure 9) MIN -80 -100 TYP MAX ±100 -3.65 3.65 150 UNITS V V HA nA V n ns ns ns ns PF PF pF °C/W Source to Drain Diode Specifications PARAMETER Source to Drain Diode Voltage (Note 2) Diode Reverse Recovery Time SYMBOL VSD trr TEST CONDITIONS ISD = -1A ISD = -1A, dlSD/dt = SOA/ns MIN TYP 135 MAX -1.4 UNITS V ns NOTES: 2. Pulse test: pulse width < 300|is maximum, duty cycle < 2%. 3. Repetitive rating: pulse width limited by mazimum junction temperature.