RFL1N10 NJSEMI | Alldatasheet
Document overview
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Technical content
Features
- 1 A, 180V and 200V
- rDS(ON) = 3.65Q
- SOA is Power Dissipation Limited
- Nanosecond Switching Speeds
- Linear Transfer Characteristics
- High Input Impedance
- Majority Carrier Device
Description
These are N-Channel enhancement mode silicon gate power field effect transistors designed for applications such as switching regulators, switching converters, motor drivers, relay drivers and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Symbol O D
Ordering Information
NOTE: When ordering, use the entire part number. Packaging JEDEC TO-205AF DRAIN - (CASE) SOURCE GATE NJ Semi-Conductors reserves the right to change test conditions, parameter limits and package dimensions without notice. Information furnished by NJ Semi-Conductors is believed to be both accurate and reliable at the time of going to press. However, NJ Semi-Conductors assumes no responsibility for any errors or omissions discovered in its use. NJ Semi-Conductors encourages customers to verify that datasheets are current before placing orders. Quality Semi-Conductors
Absolute Maximum Ratings Tc = 25°C, Unless Otherwise Specified RFL1N18 Maximum Temperature for Soldering CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. RFL1N20 200 200 +20 8.33 0.0667 -55 to 150 300 260 UNITS V V A A V W W/°C NOTE: = 25°Cto125°C. Electrical Specifications Tc = 25°C, Unless Otherwise Specified PARAMETER Drain to Source Breakdown Voltage RFL1N18 RFL1N20 Gate Threshold Voltage Zero Gate Voltage Drain Current Gate to Source Leakage Current Drain to Source On-Voltage (Note 2) Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Thermal Resistance Junction to Case SYMBOL BVDSS VGS(TH) toss 'GSS VDS(ON) rDS(ON) 9fs ld(ON) tr ld(OFF) tf CISS coss CRSS RSJC TEST CONDITIONS ID = 250M.A, VGS = °v VGS = VDS, to = 250nA, (Figure 8) VDS = °-8 x Rated BVDSS VGS = ±20V, VDS = 0 Tc = 25°C Tc = 125°C ID = 1A, VGS = iov ID = 2A, VGS= 10V ID = 1A, VGS = 10V, (Figures 6, 7) ID = 1A, VDS= 10V, (Figure 10) ID = 1A, VDD = ioov RGS = son, VGS = 10V, (Figures 11, 12, 13) VGS = OV, VDS = 25V (Figure 9) f = 1MHz, MIN 180 200 400 TYP MAX ±100 3.65 8.3 3.65 200 UNITS V V V HA |xA nA V V n s ns ns ns ns pF PF PF °C/W Source to Drain Diode Specifications PARAMETER Source to Drain Diode Voltage (Note 2) Diode Reverse Recovery Time SYMBOL VSD trr TEST CONDITIONS ISD=1A ISD = 2A, dlSD/dt = SOA/ns MIN TYP 200 MAX 1.4 UNITS V ns