R8358G391X

R8358G NISSHINBO | Alldatasheet

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SENSE Pin Equipped Watchdog Timer with VD for Automotive Applications NO.EC-289-180530 OUTLINE The R8358G is a CMOS-based microprocessor supervisory circuit and has high accuracy and ultra low supply current voltage detector with built-in delay circuit and watchdog timer. When the SENSE voltage is down across the threshold, or the watchdog timer does not detect the system clock from the microprocessor, the reset output is generated. The voltage detector circuit is used for the system reset, etc. The detector threshold is fixed internally, and the accuracy is ±1.0%. The released delay time (Power -on Reset Delay) circuit is built -in, and output delay time is adjustable with an external capacitor, and the accuracy is ± 16%* 1. When the SENSE voltage becomes the released voltage, the reset state will be maintained during the delay time. The output type of the reset is selectable, Nch open-drain, or CMOS. The time out period of the watchdog timer can be also set with an external capacitor, and the accuracy is ±33%* The R8358G has a function to stop supervising clock by the watchdog timer (INH function). A necessary voltage source can be supervised with SENSE pin. There are another 4 products by the difference of packages and the function of voltage detector and watchdog timer. The package of R8358G is SSOP-8G.

FEATURES

< Voltage Detector Part > Adjustable by external capacitor < Watchdog Timer Part > Adjustable by external capacitor Adjustable by external capacitor

• Package *1 Accuracy to center value of (Min.+Max.)/2

APPLICATIONS

• Supervisory circuit for the power system of devices equipped with microprocessors .

NO.EC-289-180530 BLOCK DIAGRAMS R8358Gxx1A VDD GND SCK CTW WATCHDOG TIMER CLOCK DETECTOR RESETB INH SENSE CD Vref1 Vref2 R8358Gxx1C VDD GND SCK CTW WATCHDOG TIMER CLOCK DETECTOR RESETB INH SENSE CD Vref1 Vref2

NO. EC-289-180530 SELECTION GUIDE The detector threshold, the output type and the taping type for the ICs can be selected at the user s’ request. The selection can be made with designating the part number as shown below; Product Name Package Quantity per Reel Pb Free Halogen Free R8358Gxx1∗-TR-FE SSOP-8G 3,000 pcs Yes Yes xx : Set Detector Threshold (-VSET) can be designated in the range from 1.5V(15) to 5.5V(55) in 0.1V steps. ∗ : Designation of Output Type (A) Nch Open Drain (C) CMOS R8 Automotive Class Code: Operating Temperature Range Test Temperature AEC-Q100 −40°C to 125°C Low, 25°C, High Grade1 SERIES SELECTION R8355N R8356N R8357G R8358G R8359G Package SOT-23-6 SSOP-8G With INH pin (Inhibit) No Yes 2 clock input No Yes With MR pin (Manual Reset) No Yes No With SENSE pin No Yes No Remarks CD pin and CTW pin are combined uses. Operating Voltage Range 1.5V to 6.0V Supply Current 11.5µA

NO.EC-289-180530 PIN DESCRIPTIONS

• SSOP-8G 1 2 3 4 8 7 6 5 Pin No. Symbol Description

1 RESETB

Output Pin for Reset signal of Watchdog timer and Voltage Detector. (Output "L" at detecting Detector Threshold and Watchdog Timer Reset.)

2 SENSE Voltage Detector Voltage SENSE Pin

3 CD External Capacitor Pin for Setting Delay Time of Voltage Detector

4 GND Ground Pin

5 SCK Clock Input Pin from Microprocessor

6 INH Inhibit Pin ("L": Inhibit the watchdog timer)

7 CTW External Capacitor Pin for Setting Reset and Watchdog Timeout

8 VDD Power Supply Pin

NO. EC-289-180530 ABSOLUTE MAXIMUM RATINGS Symbol Item Rating Unit VDD Supply Voltage −0.3 to 7.0 V VCD Output Voltage Voltage of CD Pin −0.3 to VDD + 0.3 V VCTW Voltage of CTW Pin −0.3 to VDD + 0.3 V VRESETB Voltage of RESETB Pin −0.3 to 7.0 V VSCK Input Voltage Voltage of SCK Pin −0.3 to 7.0 V VINH Voltage of INH Pin −0.3 to 7.0 V VSENSE Voltage of SENSE Pin −0.3 to 7.0 V IRESETB Output Current Current of RESETB Pin 20 mA PD Power Dissipation *1 (SSOP-8G, Standard Land Pattern) 475 mW Tj Junction Temperature −40 to 150 °C Tstg Storage Temperature Range −55 to 150 °C *1 For Power Dissipation, please refer to PACKAGE INFORMATION. ABSOLUTE MAXIMUM RATINGS Electronic and mechanical stress momentarily exceeded absolute maximum ratings may cause the permanent damages and may degrade the life time and safety for both device and system using the device in the field. The functional operation at or over these absolute maximum ratings are not assured. RECOMMENDED OPERATING CONDITIONS Symbol Item Rating Unit VDD Operating Voltage 1.5 to 6.0 V Ta Operating Temperature Range −40 to 125 °C RECOMMENDED OPERATING CONDITIONS All of electronic equipment should be designed that the mounted semiconductor devices operate within the recommended operating conditions. The semiconductor devices cannot operate normally over the recommended operating conditions, even if when they are used over such conditions by momentary electronic noise or surge. And the semiconductor devices may receive serious damage when they continue to operate over the recommended operating conditions. The device electrical characteristics up to 125 ºC are evaluated at preproduction.

NO.EC-289-180530

ELECTRICAL CHARACTERISTICS

VDD=6.0V, C TW=0.1µF, CD=0.1µF, Pulled-up with 100kΩ on Nch Open Drain Output (R8358Gxx1A), unless otherwise noted.

• R8358Gxx1A/C ( −40°C ≤ Ta ≤ 110°C) Symbol Item Conditions Min. Typ. Max. Unit ISS Supply Current VDD= -VSET+0.5V, Clock pulse input 11 15 µA
• VD Part Symbol Item Conditions Min. Typ. Max. Unit -VDET Detector Threshold VDD=5V, SENSE pin threshold V VHYS Detector Threshold Hysteresis -VDET ×0.03 -VDET ×0.05 -VDET ×0.07 V tPLH Output Delay Time CD=0.1µF∗1 300 350 420 ms IRESETB Output Current (RESETB Output pin) Nch VDD=1.2V VDS=0.1V 0.38 0.8 mA Pch∗2 VDD=6.0V VDS=0.5V 0.65 0.9 mA VDDL Minimum Operating Voltage RESETB < = 0.1V, pull- up=100kΩ 0.6 0.9 V
• WDT Part Symbol Item Conditions Min. Typ. Max. Unit tWD Watchdog Timeout Period CTW=0.1µF∗1 230 310 450 ms tWR Reset Hold Time CTW=0.1µF∗1 29 34 48 ms VSCKH SCK Input "H" VDD×0.8 6.0 V VSCKL SCK Input "L" 0 VDD×0.2 V VINHH INH Input "H" 1.0 6.0 V VINHL INH Input "L" 0 0.35 V RINH INH pull-up Resistance 60 110 164 kΩ tSCKW SCK Input Pulse Width VSCKL=VDD×0.2 VSCKH=VDD×0.8 500 ns ∗1 Not including the temperature characteristics of the external capacitor. ∗2 In the case of CMOS type (R8358Gxx1C)

NO. EC-289-180530 Product-specific Electric Characteristics VD Part (−40°C ≤ Ta ≤ 110°C) Product Name -VDET [V] VHYS [V] Min. Typ. Max.

NO.EC-289-180530 TYPICAL APPLICATIONS R8358Gxx1A CD VDD RESET I/O R CTW GND VDD CD RESETB SCK CTW Microprocessor Power Supply SW SENSE INH R8358Gxx1A Typical Application R8358Gxx1C CD VDD RESET I/O CTW GND VDD CD RESETB SCK CTW Microprocessor Power Supply SW SENSE INH R8358Gxx1C Typical Application

NO. EC-289-180530 TECHNICAL NOTES When connecting resistors to the device’s input pin When connecting a resistor (R1) to an input of this device, the input voltage decreases by [Device’s Consumption Current] x [Resistance Value] only. And, the cross conduction current (1), which occurs when changing from the detecting state to the release state, is decreased the input voltage by [Cross Conduction Current] x [Resistance Value] only. And then, this device will enter the re-detecting state if the input voltage reduction is larger than the difference between the detector voltage and the released voltage. When the input resistance value is large and the VDD is gone up at mildly in the vicinity of the released voltage, repeating the above operation may result in the occurrence of output. As shown in Figure A/B, set R1 to become 100k Ω or less as a guide, and connect C IN(2) of 0.1μF and more to between the input pin and GND. Besides, make evaluations including temperature properties under the actual usage condition, with using the evaluation board like this way. As result, make sure that the cross conduction current has no problem. VDD GND OUT pin CIN(2) Figure A Voltage Detector VDD GND OUT pin CIN(2) Figure B Voltage Detector (1) In the CMOS output type, a charging current for OUT pin is included. (2) Note the bias dependence of capacitors.

NO.EC-289-180530 OPERATING DESCRIPTIONS

• Timing Chart -VDET +VDET VRESETB VCTW VSCK VSENSE Vref2H Vref2L +VTCD VINH tPLH tWD tPLH tWR tPLH tWDI VDD - VTCD tPHL VCD VDDL Undefined Undefined ∗) VTCD : Threshold voltage of CD pin when a power-on reset pulse inverting. ∗) Vref2H : CTW pin voltage at the end of WDT timeout period. ∗) Vref2L : CTW pin voltage at the begin of WDT timeout period.

NO. EC-289-180530 (1) When the power supply, the SENSE pin voltage becomes more than the released voltage (+V DET), after the released delay time (or the power on reset time tPLH), the output of RESETB becomes "H" level. (2) When the SCK pulse is input, the watchdog timer is cleared, and C TW pin mode changes from the discharge mode to the charge mode. When the CTW pin voltage becomes higher than Vref2H, the mode will change into the discharge mode, and next watchdog time count starts. (3) Unless the SCK pulse is input, WDT will not be cleared, and during the charging period of C TW pin, RESETB="L". (4) When the SENSE pin becomes lower than the detector threshold voltage (-V DET), RESETB outputs "L" after the tPHL. (5) If "L" signal is input to the INH pin, the RESETB outputs "H", regardless the SCK clock state. (6) When the signal to the INH pin is set from "L" to "H", the watchdog starts supervising the system clock.

• Watchdog Timeout period/Reset hold time The watchdog timeout period and reset hold time can be set with an external capacitor to C TW pin. The next equations describe the relation between the watchdog timeout period and the external capacitor value, or the reset hold time and the external capacitor value. t t WR (s) = tWD / 9 The watchdog timer (WDT) timeout period is determined with the discharge time of the external capacitor. During the watchdog timeout period, if the clock pulse from the system is detected, WDT is cleared and the capacitor is charged. When the charge of the capacitor completes, another watchdog timeout period starts again. During the watchdog timeout period, if the clock pulse from the system is not detected, during the next reset hold time RESETB pin outputs "L". On the reset time (that is, in charging the external capacitor) and the time period “t WDI” after the initiation of the watchdog timeout ( that is, after the discharge of the external capacitor is initiated), the clock pulse during their time period is ignored. tWDI (s) = tWD /10
• Released Delay Time (Power-on Reset delay time) The released delay time can be set with an external capacitor connected to the C D pin. The next equation describes the relation between the capacitance value and the released delay time (t PLH). t The capacitor connected to CD pin determines tWD, tWR, and tPLH. When the V DD voltage becomes equal or less than (-V DET), discharge of the capacitor connected to the C D pin starts. Therefore, if the discharge is not enough and V DD voltage returns to (+VDET) or more, thereafter the delay time will be shorter than tPLH which is expected.

NO.EC-289-180530 VDD VCD VRESETB Complete Discharge +VDET -VDET +VTCD -VTCD tPLH1 tPLH Incomplete Discharge Power-on Reset Operation against Input Glitch (tPLH1 < tPLH)

• Minimum Operating Voltage We specified the minimum operating voltage as the minimum input voltage in which the condition of RESETB pin being 0.1V or lower than 0.1V. (Herein, pull -up resistance is set as 100k Ω in the case of the Nch open- drain output type.)
• Inhibit (INH) Function If INH pin is set at "L", the watchdog timer stops monitoring the clock, and the RESETB output will be dominant by the voltage detector's operation. Therefore, if the SENSE pin voltage is set at more than the detector threshold level, RESETB outputs "H" regardless the clock pulse. INH pin is pulled up with a resistor (Typ.110kΩ) internally.
• SENSE Function Built-in Voltage detector monitors the input voltage for SENSE pin. To obtain the normal detector threshold, VDD ≥ 1.5V must be secured.
• RESETB Output RESETB pin's output type is selectable either the Nch open- drain output or CMOS output. If the Nch open-drain type output is selected, the RESETB pin is pulled up with an external resistor to an appropriate voltage source.
• Clock Pulse Input Built-in watchdog timer is cleared with the SCK clock pulse within the watchdog timeout period.

NO. EC-289-180530 TYPICAL CHARACTERISTICS Note: Typical Characteristics are intended to be used as reference data; they are not guaranteed. 1) Supply Current vs. Input Voltage R835xx151x R835xx301x 2) Detector Threshold vs. Temperature R835xx151x R835xx271x R835xx421x 0 1 2 3 4 5 6 Input Voltage VDD(V) Supply Current Iss ( µA) Ta=125℃ Ta=25℃ Ta=-40℃ 0 1 2 3 4 5 6 Input Voltage VDD(V) Supply Current Iss ( µA) Ta=125℃ Ta=25℃ Ta=-40℃ -40 -25 0 25 50 75 100 125 1.47 1.48 1.49 1.50 1.51 1.52 1.53 Detector Threshold -VDET (V) Ta (°C) -40-25 0 25 50 75 100 125 2.66 2.67 2.68 2.69 2.70 2.71 2.72 2.73 2.74 Ta (°C) Detector Threshold -VDET (V) -40-25 0 25 50 75 100 125 4.12 4.14 4.16 4.18 4.20 4.22 4.24 4.26 4.28 Ta (°C) Detector Threshold -VDET (V)

NO.EC-289-180530 3) Detector Threshold Hysteresis vs. Temperature R835xx151x R835xx271x R835xx421x 4) Nch Driver Output Current vs. VDS R835xx -40 -25 0 25 50 75 100 125 Ta (°C) Detector Threshold Hysteresys HYS (%) -40 -25 0 25 50 75 100 125 Ta (°C) Detector Threshold Hysteresys HYS (%) -40 -25 0 25 50 75 100 125 Ta (°C) Detector Threshold Hysteresys HYS (%) DD DD DD DD DD DD DD

NO. EC-289-180530 5) Nch Driver Output Current vs. Input Voltage R835xx R835xx 6) Pch Driver Output Current vs. Input Voltage R835xx R835xx R835xx VDS=0.3V 0 1 2 3 4 5 6 Input Voltage VDD (V) Ta=125℃ Ta=25℃ Ta=-40℃ Nch Driver Output Current IRESETB (mA) 0 1 2 3 4 5 6 Ta=125℃ Ta=25℃ Ta=-40℃ VDS=0.5V Nch Driver Output Current IRESETB (mA) Input Voltage VDD (V) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 1 2 3 4 5 6 Ta=-40℃ Ta=25℃ Ta=125℃ VDS=0.3V Pch Driver Output Current IRESETB (mA) Input Voltage VDD (V) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 1 2 3 4 5 6 Ta=-40℃ Ta=25℃ Ta=125℃ VDS=0.5V Pch Driver Output Current IRESETB (mA) Input Voltage VDD (V) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 1 2 3 4 5 6 Ta=-40℃ Ta=25℃ Ta=125℃ VDS=1.0V Pch Driver Output Current IRESETB (mA) Input Voltage VDD (V)

NO.EC-289-180530 7) Released Delay Time vs. Input Voltage 8 ) Released Delay Time vs. Temperature R835xx R835xx 9) Detector Output Delay Time vs. Temperature 10) WDT Reset Timer vs. Temperature R835xx R835xx 11) WDT Timeout Period vs. Temperature 12) WDT Reset Timer vs. Input Voltage R835xx R835xx 300 320 340 360 380 400 420 440 460 480 500 0 1 2 3 4 5 6 7 Input Voltage VDD [V] Ta=25°C Output Delay Time tPLH (ms) -40 -25 0 25 50 75 100 125 300 320 340 360 380 400 420 440 460 480 500 VDD=6V Ta (°C) Output Delay Time tPLH (ms) -40 -25 0 25 50 75 100 125 100 (-VDET)+1 (-VDET)- 1 1us Input Voltage Ta (°C) Detect Delay Time tPHL (ms) -40 -25 0 25 50 75 100 125 Ta (°C) WDT Reset Time tWR (ms) -40 -25 0 25 50 75 100 125 200 220 240 260 280 300 320 340 360 380 400 Operation Temperature Ta [°C] WDT TimeOut Period Time tWD (ms) 1 2 3 4 5 6 Input Voltage VDD (V) WDT Reset Time tWR (ms) (µs)

NO. EC-289-180530 13) WDT Timeout Period vs. Input Voltage 14) Output Delay Time vs. External Capacitance R835xx R835xx 200 220 240 260 280 300 320 340 360 380 400 1 2 3 4 5 6 Input Voltage VDD (V) WDT Timeout Period tWD (ms) 0.001 0.01 0.1 100 1000 0.1 1 10 100 External Capacitance CD [nF] tPLH tPHL Delay Time tPLH/tPHL (ms) Input Voltage (-VDET )+1 (-VDET )-1 1us 1us

Ver. A i The power dissipation of the package is dependent on PCB material, layout, and environmental conditions. The following conditions are used in this measurement. Measurement Conditions Standard Test Land Pattern Environment Mounting on Board (Wind Velocity = 0 m/s) Board Material Glass Cloth Epoxy Plastic (Double-Sided Board) Board Dimensions 40 mm × 40 mm × 1.6 mm Copper Ratio Top Side: Approx. 50% Bottom Side: Approx. 50% Through-holes φ 0.5 mm × 44 pcs Measurement Result (Ta = 25°C, Tjmax = 150°C) Standard Test Land Pattern Power Dissipation 475 mW Thermal Resistance θjc = 60°C/W IC Mount Area (mm) Power Dissipation vs. Ambient Temperature Measurement Board Pattern Power Dissipation PD (mW) 600 500 400 300 200 100 50 75 100 125 150 Ambient Temperature ( C Standard Test Land Pattern 475

PACKAGE DIMENSIONS SSOP-8G Ver. A i 2.9±0.2 8 5 1 4 0.475nom. 2.8±0.2 4.0±0.2 0.45±0.15 0.65 0.1 1.3 max (1.2 ) +0.1 -0.2 0.2±0.1 0.15 M 0.1±0.1 1.1±0.1 0°-15° 0.125 +0.1 -0.05

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