R8315N NISSHINBO | Alldatasheet
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Technical content
36V Input VD with Detector and Release Delay Function for Automotive Applications NO.EC-294-240509 OUTLINE The R8315N is a CMOS-based voltage detector IC that provides high-voltage resistance, high voltage accuracy and low supply current. This device is suitable for battery voltage supervisor. The R8315NxxxA/ B provide VDD pin detection and the R8315NxxxE/ F provide SENSE pin detection. Detector threshold and Release voltage can be specified separately. Both the detector threshold accuracy and the release voltage accuracy are ±1.5% (25ºC) (Detector Threshold Hysteresis is 5% to 20%.). The detect output delay time and the release output delay time (Power-on Reset Time) are adjustable by using external capacitors. The output types are Nch open drain “L” output and Nch open drain “H” output. The R8315N is available in SOT-23-6 package that is possible to achieve high-density mounting on boards.
FEATURES
R8315NxxxE/F: 3.6V to6.0V (7.0V) R8315NxxxE/ F: Typ. 3.5µA ±2.0% (-40ºC to 110ºC) ±2.0% (-40ºC to 110ºC) Detect Output Delay Time and Release Output Delay Time are adjustable by external capacitor. *1 The release voltage can be adjusted by having the hysteresis set to 5% to 20% of the detector threshold.
APPLICATIONS
Voltage monitoring for electronic control units such as EV inverter and battery charge control unit.
NO.EC-294-240509 BLOCK DIAGRAMS R8315NxxxA R8315NxxxB DOUT VDD Vref GND Delay Circuit CD CR DOUT VDD Vref GND Delay Circuit CD CR R8315NxxxE R8315NxxxF DOUT VDD Vref GND Delay Circuit CD SENSE CR DOUT VDD Vref GND Delay Circuit CD SENSE CR
NO.EC-294-240509 SELECTION GUIDE VD Detector Threshold and Release Voltage for the ICs are user-selectable options. Product Name Package Quantity per Reel Pb Free Halogen Free R8315Nxxx-TR-FE SOT-23-6 3,000 pcs Yes Yes xxx: Specify a combination of Detector Threshold (-VDET) and Release Voltage (+VDET) by using serial numbers starting from 001. -VDET can be designated between 5.0V and 10.0V in 0.1V steps. +VDET can be designated between 5.3V and 11.0V in 0.1V steps. : Select an output type from below. A: VDD Voltage Detection Type “L” Output B: VDD Voltage Detection Type “H” Output E: SENSE Voltage Detection Type “L” Output F: SENSE Voltage Detection Type “H” Output R8 Automotive Class Code Operating Temperature Range Guaranteed Specs Temperature Range Screening −40°C to 125°C −40°C to 110°C High and low temperature PIN DESCRIPTIONS SOT-23-6 6 5 4 1 2 3 (mark side) Pin No. Symbol Description
1 CD Release Output Delay Time (tdelay) Setting Pin
2 CR Detect Output Delay Time (treset) Setting Pin
NC No Connection (R8315NxxxA/ B) SENSE VD Voltage SENSE Pin (R8315NxxxE/ F)
4 VDD Input Supply Voltage Pin
5 GND Ground Pin
6 DOUT V D Output Pin (Nch Open Drain)
NO.EC-294-240509 ABSOLUTE MAXIMUM RATINGS Symbol Item Rating Unit VDD Supply Voltage (R8315NxxxA/B) 0.3 to50.0 V Supply Voltage (R8315NxxxE/F) -0.3 to7.0 V VSENSE SENSE Pin Voltage (R8315NxxxE/F) -0.3 to50.0 V VDOUT D OUT Pin Output Voltage -0.3 to7.0 V VCD C D Pin Output Voltage -0.3 to7.0 V VCR C R Pin Output Voltage -0.3 to7.0 V IOUT D OUT Pin Output Curren 20 mA PD Power Dissipation (SOT-23-6) *1 Standard Land Pattern 525 mW Tj Junction Temperature -40 to150 C Tstg Storage Temperature Range -55 to150 C *1 For Power Dissipation, please refer to PACKAGE INFORMATION. ABSOLUTE MAXIMUM RATINGS Electronic and mechanical stress momentarily exceeded absolute maximum ratings may cause the permanent damages and may degrade the lifetime and safety for both device and system using the device in the field. The functional operation at or over these absolute maximum ratings is not assured. RECOMMENDED OPERATING CONDITIONS Symbol Item Rating Unit VDD Operating Voltage (R8315NxxxA/B) 1.4 to 36.0 V Operating Voltage (R8315NxxxE/F) 3.6 to 6.0 V VSENSE SENSE Pin Input Voltage (R8315NxxxE/F) 0 to 36 V Ta Operating Temperature Range −40 to 125 C RECOMMENDED OPERATING CONDITIONS All of electronic equipment should be designed that the mounted semiconductor devices operate within the recommended operating conditions. The semiconductor devices cannot operate normally over the recommended operating conditions, even if when they are used over such ratings by momentary electronic noise or surge. And the semiconductor devices may receive serious damage when they continue to operate over the recommended operating conditions. The device electrical characteristics up to 125 ºC are evaluated at preproduction.
NO.EC-294-240509
ELECTRICAL CHARACTERISTICS
CD1000pF, CR1000pF, Pulled-up Resistance with 100kΩ, and Pulled-up Voltage with 5V, unless otherwise noted. R8315NxxxA/B (VDD Voltage Detection Type) (40C ≤ Ta ≤ 110C) Symbol Item Conditions Min. Typ. Max. Unit VDDL Minimum Operating Voltage *1 1.4 V ISS Supply Current VDD VDET0.1V 3.8 6.1 µA VDD+VDET+1.0V 3.8 6.4 -VDET Detector Threshold V +VDET Released Voltage V treset Detect Output Delay Time *2 CR1000pF, 40C≤Ta≤110C 6.5 10 14.0 ms tdelay Release Output Delay Time *3 CD1000pF, 40C≤Ta≤110C 6.5 10 14.0 ms IOUT Output Current (Nch Driver Output Pin) R8315NxxxA VDD=4.5V, VDS=0.05V 0.5 2.0 mA R8315NxxxB VDD=13.0V, VDS=0.05V RCD CD Pin Discharge Tr. On Resistance VDD=13.0V, VCD=0.5V 0.50 2.60 kΩ RCR CR Pin Discharge Tr. On Resistance VDD=4.5V, VCR=0.5V 0.50 2.60 kΩ *1 The minimum operating voltage is the voltage required for the stable operation of the devices. *2 A time that VDOUT requires to reach 2.5 V when changed VDD from “−VDET +1.0 V” to “−VDET −1.0 V”. *3 A time that VDOUT requires to reach 2.5 V when changed VDD from “+VDET −1.0 V” to “+VDET +1.0 V”.
NO.EC-294-240509 CD1000pF, CR1000pF, Pulled-up Resistance with 100kΩ, and Pulled-up Voltage with 5V, unless otherwise noted. R8315NxxxE/F (SENSE Voltage Detection Type) (40C ≤ Ta ≤ 110C) Symbol Item Conditions Min. Typ. Max. Unit VDDL Minimum Operating Voltage *1 3.6 V ISS Supply Current *2 VDD5.0V, VSENSEVDET0.1V 3.5 5.5 µA VDD5.0V, VSENSE+VDET+1.0V 3.5 5.6 RSENSE SENSE Resistance 4.5 51.5 MΩ -VDET Detector Threshold V +VDET Released Voltage V treset Detect Output Delay Time *3 CR1000pF, 40C ≤ Ta ≤ 110C 6.5 10 14.0 ms tdelay Release Output Delay Time *4 CD1000pF, 40C ≤ Ta ≤ 110C 6.5 10 14.0 ms IOUT Output Current (Nch Driver Output Pin) R8315NxxxE VDD5.0V, VDS0.05V, VSENSE-VDET0.1V 0.5 2.0 mA R8315NxxxF VDD5.0V, VDS0.05V, VSENSE+VDET1.0V RCD CD Pin Discharge Tr. On RCR CR Pin Discharge Tr. On *1 The minimum operating voltage is the voltage required for the stable operation of the devices. *2 Not including the current for SENSE resistance. *3 A time that VDOUT requires to reach 2.5 V when changed VSENSE from “−VDET +1.0 V” to “−VDET −1.0 V”. *4 A time that VDOUT requires to reach 2.5 V when changed VSENSE from “+VDET −1.0 V” to “+VDET +1.0 V”. Product-specific Electrical Characteristics R8315NxxxA/B/E/F Product Name -VDET +VDET Ta=25℃ –40°C≤Ta≤110°C Ta=25℃ –40°C≤Ta≤110°C
NO.EC-294-240509 TYPICAL APPLICATIONS CD R8315NxxxA/B VR or DC/DC VDD CD CR GND DOUT CR Microprocessor R8315xxxxA/B Typical Application CD R8315NxxxE/F SENSE CD CR GND DOUT CR VDD VR or DC/DC Microprocessor R8315xxxxE/F Typical Application
NO.EC-294-240509 TECHNICAL NOTES When connecting resistors to the device’s input pin When connecting a resistor (R1) to an input of this device, the input voltage decreases by [Device’s Consumption Current] x [Resistance Value] only. And, the cross conduction current* 1, which occurs when changing from the detecting state to the release state, is decreased the input voltage by [Cross Conduction Current] x [Resistance Value] only. And then, this device will enter the re-detecting state if the input voltage reduction is larger than the difference between the detector voltage and the released voltage. When the input resistance value is large and the VDD is gone up at mildly in the vicinity of the released voltage, repeating the above operation may result in the occurrence of output. As shown in Figure A/B, set R1 to become 100kΩ or less as a guide, and connect C IN of 0.1μF and more to between the input pin and GND. Besides, make evaluations including temperature properties under the actual usage condition, with using the evaluation board like this way. As result, make sure that the cross conduction current has no problem. VDD GND OUT pin CIN*2 Figure A Voltage Detector VDD GND OUT pin CIN*2 Figure B Voltage Detector *1 In the CMOS output type, a charging current for OUT pin is included. *2 Note the bias dependence of capacitors.
NO.EC-294-240509 Prohibited Area of Supply Voltage Fluctuations (VDD Voltage Detection Type) As for the steep change of the supply voltages in the prohibited area as shown in Figure C, the detector may cause a false detection if the supply voltage is over the detector threshold, as shown in Figure D. In addition, the detector may take an incorrect detect output delay time if the supply voltage is less than –VDET, as shown in Figure Figure C. Prohibited Area VDD -VDET +VDET tf Vp-p GND Figure D VDD -VD ET +VDE T tf Vp-p GND 3.6V Figure E
NO.EC-294-240509 OPERATING DESCRIPTION R8315NxxxA (VDD Voltage Detection Type) Vref Ra Rb Rc VDD DOUT GND Tr.1 Nch Comparator DOUT pin should be pulled- up to an external voltage level. Delay Circuit CD CR Block Diagram with External Capacitors Release Voltage +VDET Detector Threshold -VDET Supply Voltage (VDD) Minimum Operating Voltage VDDL GND GND A B Release Output Delay Time tdelay Output Voltage (VDOUT) Pull-up Voltage Detect Output Delay Time treset Hysteresis Unstable Output Step 1 2 3 4 5 Comparator (-) Pin Input Voltage Ⅰ Ⅱ Ⅱ Ⅱ Ⅰ Comparator Output L H Unstable H L Tr.1 OFF ON Unstable ON OFF Output Tr. (Nch) OFF ON Unstable ON OFF Ⅰ xVDD Rb+Rc Ra+Rb+Rc Ⅱ xVDD Rb Ra+Rb Operation Diagram OPERATING CONDITIONS 1. The output voltage is equalized to the pull-up voltage. 2. The V DD voltage drops to the detector threshold (A point) which means Vref ≥ V DD x (Rb+Rc) / (Ra+Rb+Rc), and the comparator output shifts from “L” to “H” voltage, and the output pin voltage shifts from the pull-up voltage to “L” voltage. 3. If the V DD voltage is lower than the minimum operating voltage, the output voltage becomes unstable. 4. The output pin voltage becomes “L” voltage. 5. The V DD voltage becomes higher than the release voltage (B point) which means Vref ≤ VDD x Rb / (Ra+Rb), and the comparator output shifts from “H” to “L” voltage, and the output pin voltage is equalized to the pull-up voltage. * The gap between the release voltage and the detector threshold is hysteresis.
NO.EC-294-240509 R8315NxxxB (VDD Voltage Detection Type) Vref Ra Rb Rc VDD DOUT GND Tr.1 Nch Comparator DOUT pin should be pulled- up to an external voltage level. Delay Circuit CD CR Block Diagram with External Capacitors Release Voltage +VDET Detector Threshold -VDET Supply Voltage (VDD) Minimum Operating Voltage VDDL GND GND A B Released Output Delay Time tdelay Output Voltage (VDOUT) Pull-up Voltage Hysteresis Detect Output Delay Time treset Step 1 2 3 4 5 Comparator (-) Pin Input Voltage Ⅰ Ⅱ Ⅱ Ⅱ Ⅰ Comparator Output L H H H L Tr.1 OFF ON ON ON OFF Output Tr. (Nch) ON OFF OFF OFF ON Ⅰ xVDD Rb+Rc Ra+Rb+Rc Ⅱ xVDD Rb Ra+Rb Operation Diagram OPERATING CONDITIONS 1. The output pin voltage becomes “L” voltage. 2. The V DD voltage drops to the detector threshold (A point) which means Vref ≥ VDD x (Rb+Rc) / (Ra+Rb+Rc), and the comparator output shifts from “L” to “H” voltage and the output voltage is equalized to the pull-up voltage. 3. If the V DD voltage is lower than the minimum operating voltage, the output is the pull-up voltage. 4. The output voltage is equalized to the pull-up voltage. 5. The V DD voltage becomes higher than the release voltage (B point) which means Vref ≤ VDD x Rb / (Ra+Rb), and the comparator output shift from “H” to ”L” voltage and the output voltage becomes “L” voltage. * The gap between the release voltage and the detector threshold is hysteresis.
NO.EC-294-240509 R8315NxxxE (SENSE Voltage Detection Type) Vref Ra Rb Rc VDD DOUT GND Tr.1 Nch Comparator DOUT pin should be pulled- up to an external voltage level. Delay Circuit CD CR SENSE Block Diagram with External Capacitors Release Voltage +VDET Detector Threshold -VDET SENSE Pin Voltage (VSENSE) GND Pull-up Voltage GND A B Release Output Delay Time tdelay Hysteresis Detect Output Delay Time treset Output Voltage (VDOUT) Step 1 2 3 Comparator (-) Pin Input Voltage Ⅰ Ⅱ Ⅰ Comparator Output L H L Tr.1 OFF ON OFF Output Tr. (Nch) OFF ON OFF Ⅰ xVSENSE Rb+Rc Ra+Rb+Rc Ⅱ xVSENSE Rb Ra+Rb Operation Diagram OPERATING CONDITIONS 1. The output voltage is equalized to the pull-up voltage. 2. The SENSE pin voltage drops to the detector threshold (A point) which means Vref ≥ VDD x(Rb+Rc) / (Ra+Rb+Rc), and the comparator output shifts from “L” to “H” voltage, and the output pin voltage shifts from the pull-up voltage to “L” voltage. (If the V DD voltage is higher than the minimum operating voltage, the output remains as “L” voltage) 3. The SNESE pin voltage becomes higher than the release voltage (B point) which means Vref ≤ VSENSE xRb / (Ra+Rb), and the comparator output shifts from “H” to “L” voltage, and the output pin voltage is equalized to the pull-up voltage. * The gap between the release voltage and the detector threshold is hysteresis.
NO.EC-294-240509 R8315NxxxF (SENSE Voltage Detection Type) Vref Ra Rb Rc VDD DOUT GND Tr.1 Nch Comparator DOUT pin should be pulled-up to an external voltage level. Delay Circuit CD CR SENSE Block Diagram with External Capacitors Release Voltage +VDET Detector Threshold -VDET SENSE Pin Voltage (VSENSE) GND Pull-up Voltage GND A B Release Output Delay Time tdelay Hysteresis Detect Output Delay Time treset Output Voltage (VDOUT) Step 1 2 3 Comparator (-) Pin Input Voltage Ⅰ Ⅱ Ⅰ Comparator Output L H L Tr.1 OFF ON OFF Output Tr. (Nch) ON OFF ON Ⅰ xVSENSE Rb+Rc Ra+Rb+Rc Ⅱ xVSENSE Rb Ra+Rb Operation Diagram OPERATING CONDITIONS 1. The output becomes “L” voltage if the SENSE pin voltage is higher than the detector threshold. 2. The SENSE pin voltage drops to the detector threshold (A point) which means Vref ≥ V SENSEx (Rb+Rc) / (Ra+Rb+Rc), and the comparator output shifts from “L” to “H” voltage and the output voltage is equalized to the pull-up voltage. (If the VDD voltage is higher than the minimum operating voltage, the output remains as the pull-up voltage.) 3. The SENSE pin voltage becomes higher than the release voltage (B point) which means Vref ≤ V SENSE x Rb / (Ra+Rb), and the comparator output shift from “H” to ”L” voltage and the output voltage becomes “L” voltage. * The gap between the release voltage and the detector threshold is hysteresis.
NO.EC-294-240509 DETECT OUTPUT DELAY TIME (treset) Detect Output Delay Time (treset) is defined as follows: treset starts after the output pin (D OUT) is pulled up to 5V with a 100kΩ resistor and the V DD/ VSENSE is shifted -VDET1.0V -VDET1.0V VDD / VSENSE GND 5.0V 2.5V GND VDOUT treset -VDET -VDET1.0V -VDET1.0V VDD / VSENSE GND 5.0V 2.5V GND VDOUT treset -VDET R8315NxxxA/ E R8315NxxxB/ F treset is calculated by the following equation: treset (s) CR 107 With the R8315NxxxA/ B, if the VDD voltage after detection is 3.6V or less, the normal detect output delay time cannot be expected due to insufficient voltage (The detect output delay time decreases along with the decrease of VDD voltage). DETECT OUTPUT DELAY VTCR GND GND -VDET treset VDD / VSENSE VCR VDOUT +VDET VTCR GND GND -VDET treset VDD / VSENSE VCR VDOUT +VDET R8315NxxxA/E R8315NxxxB/F If the voltage lower than the detector threshold is applied to V DD/ SENSE pin while the voltage higher than the release voltage is applied to the VDD/ SENSE pin, the external capacitor starts to charge electricity and the CR pin voltage starts to increase. Until the CR pin voltage reaches to the detector threshold of the detect output delay pin (VTCR), the output voltage maintains the release output. If the CR pin voltage becomes higher than VTCR, the output voltage shifts from the release output to the detection output. In addition, if the output voltage shift from the release output to the detection output, the external capacitor starts to discharge electricity and the CR pin voltage starts decrease.
NO.EC-294-240509 RELEASE OUTPUT DELAY TIME (tdelay) Release Output Delay Time (tdelay) is defined as follows: tdelay starts after the output pin (D OUT) is pulled up to 5V with a 100kΩ resistor, and the V DD/ VSENSE is shifted +VDET+1.0V +VDET-1.0V VDD / VSENSE GND 5.0V 2.5V GND VDOUT tdelay +VDET +VDET+1.0V +VDET-1.0V VDD / VSENSE GND 5.0V 2.5V GND VDOUT tdelay +VDET R8315NxxxA/ E R8315NxxxB/ F tdelay is calculated by the following equation: tdelay (s) CD 107 RELEASE OUTPUT DELAY VTCD GND GND +VDET t delay VDD / VSENSE VCD VDOUT -VDET VTCD GND GND +VDET tdelay VDD / VSENSE VCD VDOUT -VDET R8315NxxxA/E R8315NxxxB/F If the voltage higher than the release voltage is applied to the VDD/ SENSE pin while the voltage lower than the detector threshold is applied to VDD/ SENSE pin, the external capacitor starts to charge electricity and the C D pin voltage starts to increase. Until the CD pin voltage reaches to the release voltage of the release output delay pin (VTCD), the output voltage maintains the release output. If the CD pin voltage becomes higher than the release voltage of the release output delay pin, the output voltage shifts from the detection output to the release output. In addition, if the output voltage shifts from the detection output to the release output, the external capacitor starts to discharge electricity and the CD pin voltage starts to decrease.
NO.EC-294-240509 TIMING CHART R8315NxxxA/ B (VDD Voltage Detection Type) VDD VDOUT -VDET +VDET VDDL treset tdelay Pull-up Voltage treset tdelay Undefined R8315NxxxA VDD VDOUT -VDET +VDET treset tdelay Pull-up Voltage treset tdelay R8315NxxxB
NO.EC-294-240509 R8315NxxxE/F (SENSE Voltage Detection Type) VSENSE Undefined VDOUT -VDET +VDET treset tdelay Pull-up Voltage VDD VDDL Undefined tdelay treset R8315NxxxE VSENSE VDOUT -VDET +VDET treset tdelay VDD tdelay Pull-up Voltage treset R8315NxxxF
NO.EC-294-240509
PACKAGE INFORMATION
POWER DISSIPATION (SOT-23-6) Power Dissipation (PD) depends on conditions of mounting on board. This specification is based on the measurement at the condition below: Measurement Conditions Standard Test Land Pattern Environment Mounting on Board (Wind velocity=0m/s) Board Material Glass cloth epoxy plastic (Double sided) Board Dimensions 40mm*40mm*1.6mm Copper Ratio Top side: Approx. 50%, Back side: Approx. 50% Through-holes 0.5mm * 44pcs Standard Test Land Pattern Free Air Power Dissipation 525mW 310mW Thermal Resistance ja = (150-25C)/0.525W = 238C/W 400 C/W Measurement Board Pattern IC Mount Area (Unit: mm)
NO.EC-294-240509 PACKAGE DIMENSIONS (SOT-23-6) MARK SPECIFICATION (SOT-23-6) : Product Code ･･･ Refer to MARK SPECFICATION TABLE. : Lot Number ･･･ Alphanumeric Serial Number : Lot Sub Number ･･･ Alphanumeric Serial Number 4 5 6 3 2 1 2.9±0.2 1.9±0.2 (0.95) (0.95) 6 4 1 2 3 1.6-0.1 +0.2 2.8±0.3 0.4-0.2 Unit : mm +0.1 0.8±0.1 1.1-0.1 +0.2 0 to 0.1 0.15-0.05 +0.1 0.2MIN.
NO.EC-294-240509 MARK SPECIFICATION TABLE (SOT-23-6) R8315NxxxA R8315NxxxB Product Name Set Voltage Product Name Set Voltage Detection Release Detection Release R8315N001A 5H 6.4 7.3 R8315N001B 5R 6.4 7.3 R8315N002A 5J 8.5 9.0 R8315N002B 5S 8.5 9.0 R8315N003A 5K 9.0 9.5 R8315N003B 5T 9.0 9.5 R8315N004A 5L 5.9 6.8 R8315N004B 5U 5.9 6.8 R8315N005A 5M 6.5 7.1 R8315N005B 5V 6.5 7.1 R8315N006A 5N 6.3 6.9 R8315N006B 5W 6.3 6.9 R8315N007A 5P 5.8 6.3 R8315N007B 5X 5.8 6.3 R8315N020A 6C 5.2 5.5 R8315N020B 6D 5.2 5.5 R8315N028B 6G 5.2 6.0 R8315NxxxE R8315NxxxF Product Name Set Voltage Product Name Set Voltage Detection Release Detection Release R8315N001E 5Y 6.4 7.3 R8315N001F 65 6.4 7.3 R8315N002E 5Z 8.5 9.0 R8315N002F 66 8.5 9.0 R8315N003E 60 9.0 9.5 R8315N003F 67 9.0 9.5 R8315N004E 61 5.9 6.8 R8315N004F 68 5.9 6.8 R8315N005E 62 6.5 7.1 R8315N005F 69 6.5 7.1 R8315N006E 63 6.3 6.9 R8315N006F 6A 6.3 6.9 R8315N007E 64 5.8 6.3 R8315N007F 6B 5.8 6.3 R8315N020E 6E 5.2 5.5 R8315N020F 6F 5.2 5.5 R8315N028F 6H 5.2 6.0
NO.EC-294-240509 TYPICAL CHARACTERISTICS Note: Typical Characteristics are intended to be used as reference data; they are not guaranteed. 1) Supply Current vs. Input Voltage R8315NxxxA/B (-VDET =5.0V, VDET =5.3V) R8315NxxxA/B (-VDET =6.4V, VDET =7.3V) R8315NxxxA/B (-VDET =10.0V, VDET=11.0V) R8315NxxxE/F (VSENSE=-VDET0.1V) R8315NxxxE/F (VSENSE=+VDET0.1V) 0 6 12 18 24 30 36 Input Voltage VDD (V) Supply Current Iss (mA) Ta=125℃ Ta=25℃ Ta=-40℃ 0 6 12 18 24 30 36 Input Voltage VDD (V) Supply Current Iss (mA) Ta=125℃ Ta=25℃ Ta=-40℃ 0 6 12 18 24 30 36 Input Voltage VDD (V) Supply Current Iss (mA) 0 1 2 3 4 5 6 Input Voltage V DD (V) Supply Current Iss (mA) Ta=125℃ Ta=25℃ Ta=-40℃ 0 1 2 3 4 5 6 Input Voltage V DD (V) Supply Current Iss (mA) Ta=125℃ Ta=25℃ Ta=-40℃
NO.EC-294-240509 2) Detector Threshold vs. Temperature R8315NxxxA/B (-VDET=5.0V) R8315NxxxE/F（-VDET=5.0V） R8315NxxxA/B（-VDET=6.4V） R8315NxxxE/F（-VDET=6.4V） R8315NxxxA/B（-VDET=10.0V） R8315NxxxE/F（-VDET=10.0V） -40 -25 0 25 50 75 100 125 4.90 4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10 Ta (°C) Detector Threshold -VDET (V) -40-25 0 25 50 75 100 125 4.90 4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10 Ta (°C) Detector Threshold -V DET (V) VDD=5.0V -40-25 0 25 50 75 100 125 6.30 6.32 6.34 6.36 6.38 6.40 6.42 6.44 6.46 6.48 6.50 Ta (°C) Detector Threshold -VDET (V) -40-25 0 25 50 75 100 125 6.30 6.32 6.34 6.36 6.38 6.40 6.42 6.44 6.46 6.48 6.50 Ta (°C) Detector Threshold -V DET (V) VDD=5.0V -40-25 0 25 50 75 100 125 9.90 9.92 9.94 9.96 9.98 10.00 10.02 10.04 10.06 10.08 10.10 Ta (°C) Detector Threshold -VDET (V) -40-25 0 25 50 75 100 125 9.90 9.92 9.94 9.96 9.98 10.00 10.02 10.04 10.06 10.08 10.10 Ta (°C) Detector Threshold -V DET (V) VDD=5.0V
NO.EC-294-240509 3) Release Voltage vs. Temperature R8315NxxxA/B（+VDET=5.3V） R8315NxxxE/F（+VDET=5.3V） R8315NxxxA/B（+VDET=7.3V） R8315NxxxE/F（+VDET=7.3V） R8315NxxxA/B（+VDET=11.0V） R8315NxxxE/F（+VDET=11.0V） -40-25 0 25 50 75 100 125 5.20 5.22 5.24 5.26 5.28 5.30 5.32 5.34 5.36 5.38 5.40 Ta (°C) Detector Threshold +V DET (V) -40-25 0 25 50 75 100 125 5.20 5.22 5.24 5.26 5.28 5.30 5.32 5.34 5.36 5.38 5.40 Ta (°C) Detector Threshold +VDET (V) VDD=5.0V -40-25 0 25 50 75 100 125 7.20 7.22 7.24 7.26 7.28 7.30 7.32 7.34 7.36 7.38 7.40 Ta (°C) Detector Threshold +V DET (V) -40-25 0 25 50 75 100 125 7.20 7.22 7.24 7.26 7.28 7.30 7.32 7.34 7.36 7.38 7.40 Ta (°C) Detector Threshold +VDET (V) VDD=5.0V -40 -25 0 25 50 75 100 125 10.90 10.92 10.94 10.96 10.98 11.00 11.02 11.04 11.06 11.08 11.10 Ta (°C) Detector Threshold +V DET (V) -40-25 0 25 50 75 100 125 10.90 10.92 10.94 10.96 10.98 11.00 11.02 11.04 11.06 11.08 11.10 Ta (°C) Detector Threshold +VDET (V) VDD=5.0V
NO.EC-294-240509 4) Detector Threshold vs. Input Voltage R8315NxxxE/F（-VDET=5.0V） R8315NxxxE/F（-VDET=10.0V） 5) Release Voltage vs. Input Voltage R8315NxxxE/F（+VDET=5.3V） R8315NxxxE/F（+VDET=11.0V） 6) Output Voltage vs. Input Voltage (Ta25C, DOUT pin is pulled-up to 5V and 100） R8315NxxxA（-VDET=5.0V, +VDET=5.3V） R8315NxxxB（-VDET=5.0V, +VDET=5.3V） 4.95 4.96 4.97 4.98 4.99 5.00 5.01 5.02 5.03 5.04 5.05 Input Voltage V DD (V) Detector Threshold -VDET (V) Ta=125℃ Ta=25℃ Ta=-40℃ 9.95 9.96 9.97 9.98 9.99 10.00 10.01 10.02 10.03 10.04 10.05 Input Voltage VDD (V) Detector Threshold -VDET (V) Ta=125℃ Ta=25℃ Ta=-40℃ 5.25 5.26 5.27 5.28 5.29 5.3 5.31 5.32 5.33 5.34 5.35 Input Voltage VDD (V) Detector Threshold -VDET (V) Ta=125℃ Ta=25℃ Ta=-40℃ 10.95 10.96 10.97 10.98 10.99 11.00 11.01 11.02 11.03 11.04 11.05 Input Voltage VDD (V) Detector Threshold -VDET (V) Ta=125℃ Ta=25℃ Ta=-40℃ 0 6 12 18 24 30 36 Input Voltage V DD (V) Output Voltage VDOUT (V) 0 6 12 18 24 30 36 Input Voltage VDD (V) Output Voltage VDOUT (V)
NO.EC-294-240509 R8315NxxxA（-VDET=10.0V, +VDET=11.0V） R8315NxxxB （-VDET=10.0V, +VDET=11.0V） 7) Output Voltage vs. SENSE pin Input Voltage（Ta25C, DOUT pin is pulled-up to 5V and 100） R8315NxxxE（-VDET=5.0V,VDET5.3V） R8315NxxxF（-VDET=5.0V,VDET5.3V） R8315NxxxE（-VDET=10.0V,VDET11.0V） R8315NxxxF（-VDET=10.0V,VDET11.0V） 0 6 12 18 24 30 36 SENSE Voltage V SENSE (V) Output Voltage VDOUT (V) 0 6 12 18 24 30 36 SENSE Voltage VSENSE (V) Output Voltage VDOUT (V) 0 6 12 18 24 30 36 SENSE Voltage VSENSE (V) Output Voltage VDOUT (V) 0 6 12 18 24 30 36 SENSE Voltage VSENSE (V) Output Voltage VDOUT (V) 0 6 12 18 24 30 36 SENSE Voltage VSENSE (V) Output Voltage VDOUT (V) 0 6 12 18 24 30 36 SENSE Voltage VSENSE (V) Output Voltage VDOUT (V)
NO.EC-294-240509 8) Nch Driver Output Current vs. Input Voltage R8315NxxxA（+VDET=5.3V, VDOUT=0.05V） R8315NxxxB（+VDET=5.3V, VDOUT=0.05V） R8315NxxxE（VSENSE=-VDET1.0V, VDOUT=0.05V） R8315NxxxF（VSENSE=+VDET1.0V, VDOUT=0.05V） 9) Nch Driver Output Current vs. VDS 0.0 0.4 0.8 1.2 1.6 2.0 0 6 12 18 24 30 36 Input Voltage V DD (V) Nch Driver Output Current I OUT (mA) Ta=125℃ Ta=25℃ Ta=-40℃ 0.0 0.4 0.8 1.2 1.6 2.0 0 6 12 18 24 30 36 Input Voltage VDD (V) Nch Driver Output Current I OUT (mA) Ta=125℃ Ta=25℃ Ta=-40℃ 0.0 0.4 0.8 1.2 1.6 2.0 0 1 2 3 4 5 6 Input Voltage VDD (V) Nch Driver Output Current I OUT (mA) Ta=125℃ Ta=25℃ Ta=-40℃ 0 0.5 1 1.5 VDS (V) Nch Driver Output Current I OUT (mA) VDD=6.0V VDD=4.5V VDD=3.6V VDD=3.0V VDD=2.5V
NO.EC-294-240509 10) Output Reset Time vs. Temperature (CR1.0mF) R8315NxxxA/B R8315NxxxE/F 11) Output Delay Time vs. Temperature (CD1.0µF) R8315NxxxA/B R8315NxxxE/F 12) Detector Threshold vs. Input Voltage 13) Release Voltage vs. Input Voltage R8315NxxxE/F R8315NxxxE/F -40 -25 0 25 50 75 100 125 Ta (°C) Detect Delay Time TRESET (ms) -40-25 0 25 50 75 100 125 Ta (°C) Detect Delay Time TRESET (ms) VDD=5.0V -40 -25 0 25 50 75 100 125 Ta (°C) Release Delay Time T DELAY (ms) -40 -25 0 25 50 75 100 125 Ta (°C) Release Delay Time T DELAY (ms) VDD=5.0V Input Voltage VDD (V) Detect Delay Time T RESET (ms) Ta=125℃ Ta=25℃ Ta=-40℃ Input Voltage VDD (V) Release Delay Time T DELAY (ms) Ta=125℃ Ta=25℃ Ta=-40℃
NO.EC-294-240509 14) Detector or Release Delay Time vs. CD pin CR pin External Capacity (Ta=25C) R8315NxxxA/B R8315NxxxE/F 0.1 100 1000 0.001 0.01 0.1 1 10 100 External Capacitance CCD / CCR (nF) Release Delay Time t DELAY (ms) Detect Delay Time t RESET (ms) tRESE T tDELAY 0.1 100 1000 0.001 0.01 0.1 1 10 100 External Capacitance CCD / CCR (nF) Release Delay Time t DELAY (ms) Detect Delay Time t RESET (ms) tRESE T tDELAY
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