R5640G NISSHINBO | Alldatasheet

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2 to 5 Serial Cell Li-ion Battery Protection IC for Secondary Protection NO.EA-425-250728 The R5640G is an overcharge protection IC for 2 - to 5- series cell Li-ion / Li-polymer rechargeable battery pack, with built-in high-accuracy voltage detection circuits and delay circuits. Controlling the supply voltage to the CTLC pin can control the COUT pin output. The shutdown detection can reduce the supply current to the minimum.

  • Reducing the supply current to 0.2 µA or less after shutdown detection can achieve the longer battery life.
  • Cascading the R5640G of 2 or more is adaptable to the battery pack of 6 or more cells and results in a reduction of external parts.
  • Be adaptable to 30 V input voltage by using high-voltage process.
  • Overcharge Detection Voltage(VDET1n(1)): 2.90 V to 4.70 V (5 mV step)
  • Overcharge Detection Voltage Accuracy: ± 0.016 V (Ta = 25°C)
  • Overcharge Release Voltage(VREL1n(1)): VDET1n -0V(2) to VDET1n -0.4V (VDET1≥3.0V, 50 mV step) / VDET1n -0V(2) to VDET1n -0.35V(VDET1<3.0V, 50 mV step)
  • Overcharge Detection Delay Time: 2 / 4 / 6 / 10 / 16 sec
  • Release Condition: Voltage Release Type
  • Low Supply Current: Typ.2.5 µA
  • Shutdown Current: Max. 0.2 µA
  • 2 to 5 Cells Selectable Battery Protection by External Wirings
  • Selectable Timer Reset Delay Function
  • Available Cascade Connection
  • CTLC Pin Detection Delay Time: 2 msec
  • Output Type: Pch. Open-drain of Internal Regulator User-selectable Delay Time and Timer Reset Delay Function: Code ($) Overcharge Detection Delay Time A 2 sec B 4 sec C 6 sec D 10 sec E 16 sec Code (∗) Timer Reset Delay Function A Disable B Enable MSOP-8 3.0 mm x 4.9 mm x 0.85 mm Typical Application Circuits for 5 Cells Protection
  • Li-Ion or Li-Polymer Battery Protection (1) VDET1n, VREL1n : n =1, 2, 3, 4, 5 (2) Min. 4.05 V when shutdown detection voltage (VSHTn) is 3.7 V. OVERVIEW KEY BENEFITS PACKAGE TYPICAL APPLICATION CIRCUIT

APPLICATIONS

Normal Output: ”HiZ” “H” Active SC PROTECTOR RCOUT OPTIONAL FUNCTIONS

NO.EA-425-250728 SELECTION GUIDE Overcharge detection / release voltages and delay time are user-selectable options. Selection Guide Product Name Package Quantity per Reel Pb Free Halogen Free R5640Gxxx$∗-E2-FE MSOP-8 3,000 Yes Yes xxx: Specify the combination of the overcharge detection voltage (VDET1n), the overcharge release voltage (V REL1n), and the shutdown detection voltage (VSHTn). VDET1n(1) : 2.9 V to 4.7 V in 5 mV step VREL1n (1): VDET1n-0V(2) to VDET1n-0.4V (VDET1≥3.0V) / VDET1n-0V(2) to VDET1n-0.35V(VDET1<3.0V) in 50 mV step VSHTn(1) : 2.1V / 2.5V / 3.7 V $: Specify the delay time code defined a combination of the overcharge detection delay time (tVDET1), the overcharge release delay time (tVREL1), and the CTLC detection delay time (tCDET). Code tVDET1 (s) tVREL1 (ms) tCDET (ms) A 2 16.5 2 B 4 16.5 2 C 6 16.5 2 D 10 16.5 2 E 16 16.5 2 ∗: Specif y the timer reset delay function. Code Timer Reset Delay Function A Disable B Enable (1) VDET1n, VREL1n, VSHTn: n =1, 2, 3, 4, 5 (2) Min. 4.05 V when shutdown detection voltage (VSHTn) is 3. 7 V.

NO.EA-425-250728 Product Code List The product code is determined by the combination of the set output voltage (overcharge detector threshold: VDET1n, overcharge release voltage: VREL1n, shutdown detector threshold: VSHTn) and the delay time (overcharge detection delay time: tVDET1, overcharge release delay time: tVREL1, CTLC detection delay time: tCDET) and the timer reset delay time option (tVTR). Produ ct Code Table Product Name Set Output Voltage [V] Delay Time Timer Reset Delay Time (Yes/No(1)) VDET1n VREL1n VSHTn tVDET1 [s] tVREL1 [ms] tCDET [ms] R5640G251DA 4.220 4.050 3.700 10 16.5 2 No R5640G252AB 4.220 4.120 3.700 2 16.5 2 Yes R5640G301BA 4.300 4.000 2.500 4 16.5 2 No R5640G302BA 4.350 4.050 2.500 4 16.5 2 No R5640G305BB 4.300 3.900 2.500 4 16.5 2 Yes R5640G101BB 3.750 3.450 2.500 4 16.5 2 Yes R5640G254AB 4.200 4.100 3.700 2 16.5 2 Yes R5640G471AA 2.900 2.700 2.100 2 16.5 2 No R5640G472AA 3.000 2.800 2.100 2 16.5 2 No R5640G256AB 4.275 4.100 3.700 2 16.5 2 Yes R5640G302DA 4.350 4.050 2.500 10 16.5 2 No R5640G102AA 3.900 3.700 2.500 2 16.5 2 No R5640G352BA 4.175 4.050 3.700 4 16.5 2 No Please contact our sales representatives if required a product code other than the above combinations. (1) “No” means the timer reset delay time option is absent.

NO.EA-425-250728 BLOCK DIAGRAM R5640G Block Diagram VC2 VC3 VC4 VC5 VD1-1 VD1-2 VD1-3 VD1-4 Regulator DS Circuit VDD Logic Circuit Oscillator Counter VSS VD1-5 COUT Regulator Regulator Logic Circuit CTLC Shutdown Shutdown Shutdown Shutdown Shutdown Logic Circuit

NO.EA-425-250728 PIN DESCRIPTION Top View MSOP-8 Pi n Configuration R5640G Pin Description Pin No. Symbol Description

1 VDD Power Supply Pin, Positive Terminal for CELL1

2 VC2 Positive Terminal for CELL2

3 VC3 Positive Terminal for CELL3

4 VC4 Positive Terminal for CELL4

5 VC5 Positive Terminal for CELL5

6 VSS Ground Pin

7 CTLC COUT Control Pin / Output Delay Time Shortening Pin

8 COUT Overcharge Detection Output Pin, Pch. Open-drain Output 8 7 6 5 1 2 3 4

NO.EA-425-250728 ABSOLUTE MAXIMUM RATINGS (Ta = 25°C, VSS = 0V) Symbol Item Ratings Unit VDD Supply Voltage (Positive Terminal Voltage for CELL1) -0.3 to 30 VC2-0.3 to VC2+6.5 V V VC2 VC3 VC4 VC5 VCTLC Positive Terminal Voltage for CELL2 Positive Terminal Voltage for CELL3 Positive Terminal Voltage for CELL4 Positive Terminal Voltage for CELL5 CTLC Pin Voltage VC3-0.3 to VC3+6.5 VC4-0.3 to VC4+6.5 VC5-0.3 to VC5+6.5 -0.3 to 6.5 -0.3 to 30 V V V V V VCOUT COUT Pin Output Voltage VOH1-30 to VOH1+0.3 V PD Power Dissipation (MSOP-8, JEDEC STD.51-7) 960 mW Tj Junction Temperature Range -40 to 125 °C Tstg Storage Temperature Range -55 to 125 °C ABSOLUTE MAXIMUM RATINGS Electronic and mechanical stress momentarily exceeded absolute maximum ratings may cause the permanent damages and may degrade the lifetime and safety for both device and system using the device in the field. The functional operation at or over these absolute maximum ratings is not assured. RECOMMENDED OPERATING CONDITION Symbol Item Rating Unit VDD Operating Input Voltage 4.0 to 25 / VC2+5 V V Ta Operating Temperature Range −40 to 85 °C RECOMMENDED OPERATING CONDITIONS All of electronic equipment should be designed that the mounted semiconductor devices operate within the recommended operating conditions. The semiconductor devices cannot operate normally over the recommended operating conditions, even if when they are used over such conditions by momentary electronic noise or surge. And the semiconductor devices may receive serious damage when they continue to operate over the recommended operating conditions.

NO.EA-425-250728

ELECTRICAL CHARACTERISTICS

VCELLn = CELLn (Ex. VCELL1 is a voltage difference between VDD and VC2), n = 1, 2, 3, 4, 5, unless otherwise noted. The specifications surrounded by are guaranteed by Design Engineering at 0°C ≤ Ta ≤ 60°C. (Ta = 25°C) Symbol Parameter Conditions Ratings Unit Circuit (1)Min. Typ. Max. VDET1n CELLn overcharge detection voltage at rising edge of voltage VDET1n -0.016V VDET1n VDET1n +0.016V V A VDET1n -0.025V VDET1n +0.025V VREL1n CELLn overcharge release voltage at falling edge of voltage VREL1n -0.050V VREL1n VREL1n +0.050V V A tVDET1 Overcharge detection delay time VCELLn=VDET1n-0.1V (n=2,3,4,5) VCELL1 = VDET1n-0.1V → 4.7 V (VDET1n ≤ 4.6 V) or → 4.8V (VDET1n > 4.6V) tVDET1 x 0.8 tVDET1 tVDET1 x 1.2 s B tVD1DS Overcharge detection delay time at delay shortening mode VCELLn=VDET1n-0.1V (n=2,3,4,5) VCELL1 = VDET1n-0.1V → 4.7 V (VDET1n ≤ 4.6V) or → 4.8V (VDET1n > 4.6V) VCTLC = 2.0V 0.5 4 8 ms B tVREL1 Overcharge release delay time VCELLn=VREL1n-0.1V (n=2,3,4,5) VCELL1 = 4.7 V (VDET1n ≤ 4.6 V) or 4.8V (VDET1n > 4.6V) → VREL1n-0.1V tVREL1 x 0.8 tVREL1 tVREL1 x 1.2 ms B tVTR Overcharge detection timer reset delay time (2) VCELLn= VDET1n+0.05 V → VREL1n-0.10 V → VDET1n+0.05 V → VREL1n-0.10 V 2 6 10 ms B VSHTn Shutdown detection voltage at falling edge of voltage VSHTn -0.3V VSHTn VSHTn +0.3V V C VIH CTLC pin input voltage, high 2.8 V D VIM CTLC pin input voltage, middle 1.9 2.4 V D tCDET CTLC pin detection delay time VCELLn=VDET1n-0.1V VCTLC=0.0V→3.0V tCDET x 0.8 tCDET tCDET x 1.2 ms D VCELLn=VSHTn-0.4V VCTLC=0.0V→3.0V(at shutdown) tCDET+1 ILCOUT COUT pin off-leakage current VCELLn=VDET1n-0.1V VCOUT=-10.0V -0.1 µA E (1) Refer to TEST CIRCUITS for detail information. (2) For the timer reset delay function enabled product only

NO.EA-425-250728 VCELLn = CELLn (Ex. VCELL1 is a voltage difference between VDD and VC2), n = 1, 2, 3, 4, 5, unless otherwise noted. The specifications surrounded by are guaranteed by Design Engineering at 0°C ≤ Ta ≤ 60°C. (Ta = 25°C) Symbol Parameter Conditions Ratings Unit Circuit (1) VOH1 COUT pin Pch. ON voltage1 IOH= -1μA, VCELLn = 4.7 V (VDET1n ≤ 4.6 V) or 4.8V (VDET1n > 4.6V) 4.0 4.7 5.4 V F VOH2 COUT pin Pch. ON voltage2 IOH= -50 μA, VCELLn = 4.7 V (VDET1n ≤ 4.6 V) or 4.8V (VDET1n > 4.6V) VOH1 -0.5V VOH1 -0.11V V G ISHT Shutdown current VCELLn = VSHTn-0.4 V 0.2 µA H ISS Supply Current VCELLn = VDET1n-0.1V 2.5 5.0 µA H IVC2 VC2 pin current VCELLn = VDET1n-0.1V -0.3 0.3 µA H IVC3 VC3 pin current VCELLn = VDET1n-0.1V -0.3 0.3 µA H IVC4 VC4 pin current VCELLn = VDET1n-0.1V -0.3 0.3 µA H IVC5 VC5 pin current VCELLn = VDET1n-0.1V -0.3 0.3 µA H (1) Refer to TEST CIRCUITS for detail information.

NO.EA-425-250728 Test Circuits A VDD VC2 VC3 VC4 VSS CTLC COUT V V V V OSCILLOSCOPE V VC5 B VDD VC2 VC3 VC4 VSS CTLC COUT V OSCILLOSCOPE VC5 D VDD VC2 VC3 VC4 VSS CTLC COUT OSCILLOSCOPE VC5 V A F VDD VC2 VC3 VC4 VSS CTLC COUT VC5 V E VDD VC2 VC3 VC4 VSS CTLC COUT VC5 A G VDD VC2 VC3 VC4 VSS CTLC COUT VC5 V H VDD VC2 VC3 VC4 VSS CTLC COUT VC5 A A A A A C VDD VC2 VC3 VC4 VSS CTLC COUT V V V V V VC5 A

NO.EA-425-250728 THEORY OF OPERATION Overcharge Detector, VDET1n (n = 1, 2, 3, 4, 5) During charging, the device supervises the voltage between VDD pin and VC2 pin (V CELL1), the voltage between VC2 pin and VC3 pin (VCELL2), the voltage between VC3 pin and VC4 pin (VCELL3), the voltage between VC4 pin and VC5 pin (VCELL4), and the voltage between VC5 pin and VSS pin (VCELL5). If at least one of the cell voltages exceeds more than the overcharge detection voltage (V DET1n), the overcharge is detected, and an external charge control Nch. MOSFET turns on with COUT pin being at "H" level and by cutting a fuse on the charger path, and charge stops. If all the cell voltages become lower than the overcharge release voltage (VREL1n), the overcharge is released and COUT pin outputs “Hiz”. The device has internal fixed output delay times for overcharge detection, overcharge detection timer reset, and overcharge release. If the output delay time passes on when any one of the cell voltages is more than VDET1n, the overcharge is detected. In the case of Timer Reset Delay available version, if all the cell voltages become lower than VDET1n within the overcharge detection delay time by noise or other reasons, the time period is less than overcharge detection timer reset delay time, the overcharge delay time is accumulated and maintained, and the accumulated delay time reaches the overcharge detection delay time, the overcharge is detected. After detecting overcharge, even if all the cell voltages reduce less than the release voltage, if at least one of the cell voltages exceeds more than the release voltage within the overcharge release delay time, then overcharge is not released. The COUT pin, which is a Pch. open-drain output type, outputs the output voltage of the internal regulator when “High”.

NO.EA-425-250728 Overcharge Operation Timing Chart VDET11 VREL11 VCELL1 t tVREL1 tVDET1 tVDET1 VSS COUT tVREL1 t VDET12 VREL12 VCELL2 t VDET13 VREL13 VCELL3 t VDET14 VREL14 VCELL4 t Charge/Discharge Current Charge Current Discharge Current t Connect Charger Connect Load VDET15 VREL15 VCELL5 t

NO.EA-425-250728 Shutdown Function The voltage between VDD pin and VC2 pin (V CELL1), the voltage between VC2 pin and VC3 pin (V CELL2), the voltage between VC3 pin and VC4 pin (V CELL3), the voltage between VC4 pin and VC5 pin (V CELL4), and the voltage between VC5 pin and VSS pin (VCELL5) are supervised. If all of VCELLn (n=1 to 5) become less than the shutdown detection voltage, the device halts the operation, and the supply current (shutdown current) of the device can be reduced to the minimum. If one of VCELLn (n=1 to 5) becomes more than the shutdown detection voltage, the device will release from the shutdown state. CTLC Function When exceeding the CTLC detection delay time or more after supplying the voltage of 2.8 V or more to CTLC pin, the COUT pin outputs “High” level. This function is enabled even in the shutdown state. By cascading between the COUT pin of the high-voltage side IC and the CTLC pin of the low-voltage side IC, these devices can protect the battery pack for six or more series cell (1). At cascading, the COUT pin output of the high-voltage side is transmitted to the CTLC pin of the low-voltage side and the COUT pin outputs “High”. Delay Shortening (DS) Applying the voltage of 1.9 V to 2.4 V to the CTLC pin can shorten the overcharge detection delay time to a few milliseconds (ms). (1) Refer to 10-CELL PROTECTION CIRCUIT AT CASCADING in APPLICATION INFORMATION.

NO.EA-425-250728 Setting for 2 to 5 Cells Protection By short-circuiting between cells, the device can meet as a protection IC for 2 to 5 cells connected in series. The following table indicates pins to short-circuit to VSS depending on protected cells. Protected Cells Pins Short-circuiting to VSS 2-cell protection VC3, VC4, and VC5 pins 3-cell protection VC4 and VC5 pins 4-cell protection VC5 pin 5-cell protection Not short-circuiting

NO.EA-425-250728

APPLICATION INFORMATION

Typical Application Circuits 5-cell Protection Circuit 4-cell Protection Circuit R5640G VDD VC2 VC3 VC4 VC5 CELL1 CELL2 CELL3 CELL4 VSS CELL5 CTLC COUT Normal Output: ”HiZ” “H” Active SC PROTECTOR RCOUT R5640G VDD VC2 VC3 VC4 VC5 CELL1 CELL2 CELL3 CELL4 VSS CTLC COUT Normal Output: ”HiZ” “H” Active SC PROTECTOR RCOUT

NO.EA-425-250728 3-cell Protection Circuit 2-cell Protection Circuit R5640G VDD VC2 VC3 VC4 VC5 CELL1 CELL2 CELL3 VSS CTLC COUT Normal Output: “HiZ” SC PROTECTOR “H” Active RCOUT R5640G VDD VC2 VC3 VC4 VC5 CELL1 CELL2 VSS CTLC COUT SC PROTECTOR Normal Output: “HiZ” “H” Active RCOUT

NO.EA-425-250728 10-cell Protection Circuit at Cascading R5640G VDD VC2 VC3 VC4 VC5 CELL1 CELL2 CELL3 CELL4 VSS CELL5 CTLC COUT Normal Output: ”HiZ” SC PROTECTOR R5640G VDD VC2 VC3 VC4 VC5 CELL6 CELL7 CELL8 CELL9 C10 VSS CELL10 CTLC COUT R10 “H” Active RCOUT

NO.EA-425-250728 External Components Symbol Typ. Unit Permissible Range R1 / R2 / R3 / R4 / R5 330 Ω 330 to 1000 C1 / C2 / C3 / C4 / C5 0.1 µF 0.01 to 1 RCOUT 1 MΩ 0.5 to 2 Technical Notes on Component Selection

  • The voltage fluctuation is stabilized with R1 to R5 and C1 to C5. Since increasing resistors of R1 to R5 make the detection voltage be higher by the conduction current at detection, the appropriate value of R1 to R5 must be less than 1kΩ. And the appropriate value of C1 to C5 must be 0.01µF or more in order to make a stable operation of the IC.
  • If RCOUT is small, the supply current of the protect circuit will increase when the COUT pin is “high”.
  • The typi cal application circuits are just examples and do not guarantee the operation. Conduct the sufficient evaluation in the actual application circuit in order to select external components.
  • The protec tion IC and external components must not be applied overvoltage and overcurrent beyond the absolute maximum ratings. Especially, after detecting overcharge, a large heater current might flow through the MOSFET during the fuse blowout time. To prevent the MOSFET from being burnt, select a MOSFET with considering a current capacity of it.
  • To connect the SC protector, connect the SC protector to the cell must be the last. Contac t Information for Inquiries regarding SC PROTECTOR Dexeria ls Corporation (Sony Chemical & Information Device Company Ltd.) URL: http://www.dexerials.jp

NO.EA-425-250728 TECHNICAL NOTES A peripher al component or the device mounted on PCB should not exceed a rated voltage, a rated current or a rated power. When designing a peripheral circuit, please be fully aware of the following points.

  • Please evaluate the product at the PCB level before use, as some symptoms may remain that cannot be confirmed by the evaluation at the IC level.
  • When using any coating or underfill to improve moisture resistance or joining strength, evaluate them adequately before using. In certain materials or coating conditions, corrosion by contained constituents, current leakage by moisture absorption, crack and delamination by physical stress can happen. If the curing temperature of the coating material or underfill material exceeds the absolute maximum rating, the electrical characteristics of this product may change.
  • When performing X -ray inspection in mass production process and evaluation build stage such as the product functions and characteristics confirmation, please confirm X-ray irradiation does not exceed 1.5Gy (absorbed dose for air).

Ver. H i : Product Code … Refer to Part Marking List : Lot Number … Alphanumeric Serial Number R5640G (MSOP-8) Part Markings NOTICE There can be variation in the marking when different AOI (Automated Optical Inspection) equipment is used. In the case of recognizing the marking characteristic with AOI, please contact our sales or distributor before attempting to use AOI. R5640Gx xxxx Part Marking List Product Name     Product Name     R5640G301BA R 0 1 A R5640G102AA R 1 3 A R5640G302BA R 0 2 A R5640G352BA R 1 4 A R5640G305BB R 0 3 A R5640G251DA R 0 4 A R5640G252AB R 0 5 A R5640G101BB R 0 7 A R5640G254AB R 0 8 A R5640G471AA R 0 9 A R5640G472AA R 1 0 A R5640G256AB R 1 1 A R5640G302DA R 1 2 A ①②③ ④⑤⑥ 1 4 8 5

PD-MSOP-8(85125)-JE-B i The power dissipation of the package is dependent on PCB material, layout, and environmental conditions. The following measurement conditions are based on JEDEC STD. 51-7. Measurement Conditions Item Measurement Conditions Environment Mounting on Board (Wind Velocity = 0 m/s) Board Material Glass Cloth Epoxy Plastic (Four-Layer Board) Board Dimensions 76.2 mm × 114.3 mm × 0.8 mm Copper Ratio Outer Layer (First Layer): Less than 95% of 50 mm Square Inner Layers (Second and Third Layers): Approx. 100% of 50 mm Square Outer Layer (Fourth Layer): Approx. 100% of 50 mm Square Through-holes  0.3 mm × 36 pcs Measurement Result (Ta = 25°C, Tjmax = 125°C) Item Measurement Result Power Dissipation 960 mW Thermal Resistance (ja) ja = 104°C/W Thermal Characterization Parameter (ψjt) ψjt = 31°C/W ja: Junction-to-Ambient Thermal Resistance ψjt: Junction-to-Top Thermal Characterization Parameter Power Dissipation vs. Ambient Temperature Measurement Board Pattern 200 400 600 800 1000 1200 0 25 50 75 100 125 Power Dissipation PD (mW) Ambient Temperature (°C) 960

Ver. A i

  1. T he products and the product specifications described in this document are subject to change or discontinuation of production without notice for reasons such as improvement. Therefore, before deciding to use the products, please refer to our sales representatives for the latest information thereon. 2. The materials in this document may not be copied or otherwise reproduced in whole or in part without the prior written consent of us. 3. This product and any technical information relating thereto are subject to complementary export controls (so- called KNOW controls) under the Foreign Exchange and Foreign Trade Law, and related politics ministerial ordinance of the law. (Note that the complementary export controls are inapplicable to any application-specific products, except rockets and pilotless aircraft, that are insusceptible to design or program changes.) Accordingly, when exporting or carrying abroad this product, follow the Foreign Exchange and Foreign Trade Control Law and its related regulations with respect to the complementary export controls. 4. The technical information described in this document shows typical characteristics and example application circuits for the products. The release of such information is not to be construed as a warranty of or a grant of license under our or any third party's intellectual property rights or any other rights. 5. The products listed in this document are intended and designed for use as general electronic components in standard applications (office equipment, telecommunication equipment, measuring instruments, consumer electronic products, amusement equipment etc.). Those customers intending to use a product in an application requiring extreme quality and reliability, for example, in a highly specific application where the failure or misoperation of the product could result in human injury or death should first contact us.
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