R5434D NISSHINBO | Alldatasheet

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2 to 5 Serial Cell Li-Ion / Li-Polymer Battery Protection IC for Secondary Protection NO.EA-267-240116 OUTLINES The R5434D is an overcharge protection IC for 2 to 5 seri al Li-ion/Li-polymer secondary battery. When an overcharge is detected, after the IC internally fixed delay time, the output of COUT becomes "H". After detecting the overcharge, when the cell voltage becomes lower than the overcharge release voltage, the overcharge state is released. By forcing VDD+3.0V or more to the CTLC pin, the test time of protection circuit board can be shortened, and overcharge delay time becomes about 1/30. The output type is CMOS.

FEATURES

  • Manufactured with High Voltage Tolerant Process
  • Low Supply Current
  • High-accuracy Detector Threshold
  • Variety of Detector Threshold Overcharge Release Voltage (VREL1n(1)) ··············· VDET1n - 0.1V to VDET1n - 0.4V (in 50mV steps)
  • 2 to 5 Cells Selectable Protection
  • COUT Output (CMOS Output, Active-high) ········· Typ. 3.7V (“Low” at normal times, “High” at detecting times)
  • Overcharge Delay Time Shortening Function with CTLC pin

APPLICATIONS

  • Li-ion or Li-polymer Battery Protection (1) VDET1n, VREL1n : n =1, 2, 3, 4, 5

NO.EA-267-240116 SELECTION GUIDE The overcharge and the delay time are user-selectable options. Selection Guide Product Name Package Quantity per Reel Pb Free Halogen Free R5434Dxxx$∗-TR -FE SON-8 3,000 pcs Yes Yes xxx: Specify the combination of the overcharge detector threshold (VDET1n) and the overcharge release voltage (VREL1n) (1). VDET1n(2): 3.6 V to 4.6 V in 5 mV step VREL1n(2): VDET1n – 0.1 V to VDET1n – 0.4 V in 50 mV step $: Specify the delay time option. A: Overcharge Detection Delay Time (tVDET1) : 1.5s ∗: Specify the overcharge release option. A: Voltage Released Type Product Code List The product code is determined by the combination of the set output voltage (overcharge detection voltage: VDET1n, overcharge release voltage: V REL1n), the delay time (overcharge detection delay time: tVDET1), and the overcharge release options. Product Code Set Voltages [V] Overcharge Detection Delay Time [s] Overcharge Released Type VDET1n VREL1n tVDET1 R5434D401AA 4.300 4.000 1.5 Voltage Release R5434D402AA 4.220 4.120 1.5 Voltage Release R5434D403AA 4.250 4.000 1.5 Voltage Release R5434D404AA 4.350 4.050 1.5 Voltage Release R5434D405AA 3.825 3.575 1.5 Voltage Release R5434D406AA 4.220 3.820 1.5 Voltage Release R5434D407AA 4.250 4.200 1.5 Voltage Release R5434D408AA 4.400 4.300 1.5 Voltage Release (1) Refer to Product Code Table for details. (2) VDET1n, VREL1n: n = 1, 2, 3, 4, 5

NO.EA-267-240116 BLOCK DIAGRAM R5434DxxxAA Block Diagram VC2 VDD VD1-1 VD1-2 VD1-3 VD1-4 VC3 VC4 VC5 VD1-5 VSS Regulator Regulator Counter DS Circuit Logic Circuit COUT Regulator Logic Circuit Oscillator CTLC

NO.EA-267-240116 PIN DESCRIPTION SON-8 Pin No. Symbol Description

1 VC5 Positive terminal pin for Cell-5

2 VC4 Positive terminal pin for Cell-4

3 VC3 Positive terminal Pin for Cell-3

4 VC2 Positive terminal pin for Cell-2

5 VDD VDD pin, positive terminal pin for Cell-1

6 CTLC COUT control pin / Output delay time shortening pin

7 COUT Output pin of overcharge detection, CMOS output

8 VSS VSS pin. Ground pin for the IC ∗ The tab suspended leads are connected to the GND level. Do not short or wire those parts to other voltage level parts. 8 7 6 5 1 2 3 4 5 6 7 8 4 3 ∗ ∗ ∗ Bottom View Top View

NO.EA-267-240116 ABSOLUTE MAXIMUM RATINGS (Ta = 25°C, VSS = 0V) Symbol Item Ratings Unit VDD Supply voltage (Positive terminal pin voltage of Cell-1) -0.3 to 30 VC2-0.3 to VC2+6.5 V VC2 VC3 VC4 VC5 VCTLC Positive input pin voltage for Cell-2 Positive input pin voltage for Cell-3 Positive input pin voltage for Cell-4 Positive input pin voltage for Cell-5 CTLC pin voltage VC3 -0.3 to VC3+6.5 VC4 –0.3 to VC4+6.5 VC5–0.3 to VC5+6.5 -0.3 to 6.5 -0.3 to 30 V VCOUT COUT pin output voltage -0.3 to VOH1+0.3 V PD Power Dissipation (1) 480 mW Tj Junction Temperature Range -40 to 125 °C Tstg Storage Temperature Range -55 to 125 °C ABSOLUTE MAXIMUM RATINGS Electronic and mechanical stress momentarily exceeded absolute maximum ratings may cause permanent damage and may degrade the life time and safety for both device and system using the device in the field. The functional operation at or over these absolute maximum ratings is not assured. RECOMMENDED OPERATING CONDITION Symbol Item Rating Unit VDD Operating Input Voltage 4.0 to 25 V Ta Operating Temperature Range −40 to 85 °C RECOMMENDED OPERATING CONDITIONS All of electronic equipment should be designed that the mounted semiconductor devices operate within the recommended operating conditions. The semiconductor devices cannot operate normally over the recommended operating conditions, even if they are used over such conditions by momentary electronic noise or surge. And the semiconductor devices may receive serious damage when they continue to operate over the recommended operating conditions. (1) Refer to POWER DISSIPATION in SUPPLEMENTSRY ITEMS for detail information.

NO.EA-267-240116

ELECTRICAL CHARACTERISTICS

VCELLn = CELLn (Ex. VCELL1 is a voltage difference between VDD and VC2), n = 1, 2, 3, 4, 5, unless otherwise noted. The specifications surrounded by are guaranteed by Design Engineering at 0°C ≤ Ta ≤ 60°C. R5434DxxxAA Electrical Characteristics (Ta = 25°C) Symbol Item Conditions Min. Typ. Max. Unit Circuit (1) VDET1n CELLn Overcharge Detection Threshold Detect rising edge of supply voltage (25°C) VDET1n -0.025V VDET1n VDET1n +0.025V V A Detect rising edge of supply voltage (0 to 60°C) VDET1n -0.030V VDET1n VDET1n +0.030V VREL1n CELLn Overcharge Release Voltage Detect falling edge of supply voltage VREL1n -0.050V VREL1n VREL1n +0.050V V A tVDET1 Overcharge Detection Delay Time VCELLn=3.5V (n=2,3,4,5), tVREL1 Overcharge Release Delay Time VCELLn=3.5V (n=2,3,4,5), VCELL1=4.5V to 3.5V, 11 16 21 ms B tVDTR1 Overcharge Detection Timer Reset Delay Time V CELLn=VDET1n+0.050V to VREL1n-0.100V to VDET1n+0.050V to VREL1n-0.100V 8 16 24 ms B VIH-1 CTLC Pin "High1" Input Voltage VDD -0.7V VDD +0.3V V C VIH-2 CILC Pin "High2" Input Voltage VDD +3.0V V C VIM CTLC Pin "Middle" Input Voltage VDD ≥ 4 V 2.0 VDD -2.0V V C VIL CTLC Pin "Low" Input Voltage VDD ≥ 4 V VSS -0.3V 0.5 V D VOL COUT Nch. ON Voltage IOL=50μA, VCELLn= 3.5V, CTLC= VDD 0.1 0.5 V E VOH1 COUT Pch. ON Voltage1 (at no load) IOH = 0μA, VCELLn = 3.5V, CTLC= VSS 3.0 3.7 4.5 V F VOH COUT Pch. ON Voltage IOH= -50μA, VCELLn = 3.5V, CTLC= VSS VOH1 -0.5V VOH1 -0.1V V G ISS Supply Current VCELLn=3.9V 3.0 7.0 µA H (1) Refer to TEST CIRCUITS for detail information.

NO.EA-267-240116 TEST CIRCUITS A VDD VC2 VC3 VC4 VSS CTLC COUT V V V V OSCILLOSCOPE V VC5 B VDD VC2 VC3 VC4 VSS CTLC COUT V OSCILLOSCOPE VC5 C VDD VC2 VC3 VC4 VSS CTLC COUT OSCILLOSCOPE VC5 V D VDD VC2 VC3 VC4 VSS CTLC COUT OSCILLOSCOPE VC5 V F VDD VC2 VC3 VC4 VSS CTLC COUT VC5 V E VDD VC2 VC3 VC4 VSS CTLC COUT VC5 V G VDD VC2 VC3 VC4 VSS CTLC COUT VC5 V H VDD VC2 VC3 VC4 VSS CTLC COUT VC5 A

NO.EA-267-240116 THEORY OF OPERATION Overcharge Detectors, VDET1n (n=1, 2, 3, 4, 5) While the cells are charged, the voltage between VDD pin and V C2 pin (voltage of the Cell -1), the voltage between VC2 pin and VC3 pin (voltage of the Cell -2), the voltage between V C3 pin and VC4 pin (voltage of the Cell-3), the voltage between V C4 pin and VC5 pin (voltage of the Cell -4), and the voltage between V C5 and VSS pin (voltage of the Cell-5) are supervised. If at least one of the cells’ voltage becomes equal or more than the overcharge detection voltage, the overcharge is detected, and an external charge control Nch. FET turns ON with COUT pin being at "H" level and by cutting off a fuse on the charger path, and the charge operation stops. To reset the overcharge and make the COUT pin level to "L ow" again after detecting overcharge, in such conditions that a time when all the cells’ voltages are down to a level lower than overcharge release voltage. Internal fixed output delay times for overcharge detection, overcharge detector timer reset, release from overcharge exist. Even if one of voltage of the cells keeps its level more than the overcharge detection voltage, and output delay time passes, overcharge voltage is detected. If all the cell voltages become lower than the overcharge detection voltage within the overcharge detection delay time by noise or other reasons, the time period is less than overcharge detector timer reset output delay time, the overcharge delay time is accumulated and maintained, and the accumulated delay time reaches the overcharge delay time , the overcharge is detected. After detecting overcharge, even if all the cell voltages become equal or less than the release voltage from overcharge, if at least one of the cells voltage becomes higher than the release voltage from overcharge within the overcharge release delay time from overcharge, then overcharge is not released. The output type of the COUT pin is a CMOS output between V SS and the built-in regulator, and "High" level of COUT pin is the output voltage of the built-in regulator.

NO.EA-267-240116 Overcharge Operation Timing Chart VDET11 VREL11 VCELL1 t tVREL1 tVDET1 tVDET1 VSS COUT tVREL1 t VDET12 VREL12 VCELL2 t VDET13 VREL13 VCELL3 t VDET14 VREL14 VCELL4 t Charge/Discharge Current Charge Current Discharge Current t Connect Charger Connect Load VDET15 VREL15 VCELL5 t

NO.EA-267-240116 Delay Shortening (DS) Function The COUT pin is forcibly set to "High" output with applying the VSS level voltage to the CTLC pin. By applying VDD+3.0V or more voltage to the CTLC pin, the overcharge detect and release delay times can be shorten into approximately 1/30. (DS mode 1) By applying the voltage in the range from 2.0V to VDD -2.0V to CTLC pin, the overcharge detect delay time can be shorten into approximately 4ms. (DS mode 2) The CTLC pin has internally the input delay time (approximately 1ms). Table. CTLC Pin Input Conditions and IC’s Operating Conditions (VDD ≥ 4.0 V) Input Conditions to CTLC Pin IC Operating Conditions VDD+3.0V or more DS mode 1 VDD-0.8V to VDD+0.3V Normal operation 2.0V to VDD-2.0V DS mode 2 VSS-0.3V to 0.5V COUT output "H" Open Indefinite Setting for 2 to 4 Cell Protection By short-circuiting between cells, the R5434D can meet as a protection IC for 2, 3, or 4 cells placed in series. The following table indicates pins to short-circuit to VSS depending on protected cells. Protected Cells Pins to Short-circuit to VSS 2-cell protection VC3, VC4, and VC5 pins 3-cell protection VC4 and VC5 pins 4-cell protection VC5 pin If providing other connections except above short -circuit for 2 , 3, or 4 cells protection, perform thorough evaluation using the actual devices.

NO.EA-267-240116 TYPICAL APPLICATIONS Typical Application Circuits 5-cell Protection Circuit 4-cell Protection Circuit R5434D VDD VC2 VC3 VC4 VC5 CELL1 CELL2 CELL3 CELL4 VSS CELL5 CTLC COUT Normal Output: ”L” “H” Active SC PROTECTOR R5434D VDD VC2 VC3 VC4 VC5 CELL1 CELL2 CELL3 CELL4 VSS CTLC COUT SC PROTECTOR Normal Output: ”L” “H” Active

NO.EA-267-240116 3-cell Protection Circuit 2-cell Protection Circuit R5434D VDD VC2 VC3 VC4 VC5 CELL1 CELL2 CELL3 VSS CTLC COUT Normal Output: “L” “H” Active SC PROTECTOR R5434D VDD VC2 VC3 VC4 VC5 CELL1 CELL2 VSS CTLC COUT SC PROTECTOR Normal Output: “L” “H” Active

NO.EA-267-240116 External Components Symbol Min. Typ. Max. Unit R1 / R2 / R3 / R4 / R5 330 330 1000 Ω C1 / C2 / C3 / C4 / C5 0.01 0.1 1 µF Technical Notes on Selection Components

  • The voltage fluctuation is stabilized with R1 to R5 and C1 to C5. If a R1 to R5 is too large, by the conduction current at detection, the detector threshold may shift higher. Therefore, the appropriate value range of R1 to R5 is equal or less than 1k Ω. To make a stable operation of the IC, the appropriate value range of C1 to C5 is 0.01µF or more.
  • The typical application circuit diagrams are just examples. This circuit performance largely depends on the PCB layout and external components. In the actual application, fully evaluation is necessary.
  • Overvoltage and the over current beyond the absolute maximum rating should not be forced to the protection IC and external components. During the time until the fuse is open after detecting overcharge, a large current may flow through the FET. Select an FET with large enough current capacity in order to endure the large current.
  • To connect the SC protector, connect the SC protector to the cell must be the last. Contact Information for Inquiries regarding SC PROTECTOR Dexerials Corporation (Sony Chemical & Information Device Company Ltd.) URL: http://www.dexerials.jp

NO.EA-267-240116 TYPICAL CHARACTERISTICS Vs. Temperature 1) CELLn Overcharge Detector Threshold vs. Temperature 2) CELLn Overcharge Release Voltage vs. Temperature 3) Overcharge Detection Delay Time vs. Temperature 4) Overcharge Release Delay Time vs. Temperature 4.25 4.26 4.27 4.28 4.29 4.30 4.31 4.32 4.33 4.34 4.35 -60 -40 -20 0 20 40 60 80 100 VDET1n(V) Ta (℃) R5434D401AA VCELLn=3.2V n=1, 2, 3, 4, 5 3.95 3.96 3.97 3.98 3.99 4.00 4.01 4.02 4.03 4.04 4.05 -60 -40 -20 0 20 40 60 80 100 VREL1n(V) Ta (℃) R5434D401AA VCELLn=3.2V n=1, 2, 3, 4, 5 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 -60 -40 -20 0 20 40 60 80 100 tVDET1(sec) Ta (℃) R5434D401AA VCELLn=3.5V、VCELL1=3.5V→4.5V n=1, 2, 3, 4, 5 8.0 10.0 12.0 14.0 16.0 18.0 20.0 22.0 24.0 -60 -40 -20 0 20 40 60 80 100 tVREL1(msec) Ta (℃) R5434D401AA VCELLn=3.5V、VCELL1=4.5V→3.5V n=1, 2, 3, 4, 5

NO.EA-267-240116 5) Timer Reset Delay Time vs. Temperature 6) COUT Nch. ON Voltage vs. Temperature 7) COUT Pch. ON Voltage vs. Temperature (at No Load) 8) COUT Pch. ON Voltage vs. Temperature 9) Supply Current vs. Temperature 8.0 10.0 12.0 14.0 16.0 18.0 20.0 22.0 24.0 -60 -40 -20 0 20 40 60 80 100 tVTR1(msec) Ta (℃) R5434D401AA VCELLn=3.5V、VCELL1=4.5V→3.5V→4.5V n=1, 2, 3, 4, 5 0.00 0.05 0.10 0.15 0.20 0.25 0.30 -60 -40 -20 0 20 40 60 80 100 VOL(V) Ta (℃) R5434D401AA VCELLn=3.5V、VCELL1=4.5V→3.5V→4.5V n=1, 2, 3, 4, 5 3.00 3.20 3.40 3.60 3.80 4.00 4.20 4.40 4.60 -60 -40 -20 0 20 40 60 80 100 VOH1(V) Ta (℃) R5434D401AA VCELLn=3.5V、ILOAD=0µA n=1, 2, 3, 4, 5 -0.40 -0.35 -0.30 -0.25 -0.20 -0.15 -0.10 -0.05 0.00 -60 -40 -20 0 20 40 60 80 100 VOH-VOH1(V) Ta (℃) R5434D401AA VCELLn=3.5V、ILOAD=-50µA n=1, 2, 3, 4, 5 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 -60 -40 -20 0 20 40 60 80 100 Iss(uA) Ta (℃) R5434D401AA VCELLn=3.9V n=1, 2, 3, 4, 5

NO.EA-267-240116 0 10 20 30 Supply Current[uA] VDD[V] Output Delay Time vs. Supply Voltage (VDD) Dependence 1) Overcharge Detection Delay Time vs. VDD 2) Overcharge Release Delay Time vs. VDD Supply Current vs. VDD (for 5 Cells Protection) Test Circuit 1.00 1.10 1.20 1.30 1.40 1.50 1.60 1.70 1.80 1.90 2.00 tVDET1 (sec) VCELLn (V) R5434D401AA n=1, 2, 3, 4, 5 10.0 11.0 12.0 13.0 14.0 15.0 16.0 17.0 18.0 19.0 20.0 tVREL1 (msec) VCELLn (V) R5434D401AA n=1、2、3、4、5 0.1µF 0.1µF 0.1µF 0.1µF 1kΩ 1kΩ 1kΩ 1kΩ 1kΩ R5434D VDD VC2 VC3 VC4 VC5 CELL1 CELL2 CELL3 CELL4 0.1µF VSS CELL5 CTLC COUT Normal Output: “L” “H” Active SC PROTECTOR A

NO.EA-267-240116 Vs. External Resister dependence Overcharge Detection Voltage / Overcharge Release Voltage vs. R1 Test Circuit 3.990 4.000 4.010 4.020 4.030 4.040 4.050 4.270 4.280 4.290 4.300 4.310 4.320 4.330 M/標準 M/標準 M/標準 M/標準 M/標準 VREL11(V) VDET11(V) R1(Ω) VDET11 VREL11 0.1uF 0.1uF 0.1uF 0.1uF 1kΩ 1kΩ 1kΩ 1kΩ R5434D VDD VC2 VC3 VC4 VC5 CELL1 CELL2 CELL3 CELL4 0.1uF VSS CELL5 CTLC COUT Normal Output: “L” “H” Active SC PROTECTOR

NO.EA-267-240116 TECHNICAL NOTES A peripheral component or the device mounted on PCB should not exceed a rated voltage, a rated current or a rated power. When designing a peripheral circuit, please be fully aware of the following points.

  • Please evaluate the product at the PCB level before use, as some symptoms may remain that cannot be confirmed by the evaluation at the IC level.
  • When using any coating or underfill to improve moisture resistance or joining strength, evaluate them adequately before using. In certain materials or coating conditions, corrosion by contained constituents, current leakage by moisture absorption, crack and delamination by physical stress can happen. If the curing temperature of the coating material or underfill material exceeds the absolute maximum rating, the electrical characteristics of this product may change.
  • When performing X -ray inspection in mass production process and evaluation build stage such as the product functions and characteristics confirmation, please confirm X-ray irradiation does not exceed 1.5Gy (absorbed dose for air).

Ver. A i The power dissipation of the package is dependent on PCB material, layout, and environmental conditions. The following conditions are used in this measurement. Measurement Conditions Standard Test Land Pattern Environment Mounting on Board (Wind Velocity = 0 m/s) Board Material Glass Cloth Epoxy Plastic (Double-Sided Board) Board Dimensions 40 mm × 40 mm × 1.6 mm Copper Ratio Top Side: Approx. 50% Bottom Side: Approx. 50% Through-holes f 0.5 mm × 44 pcs Measurement Result (Ta = 25°C, Tjmax = 125°C) Standard Test Land Pattern Free Air Power Dissipation 480 mW 300 mW Thermal Resistance qja = (125 − 25°C) / 0.48 W = 208°C/W 333℃/W Power Dissipation PD (mW) 600 500 400 300 200 100 0 25 50 75 100 125 150 Ambient Temperature (°C) Standard Test Land Pattern 480 Free Air IC Mount Area (mm) Power Dissipation vs. Ambient Temperature Measurement Board Pattern

Ver. A i 0.9MAX 0.1 0.1 M 0.3±0.1 0.65 0.13±0.05 2.9±0.2 0.475TYP 3.0±0.2 2.8±0.2 8 5 1 4 0.2±0.1 ※ ※ 0.23±0.1 0.15-0.15 +0.10 +0.10 0.15-0.15 0.2±0.1 0.13±0.05 * The tab suspension leads on the bottom of the package is substrate level (VSS). It is recommended that the tab suspension leads be connected to the VSS pin on the board, or otherwise be left floating. Also, the tab suspension leads should not connect to other wires or land patterns.

Ver. B i : Produ ct Code … Refer to Part Marking List : Lot Number … Alphanumeric Serial Number R5434D (SON-8) Part Markings NOTICE There can be variation in the marking when different AOI (Automated Optical Inspection) equipment is used. In the case of recognizing the marking characteristic with AOI, please contact our sales or distributor before attempting to use AOI. R5434DxxxAA Part Marking List Product Name     R5434D401AA L 0 1 A R5434D402AA L 0 2 A R5434D403AA L 0 3 A R5434D404AA L 0 4 A R5434D405AA L 0 5 A R5434D406AA L 0 6 A R5434D407AA L 0 7 A R5434D408AA L 0 8 A ① ②③④

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