Q67000-A8142 | DigiCamel IC Datasheet

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TDA4918G SIEMENS | Alldatasheet

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SMPS - IC with SIPMOS Driver Output TDA 4918 TDA 4919 Features Bipolar IC @ Switching frequency up to 300 kHz (TDA 4919) i or 150 kHz (TDA 4918) | @ Push-pull output driver with + 700 mA/— 500mA | | @ Separate GND for the driver outputs | @ Feed-forward control @ Soft start @ Hysteresis adjustable at overvoltage and | undervoltage comparator ‘050s ‘© Current-saving starting circuit P-DIP-20-1 @ Current mode and voltage mode operation are possible ---- FF Type Ordering Code | Package | TDA 4918A | Q67000-A8021 P-DIP-20-1 | BITDA 4918 G =| Q67000-A8142 | P-DSO-20-1 (SMD) ves0s084 ITDA 4919 A | Q67000-A8143 P-DIP-20-1 EITDA 4919G | Q67000-A8018 =| P-DSO-20-1 (SMD) | p-DSO-20-1 Functional Description The versatile switch-mode power supply ICs for the direct control of SIPMOS power transistors comprise digital and analog functions. These functions are required for the design of high-quality flyback and forward converters during single-phase and push-pull operation in normal, half-bridge and full-bridge configurations. The ICs can also be used for transformerless voltage multipliers and speed-controlled motors. Malfunctions in the electrical operation of the switch-mode power supply are recognized by on-chip comparators which activate protective functions. The TDA 4918 has two driver outputs for push-pull switch-mode power supplies, as well as single-phase SMPS with a duty cycle limitation of 50 %. The TDA 4919 with a driver output is suitable for single-ended SMPS with duty cycles of up to 100% approximately. ‘Semiconductor Group 139 9.92

| ~ TDA 4918 A, TDA 4919 A TDA 4918 G, TDA 4919G o CI GND QSIP C1 20D GND jonoasie [ft 20[ ]Gno sir” oz 19D 0 OP Amp/1k1 sip.” 7 asip2 C3 18D -] OP Amp ° U? t9{ JaorAm sik vaste of 17 «1 OP Amp | osip2[]3 18[ ]-10P Amp % Os 16FD = Loynxs Ceottstarr C6 18HD *loynns v, asip[]4 17] +10P Amp cq? ufo R, | koe BED IUK4 | “Qs 16] ~Fovnrs Gas 12h 10K 3 Cootrsran | 6 15[]+lowis Isr oye NFA Vice c(h uf] Re ‘only TOA 49186 repeats a []8 13/1 UKs ats 12[ J 10K3 ist[}10 il) Veer HMonty TOA 4918A —te00316 Pin Configuration (top view) Semiconductor Group 140

Pin Definitions and Functions Pin Symbol Function

1 GND Q SIP |Ground driver

2 QsipPt ‘SIPMOS driver 1 (only TDA 4918)

3 Qsip2 SIPMOS driver 2

4 Vs QSIP |Supply voltage driver

5 Vs Supply voltage

6 Coot stan Soff start _

7 Cr ~~ TFrequency generator

8 Rr Frequency generator

9 Ca Ramp generator

W Vaner Reference voltage _ 12 10K3 |Input overvoitage 13 1UK4 Input undervoltage __

14 Ra Ramp generator

15 + Towns Dyn. current limitation 16 |= fons Dyn. current limitation 7 | Op Amp (+) |Input operational amplifier 18 1Op Amp (-) Input operational amplifier

19 Q Op Amp/Ik1 Output operational amplifier Q Op Amp / input comparator

20 GND Ground

& 5 e § " | Peedt edaed | | | Poti t—4 1 < | 1 | Hye | | 3 io ss LE alos 83 ay es8 2) § ——d é t mi é an Z r ke | oT ee | Fy rie | sel] oe lg ges. 2 @®) ~ £ O z| 0 = | 3} /\\ cy ws 28.2 < Block Diagram (TDA 4918) Semiconductor Group 142

The various functional units of the component and their interaction are described in the following. Supply Voltage Vs The IC enables the two outputs not before the turn-on threshold (Vson) at Vs is exceeded. The duty cycle (active time/disable time) at the enabled outputs can then rise from zero to the value set with K1 in the time specified by the soft start. An undervoltage at the standby input causes the current consumption /s to remain at the very low standby current level independent of the voltage Vs. Voltage Controlled Oscillator (VCO) The VCO is connected with the capacitor C+ and the resistor Rr. The charge current at Cr flows continuously and is set with resistor Rr. The discharge current is active during the discharge of Cr and is set internally. In the typical mode of operation the duration of the rising edge is considerably greater than that of the falling edge. During the falling edge the VCO passes a trigger signal to the ramp generator thus discharging the ramp generator capacitance. Additionally, the trigger ‘signal is routed to other parts of the IC. Ramp Generator The ramp generator is triggered by the VCO and TDA 4919 operates at the same frequency as the VCO. The duration of the ramp generator falling edge must be shorter than the VCO fall time. Only then do the ramp generator upper and lower switching levels reach their rated values. To control the pulse width at the output, the voltage of the ramp generator rising edge is compared with an externally adjustable de voltage at comparator K1. The slope of the rising edge is adjusted via the current by means of Ra. This provides the possibility of an additional superimposed control of the output duty cycle. This control capability (feed- forward control) permits the compensation of known interference (e.g. input voltage ripple). A superimposed load current control (current mode control) however, can also be implemented. Push-Pull Flipflop (only TDA 4918) The push-pull flipflop is switched by the falling edge of the VCO. This ensures that only one output of the two SIPMOS driver outputs is enabled at a time. Semiconductor Group 144

Comparator K1 (Duty Cycle Control) The two plus inputs of the comparator are switched such that the lower plus level is always compared with the level of the minus input. As soon as the voltage of the rising sawtooth edge (minus input) exceeds the lower level of the two plus inputs, the currently active output is disabled via the turn-off flipflop. The “high"-duration of the respectively active output can thus be infinitely varied. As the frequency remains constant, this process corresponds to a change in duty cycle 4 Operational Amplifier (Op Amp) The op amp is a high quality operational amplifier. It can be used in the control circuit to transmit the amplified variations of the voltage to be regulated to the free plus input of comparator K1. A voltage change is thus converted to a duty cycle change. Turn-OFF Flipflop The falling edge of the VCO causes a pulse at the turn-off flipflop set input. It can, however, only be actually set if no reset signal is pending. With the turn-OFF flipflop set, the outputs are enabled. Upon an error signal from K5 or upon a turn-off signal from K1 the flipflop disables the outputs. Z-Diode The Z-diode limits the voltage at capacitor Csonsar to a maximum of 5 V. The ramp generator voltage can reach 5.5 V. For an appropriate slope of the rising ramp generator edge, the duty cycle can be limited to a desired maximum value. This can be a possible advantage in flyback converter operation. Comparator K2 The comparator has its switching threshold at 1.5 V at the plus input, and with its output it sets the error flipflop if the voltage at capacitor C sot san is below 1.5 V. The error flipflop, however, will only accept the set pulse if no reset pulse (error) is pending. This prevents a restart of the outputs as long as an error signal is pending. Soft Start The lower of the two voltages at the K1 plus inputs - compared with the ramp generator voltage - is a measure for the duty cycle at the output. At component turn-on, the voltage at capacitor Csorsu: is equal to 0. As long as no error exists, the capacitor will be charged to the maximum value of 5V with a current of 6uA. In the case of an error, Crorstan is discharged with a current of 2 yA. The currently active output, however, is immediately disabled by the error flipflop. Below a charge voltage of

1.5 V, a set signal is pending at the error flipflop and the outputs are enabled if no reset

signal is pending at the same time. As the minimum ramp generator voltage, however, is

1.8 V, the duty cycle at the outputs is actually only increased slowly and continuously

after the voltage at C sor sn exceeds 1.8 V. Semiconductor Group 145

Error signals, routed to the error flipflop reset input, cause an immediate disabling of the outputs (low), and after elimination of the error, a restart of the outputs by soft start. Comparators K3 (Overvoltage), K4 (Undervoltage), Vaer Overcurrent, Vs Undervoltage These are error detectors that on error cause the error flipflop to immediately disable the outputs. After elimination of the error, the duty cycle is raised again using the soft start. Upon overvoltage, a current is impressed at the inputs of K3 and K4, that can be used to enable an adjustable hysteresis or a holding function. The value of the hysteresis is derived from the internal resistance of the external control source and the current impressed internally at the input of K3 or K4. In the undervoltage case, the set current flows at K4 into the component in the technical direction of current flow, with overvoltage at K3 out of the component. Comparator K5 (Dynamic Current Limiter) KS serves to recognize overcurrents at the switching transistors. Both inputs of the comparator are externally accessible. After elimination of the error, the outputs are enabled with the VCO trigger pulse at the turn-off flipflop. The delay time between occurrence of an error and disabling of the outputs is only 250 ns. Standby Input (I ST) This input switches voltage and current hysteresis. The voltage levels for switching from standby to active operation can be set with an external voltage divider between Vs - standby input - ground. In standby mode the component has a much lower current consumption compared to active operation. The outputs are then active low. Should the component be operated by means of feedback supply from the switch-mode power supply, the starting phase can optimally be dimensioned. Reference Voltage (V ner) The reference voltage source is a highly constant source with regard to its temperature behavior. It can be used for the external wiring of the op amp, the error comparators, the ramp generator, or other external components. The voltage source is short-circuit proof to ground. Semiconductor Group 146

SIPMOS Driver Outputs (Q SIP) TDA 4918 The two outputs operate in the push-pull mode. They are active high. The duration during which one of the outputs is active, can be varied infinitely. The duration of the falling edge at the frequency generator is equal to the minimum duration during which both outputs are simultaneously low. TDA 4919 The output is active high. The duration during which the output is active can be varied infinitely. The duration of the falling edge at the frequency generator is equal to the minimum duration during which the output is low (dead time). The output drivers are designed as a push-pull stage. The output current is internally limited to the specified values. A 10 kQ resistor is connected between the output and ground. This resistor holds the SIPMOS transistor reliably disabled during standby operation (undervoltage at pin | St). Output Q SIP is connected with the supply voltage Vso se and with ground via diodes. The diode connected to Vs routes the capacitive shift currents from the SIPMOS transistor gate to the filter capacitor at Vs during turning on the SMPS supply voltage. The voltage at Vs can reach approximately 2.3 V without the SIPMOS transistor being turned on. The diode connected to ground connects negative voltages at Q SIP to - 0.7 V. This provides an unimpeded flow off of capacitive currents occurring during voltage break- down at the SIPMOS transistor drain connection. For supply voltages starting at approx. 2 V, both outputs are active low in the disabled state. The function of the diode connected to Vs is then taken over by the pull-down source. The maximum output voltage is limited by the respectively lowest value of Vs Vso sie or an internal Z-diode. The internal Z-diode limits the voltage at Q SIP to typ. 20 V. Semiconductor Group 147

Ta=— 40 to 85°C Parameter Symbol Limit Values Unit min. max. Supply voltage Vsqsp, Vs |- 0.3 33 v Inputs Op Amp, K3, K5, | ST vi -03 | 33 Vv Input K4 vi -0.3 Vs Vv Frequency Generator (VCO) Voltage at 1; C1 Ver, Ver |-0.3 “16 vo Current at Cr Tor 3 mA Ver>6V i Ramp Generator Cainput Ver -03 le vo Reinput Jar i} 3 mA Reference voltage Vaer -03 16 Vv Output Op Amp. Vocpamp -03 16 v Voopamp > 6V Foopamp 2 mA Driver output Q SIP") Vase -0.3 Vsasr Vv Q SIP clamp diodes Jose - 100 100 mA Vos > Vs or Vase <-0.3V Soft start Vc som stat -0.3 6 v Vc sot sian > 6 V Tc soft start 0 100 nA Junction temperature T, 150 c Storage temperature Ts -65 125 Cc Thermal resistance system - air P-DIP-20 Rusa (60 Kw P-DSO-20 Rivsa 90 Kw The characteristics refer to both the pins connected to ground 1) With this, the max. power dissipation or junction temperature must be taken into account! Semiconductor Group 148

Parameter | Symbol Limit Values Unit | min. max. Supply voltage Vs Vson?) 30 v Vso se _ 30_ v Frequency generator (VCO) feo 300 kHz Ramp generator fe 300 kHz Ambient temperature Ta -40 85 c Ground QsIP | Vonoose | - 0.3 05 v Characteristics Vson < Vs < 30V), Ta = — 40 to 85°C Parameter Symbol Limit Values Unit | Test Condition Current consumption | | without load at Vcr | Q op amp, Q SIP 1/2 lis 6 18 mA |Cr=1nF frequency generator with 100 kHz outputs active Standby operation Ist 35 |mA \\Vs=20V Hysteresis at Vs Turn-on threshold for Vs rising Vs 96 Vv Visr = Vist Turn-off threshold for | Vs falling Vo /78 Vv The characteristics refer to both the pins connected to ground 1) For Vson values refer to characteristic data 2) Vson means that Vs nici has been exceeded, while Vs iow has not yet been undercut Semiconductor Group 149

Characteristics (cont'd) Vson < Vs < 30V"), Ta = — 40 to 85°C. Parameter Symbol Limit Values Unit | Test Condition min. typ. max. Reference Voltage Vaer 2475 2.5 2.525 |V Trer= 1mA Ta = 25°C Vs=15V Voltage change AV nee 10. |mV_ | Fner=1mMA+20% Voltage change AVner 3 |mV | Vs=15V+20% Temperature response AV per 03 |mvK ATA Response threshold for Vrer overcurrent — Tree 7 10 mA Frequency Generator (VCO) Frequency range feo | 300 |kHz Frequency change Af/fveo 1 % |Vs=15V+20% Tolerance Afffvoo |-7 7 % Cr=1nF fvco = 100 kHz; Ta=25°C Charge current for Cr(perm.) = current at pin Rr = Ter mA | Lar= Vacrmr Discharge current for Cr Tech mA | internally fixed Dead time th 350 450 ns Cr= 470 pF, ‘fvco = 100 kHz 400 500 ns?) | Ct= 470 pF, ‘fuco= 300 kHz 1) Vson means that Vs Hich has been exceeded, while Vs.ow has not yet been undercut 2) The time of the falling edge (fall time) is proportional to Cr, if the discharge current largely exceeds the charge current. The fall time is proportional to the minimum dead time at the outputs. ‘Semiconductor Group 150

Characteristics (cont'd) Vson < Vs < 30 V"), Ta =— 40 to 85°C Parameter Symbol Limit Values Unit Test Condition min. | typ. max. Ramp Generator La Frequency range fr 300 [kHz Maximum voltage at Cr Vor 5.4 61 67 Vv Minimum voltage at Ce Vert 1.65 18 1.95 Vv Charge current for Cr (perm) = current at pin Ra Ton i) 1 MA | Vas approx. 0.7 V Discharge current for Cr Iden 1.3 2 27 mA | internally fixed Ratio / na/Icr charge 0.95 141 Jra=0.5 mA Capacitance Ca {100 pF Duty cycle | (active time/ | period at output) ty | 5/20 } Temperature coefficient of duty cycle Tc 02 %IK Comparator K1 Input current -Ik | 2 uA Common-mode input | voltage range Vic I 0 Venu V Turn-OFF delay time it | 500 ns?) Rated load 3 nF atQ SIP 1) Vsox means that VsHoH has been exceeded, while Vs cow has not yet been undercut. 2) Step function VreF = ~ 100 mV _-® Vier = + 100 mV (for transit time from input comparator to Q SIP) Semiconductor Group 151

Characteristics (cont'd) Vson < Vs < 30 V1), Ta = — 40 to 85°C Parameter Symbol Limit Values Unit | Test Condition min. | typ. max. | Operational Amplifier Open-loop voltage gain _ Gwo 60_ 80 dB Input offset voltage Vio =10 mV [Pin 19n.c. Common-mode input voltage range Vic 4 v Transition frequency ft 13 mHz Transition phase or 120 | deg. Temperature coefficient uV/K | Pin 19 n.c.; of Vio TC 30 Vic=3V Source current at Q Op Amp Too amo | 70 100 130 WA 10.5V<Vo<Vean Soft Start Charge current for Csorsen | Len 4 6 HA Discharge current for C son sat Teen 1 2 nA Upper limiting voltage Vien 44 48 |50 Vv Switching voltage of K2 Veo 1300445 |17 |v 1) Vson means that VsHcw has been exceeded, while Vs ow has not yet been undercut. Semiconductor Group 152

Characteristics (cont'd) Vson < Vs < 30 V9), Ta =~ 40 to 85°C Parameter Symbol Limit Values Unit | Test Condition min. yp. | man Dynamic Current Limitation K5 o Input current =Tiom |—10 “y2 wA i Input offset voltage Vo | 10 mv Common-mode input Vic te) Vs-3 |V voltage range i Turm-OFF delay time t 250 400 ns?) | Rated load 3 nF at QSIP Undervoltage K4 input curent atk tm 02 a | - Switching voltage at K4 Vew Veer Veer |V — 0.01 +0.01 Hysteresis current Taya 11 17 22 A Vie Ka) < Vow Tryst 0.1 pA Views) > Vew SEN UEIS Al lel — LR ee Turn-OFF delay time t 3 us?) Overvoltage K3 Input current =hio | 02 uA Switching voltage Vow | Veer Vrce VO | -0.01 +0.01 Hysteresis current =lwan 16 12 nA | Viexs) > Vew [= dyau 0.1 BA VieKs) < Vow 1) Vs on means that Vsxiex has been exceeded, while Vs ow has not yet been undercut. 2) Step function Vrer = - 100 mV => Vrer = + 100 mV (for transit time from input comparator to Q SIP) Semiconductor Group 153

Characteristics (cont'd) Vson < Vs <40 V1), Ta =~ 40 to 85°C Parameter Symbol Limit Values | Unit| Test Condition min. typ. max. Output Driver QSIP 1/2 H-output voltage Von vs-3 | ‘VT fos =—250mA; Vs = Vsose L-output voltage Vou 21 Vi Tose = + 250mA; Vs = Vsosir Vor 14. Vi) Jos = +10mA; Vs = Vsose Output current Jose |500 | 700 mA?) Case = 10 nF; =lose |300 500 mA2) lVs = Vsase = 20 V lose 600 mA?) ¢ Cose = 10 nF; = lose 500 mA2) lVs = Vsose = 15 V los 400 mA2) (Case = 10nF; -lose 400 mA?) tvs = Vsosr = 10V Input Standby IST Turn-ON threshold for ] Vs > Vson; Vist rising Vise [61 (68 |75 |V | Ta=25°C Temperature response |- 0.023 %IK | Turn-OFF threshold for Visr falling Vista 67 OV Temperature response IK Hysteresis current = Iwyiste | 2 WA | Vist > Vistw Frist | Vist. < Vist s Vist; 35 50 65 HA Ta = 25°C Temperature response A Tryst! 0.01 IK Ar 1) Vson means that Vsucx has been exceeded, while Vs vow has not yet been undercut. 2) Dynamic maximum current during rising or falling edge. Semiconductor Group 154

Typical temperature dependance of the frequency generator at different C+ values. (00008 emerge ere py BOE aon | 4 f, AT Ml oe CTE | LUA tt iil! oona L {i Seripor ia 1 He TI [3.30 |" I OTE ga | i Alt ane: Hy COMTI TU 0000, : | iN - Ll Mii HSSea -ovoos LUE TEINS 1 0 100 kHz 1000 fos¢ —— fx = Frequency at room temperature fu = Frequency at thermal increase Semiconductor Group 155,

v| Voltage at Conner 2 . . 8

5 Be BBE

a | VJ] Voltage at C | fee | AAA | | Lower \\ \\

0 T T

Vottage at G | vy rege ac | | i { apt are rr ry, | es a a LM Ve I v veto at QSIP1 | | H ° PT [| t —-+ Vv) Vottage at air? i Max Possible | Duty Cyc Wit t | , itt ! | 0 Sunn nn Pa | 7 ra 3T , Pulse Diagram (TDA 4918) Semiconductor Group 157

me 1 (wa Lower \\ \\ \\ | V|_ Voltage at fy HV mmol 55. - a 4 ny 4 TVENAVA Patter LMA MV) i lt tii Po | i | | | ! V{ Voltage at Q SIP, fax Possible i nl | Duty Cycle ! | Ot Vicor i I tet + | tit i} + t av ras aT —~—t 1eo00321 Pulse Diagram (TDA 4919) ‘Semiconductor Group 158

& $ Bevve ef S3o 3 9 BE 355555 23 “ IK 4 263, 225nnn = | S| BUTs B20 oss | Hes s 4 | { fe av = Fa > = z s ¥ a 5 ball a e Ay se oS Ct C4 e fa Ea c a _ C4 2 +S « z |. O | ce! [ope 3 ~ ST ess HFA. 8 B [og [ag - cy cH U = = 2 XR | be fg is (+2 es O28 | e Re | S s%2 6 Application Circuit (TDA 4919) _ - Semiconductor Group 159

Product Information

Q67000-A8142 specifications and overview.

Summary

SMPS - IC with SIPMOS Driver Output

Description

SMPS - IC with SIPMOS Driver Output

Source title Q67000-A8142 Datasheet(PDF) - Siemens Semiconductor Group

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