PXAC261212FCV1R0

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Document overview

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• PDF pages: 10

Technical content

Features

• Broadband internal matching
• Asymmetric design - Main P1dB = 50 W - Peak P1dB = 75 W
• CW performance in Doherty configuration,

2635 MHz, 28 V

• Output power at P 1dB = 107 W - Gain = 14.4 dB - Efficiency = 57%
• Integrated ESD protection: Human Body Model, class 1C (per JESD22-A114)
• Capable of handling 10:1 VSWR @28 V, 120 W (CW) output power
• Low thermal resistance
• Pb-free and RoHS-compliant RF Characteristics Two-carrier WCDMA Specifications (tested in Infineon Doherty test fixture) VDD = 28 V, VGS(peak) = 1.3 V, IDQ = 280 mA, POUT = 28 W average, ƒ1 = 2630 MHz, ƒ2 = 2640 MHz. 3GPP WCDMA signal: 3.84 MHz bandwidth, 8 dB PAR @0.01% CCDF . Characteristic Symbol Min Typ Max Unit Linear Gain Gps 14.2 15.0 — dB Drain Efficiency hD 45 48 — % Intermodulation Distortion IMD — –25 –22 dBc 29 33 37 41 45 49 53 Drain Efficiency (%) Gain (dB) Output Power (dBm) Two-carrier 3GPP WCDMA VDD = 28 V, IDQ = 280 mA, VGS = 2.62 V, ƒ = 2635 MHz

10 MHz carrier spacing, 8 dB PAR

3.84 MHz bandwidth

Data Sheet 2 of 10 Rev. 02.2, 2016-06-22 DC Characteristics Characteristic Conditions Symbol Min Typ Max Unit Drain-source Breakdown Voltage VGS = 0 V, IDS = 10 mA V(BR)DSS 65 — — V Drain Leakage Current VDS = 28 V, VGS = 0 V IDSS — — 1.0 µA VDS = 63 V, VGS = 0 V IDSS — — 10.0 µA Gate Leakage Current VGS = 10 V, VDS = 0 V IGSS — — 1.0 µA On-state Resistance (main) VGS = 10 V, VDS = 0.1 V RDS(on) — 0.19 — W (peak) VGS = 10 V, VDS = 0.1 V RDS(on) — 0.16 — W Operating Gate Voltage (main) VDS = 28 V, IDQ = 280 mA VGS 2.1 2.6 3.1 V (peak) VDS = 28 V, IDQ = 0 A VGS 0.80 1.3 1.8 V Maximum Ratings Parameter Symbol Value Unit Drain-source Voltage VDSS 65 V Gate-source Voltage VGS –6 to +10 V Operating Voltage VDD 0 to +32 V Junction Temperature TJ 225 °C Storage Temperature Range TSTG –65 to +150 °C Thermal Resistance (TCASE = 70°C, 100 W CW) RqJC 0.61 °C/W

Ordering Information

Type and Version Order Code Package and Description Shipping PXAC261212FC V1 R0 PXAC261212FCV1R0XTMA1 H-37248-4, ceramic open-cavity, earless T ape & Reel, 50 pcs PXAC261212FC V1 R250 PXAC261212FCV1R250XTMA1 H-37248-4, ceramic open-cavity, earless T ape & Reel, 250 pcs

Data Sheet 3 of 10 Rev. 02.2, 2016-06-22 PXAC261212FC Typical Performance (data taken in Infineon Doherty reference test fixture) 29 33 37 41 45 49 53 Drain Efficiency (%) Gain (dB) Output Power (dBm) Two-carrier 3GPP WCDMA VDD = 28 V, IDQ = 280 mA, VGS = 2.62 V, ƒ = 2605 MHz -60 -40 -20 29 33 37 41 45 49 53 Drain Efficiency (%) IMD (dBc), ACPR (dBc) Output Power (dBm) Two-carrier 3GPP WCDMA VDD = 28 V, IDQ = 280 mA, VGS = 2.62 V, ƒ = 2605 MHz

10 MHz carrier spacing, 8 dB PAR,

Drain Efficiency (%) Gain (dB) Output Power (dBm) Two-carrier 3GPP WCDMA VDD = 28 V, IDQ = 280 mA, VGS = 2.62 V, ƒ = 2575 MHz -60 -40 -20 29 33 37 41 45 49 53 Drain Efficiency (%) IMD (dBc), ACPR (dBc) Output Power (dBm) Two-carrier 3GPP WCDMA VDD = 28 V, IDQ = 280 mA, VGS = 2.62 V, ƒ = 2635 MHz

Data Sheet 4 of 10 Rev. 02.2, 2016-06-22 Typical Performance (cont.) -50 -40 -30 -20 -10 29 33 37 41 45 49 53 IMD Up and Low (dBc) Output Power (dBm) Two-carrier WCDMA Drive-up VDD = 28 V, IDQ = 280 mA, VGS = 2.62V, 3GPP WCDMA signal, 8 dB PAR, 10 MHz carrier spacing, 3.84 MHz BW

2575 IMDL 2575 IMDU

2605 IMDL 2605 IMDU

2635 IMDL 2635 IMDU

Efficiency (%) Gain (dB) Output Power (dBm) CW Performance VDD = 28 V, IDQ = 280 mA Efficiency Gain c261212fc-gr4

2575 MHz

2635 MHz

2605 MHz

5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 29 33 37 41 45 49 53 Efficiency (%) Power Gain (dB) Output Power (dBm) CW Performance at various VDD IDQ = 280 mA, ƒ = 2635 MHz Gain Efficiency VDD = 24 V VDD = 28 V VDD = 32 V c261212fc-gr5c -60 -40 -20 29 33 37 41 45 49 53 Drain Efficiency (%) IMD (dBc), ACPR (dBc) Output Power (dBm) Two-carrier 3GPP WCDMA VDD = 28 V, IDQ = 280 mA, VGS = 2.62 V, ƒ = 2575 MHz

Data Sheet 5 of 10 Rev. 02.2, 2016-06-22 PXAC261212FC Typical Performance (cont.) 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 29 33 37 41 45 49 53 Efficiency (%) Power Gain (dB) Output Power (dBm) CW Performance at various VDD IDQ = 280 mA, ƒ = 2575 MHz Gain Efficiency VDD = 24 V VDD = 28 V VDD = 32 V c261212fc-gr5a0 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5 29 33 37 41 45 49 53 Efficiency (%) Power Gain (dB) Output Power (dBm) CW Performance at various VDD IDQ = 280 mA, ƒ = 2605 MHz Gain Efficiency VDD = 24 V VDD = 28 V VDD = 32 V c261212fc-gr5b -20 -15 -10 2500 2550 2600 2650 2700 2750 Input Return Loss (dB) Power Gain (dB) Frequency (MHz) Small Signal CW Performance Gain & Input Return Loss VDD = 28 V, IDQ = 280 mA IRL Gain c261212fc-gr6

Data Sheet 6 of 10 Rev. 02.2, 2016-06-22 Load Pull Performance Main side pulsed CW signal: 160 µsec, 10% duty cycle; 28 V, VGS = 1.4 V, IDQ = 250 mA P1dB Class AB Max Output Power Max PAE Freq [MHz] Zs [W] Zl [W] Gain [dB] POUT [dBm] POUT [W] PAE [%] Zl [W] Gain [dB] POUT [dBm] POUT [W] PAE [%] Peak side pulsed CW signal: 160 µsec, 10% duty cycle; 28 V, VGS = 1.4 V P1dB Class C Max Output Power Max PAE Freq [MHz] Zs [W] Zl [W] Gain [dB] POUT [dBm] POUT [W] PAE [%] Zl [W] Gain [dB] POUT [dBm] POUT [W] PAE [%] Z Source Z Load SG1 Reference Circuit, tuned for 2575 – 2675 MHz DUT PXAC261212FC Test Fixture Part No. LTA/PXAC261212FC V1 PCB Rogers 4350, 0.508 mm [.020"] thick, 2 oz. copper, εr = 3.66 Find Gerber files for this reference fixture on the Infineon Web site at (www.infineon.com/rfpower)

Data Sheet 7 of 10 Rev. 02.2, 2016-06-22 PXAC261212FC Reference circuit assembly diagram (not to scale) Assembly Information Component Description Manufacturer P/N Input C101, C102 Chip capacitor, 4.7 µF Murata Electronics North America GRM32ER71H475KA88L C103, C105, C108, C109 Chip capacitor, 10 pF ATC ATC600F100JW250T C104 Chip capacitor, 0.4 pF ATC ATC600F0R4CW250T C106, C107 Chip capacitor, 0.8 pF ATC ATC600F0R8AW250T C110 Chip capacitor, 0.2 pF ATC ATC600F0R2AW250T C111 Chip capacitor, 0.3 pF ATC ATC600F0R3CW250T R101, R104 Resistor, 10 Ohm Panasonic – ECG ERJ-3GEYJ100V R102 Resistor, 5.1k Ohm Panasonic – ECG ERJ-3GEYJ512V R103 Resistor, 50 Ohm Anaren RFP-060120A15Z50 U1 90° RF hybrid coupler Anaren XC2650P-03S Reference Circuit (cont.) c 2 6 1 2 1 2 f c _ c d _ 2 0 1 4 - 0 6 - 0 3 RF_OUTRF_IN PXAC261212FC_IN_01_D RO4350, .020 (94) R104 C107 C104 C108 R103 C106 C110 C109 R102 C103 C102 C105 R101 C101 C111 RO4350, .020 (60) PXAC261212FC_OUT_01_D C213 C212 C206 C208 C210 C216 C214 C201 C202 C205 C209 C207 C211 C203 C215 PXAC261212FC C204 VGG VDD VDD VGG (table continued next page)

Data Sheet 8 of 10 Rev. 02.2, 2016-06-22 Assembly Information (cont.) Component Description Manufacturer P/N Output C201, C215, C216 Chip capacitor, 10 pF ATC ATC600F100JW250T C202, C204, C211, C208 Chip capacitor, 0.5 pF ATC ATC600F0R5CW250T C203 Capacitor, 220 µF Cornell Dubilier Electronics (CDE) SK221M050ST C205, C209, C210, C212, C213, C214 Chip capacitor, 4.7 µF Murata Electronics North America GRM32ER71H475KA88L C206 Chip capacitor, 0.3 pF ATC ATC600F0R3CW250T C207 Chip capacitor, 3.9 pF ATC ATC600F3R9CW250T Pinout Diagram (top view) Pin Description D1 Drain device 1 (main) D2 Drain device 2 (peak) G1 Gate device 1 (main) G2 Gate device 2 (peak) S Source (flange) S D1 D2 G1 G2 Main Peak Reference Circuit (cont.)

Data Sheet 9 of 10 Rev. 02.2, 2016-06-22 PXAC261212FC Package Outline Specifications Package H-37248-4 Diagram Notes—unless otherwise specified: 1. Interpret dimensions and tolerances per ASME Y14.5M-1994. 2. Primary dimensions are mm. Alternate dimensions are inches. 3. All tolerances ± 0.127 [.005] unless specified otherwise. 4. Pins: D1, D2 – drains; G1, G2 – gates; S – source. 6. Gold plating thickness: 1.14 ± 0.38 micron [45 ± 15 microinch]. CL LC CL 2X 12.70 [.500] 19.81±0.20 [.780±0.008] 4X 3.81 [.150] LID 9.40 [.370] FLANGE 9.78 [.385] 2X 4.83±0.51 [.190±0.020] 3.76±0.25 [.148±0.010] SPH 1.57 [.062] 4X R0.76+0.13 -0.38 [R.030 +0.005 -0.015 ]D1 D2 G1 G2 1.02 [.040] 20.57 [.810]S 2X 45° X 2.72 [45° X .107] (8.89 [.350]) (5.08 [.200]) 19.43±0.51 [.765±0.020] 0.0381 [.0015] -A- Diagram Notes—unless otherwise specified: 1. Interpret dimensions and tolerances per ASME Y14.5M-1994. 2. Primary dimensions are mm. Alternate dimensions are inches. 3. All tolerances ± 0.127 [.005]. 4. Pins: D1, D2 – drain, G1, G2 – gate, S – source. 6. Gold plating thickness: 1.14 ± 0.38 micron [45 ± 15 microinch]. Find the latest and most complete information tabout products and packaging at the Infineon Internet page (www.infineon.com/rfpower)

We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Y our feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: (highpowerRF@infineon.com) To request other information, contact us at: +1 877 465 3667 (1-877-GO-LDMOS) USA or +1 408 776 0600 International Data Sheet 10 of 10 Rev. 02.2, 2016-06-22 Edition 2016-06-22 Published by Infineon Technologies AG

85579 Neubiberg, Germany

© 2014 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com/rfpower). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of In- fineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. PXAC261212FC V1

Revision History

Revision Date Data Sheet Page Subjects (major changes since last revision) 01 2014-03-03 Advance all Proposed specification for new product development. 02 2014-06-12 Production all Specification for production-released device. 02.1 2014-06-30 Production 1 Corrected typo in features. 02.2 2016-06-22 Production 2 Updated ordering information