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Technical content

Features

  • Broadband internal input and output matching
  • Asymmetrical Doherty design - Main: 70 W Typ (P1dB) - Peak: 110 W Typ (P1dB)
  • Typical pulsed CW performance, 1880 MHz, 28 V, combined outputs - Output power at P 3dB = 194 W - Efficiency = 64% - Gain = 14 dB
  • Capable of handling 10:1 VSWR @28 V, 110 W (CW) output power
  • Integrated ESD protection
  • Human Body Model Class 1C (per ANSI/ESDA/ JEDEC JS-001)
  • Low thermal resistance
  • Pb-free and RoHS compliant -60 -40 -20 25 30 35 40 45 50 55 Efficiency (%) Peak/Average Ratio, Gain (dB) Average Output Power (dBm) Single-carrier WCDMA Drive-up VDD = 28 V, IDQ = 400 mA, ƒ = 1880 MHz, 3GPP WCDMA signal, PAR = 10 dB, 3.84 MHz BW Gain Efficiency PAR @ 0.01% CCDF c182002fc_g1

Data Sheet 2 of 8 Rev. 02.3, 2016-06-17 PXAC182002FC DC Characteristics (each side) Characteristic Conditions Symbol Min Typ Max Unit Drain-Source Breakdown Voltage VGS = 0 V, IDS = 10 mA V(BR)DSS 65 — — V Drain Leakage Current VDS = 28 V, VGS = 0 V IDSS — — 0.1 µA VDS = 63 V, VGS = 0 V IDSS — — 1.0 µA On-State Resistance (main) VGS = 10 V, VDS = 0.1 V RDS(on) — 0.18 — W (peak) VGS = 10 V, VDS = 0.1 V RDS(on) — 0.135 — W Operating Gate Voltage (main) VDS = 28 V, IDQ = 400 mA VGS 2.55 2.65 2.75 V (peak) VDS = 28 V, IDQ = 0 A VGS 0.9 1.2 1.3 V Gate Leakage Current VGS = 10 V, VDS = 0 V IGSS — — 0.1 µA Maximum Ratings Parameter Symbol Value Unit Drain-Source Voltage VDSS 65 V Gate-Source Voltage VGS –6 to +10 V Operating Voltage VDD 0 to +32 V Junction Temperature TJ 225 °C Storage Temperature Range TSTG –65 to +150 °C Thermal Resistance (main, TCASE = 70°C, 28 W CW) RqJC 1.088 °C/W (peak, TCASE = 70°C, 100 W CW) RqJC 0.587 °C/W

Ordering Information

Type and Version Order Code Package Description Shipping PXAC182002FC V1 R0 PXAC182002FCV1R0XTMA1 H-37248-4, earless flange Tape & Reel, 50 pcs PXAC182002FC V1 R250 PXAC182002FCV1R250XTMA1 H-37248-4, earless flange Tape & Reel, 250 pcs

Data Sheet 3 of 8 Rev. 02.3, 2016-06-17 Typical Performance (data taken in a production test fixture) -70 -60 -50 -40 -30 -20 -10 27 32 37 42 47 52 Efficiency(%) ACP Up & Low (dBc) Average Output Power (dBm) Single-carrier WCDMA Drive-up VDD = 28 V, IDQ = 400 mA, ƒ = 1880 MHz, 3GPP WCDMA signal, PAR = 10 dB, BW = 3.84 MHz Efficiency ACP Up ACP Low c182002fc_g2 -50 -45 -40 -35 -30 -25 -20 27 32 37 42 47 52 ACP Up & Low (dBc) Average Output Power (dBm) Single-carrier WCDMA 3GPP Drive-up VDD = 28 V, IDQ = 400 mA, ƒ = 1805-1880 MHz, 3GPP WCDMA signal, PAR = 10 dB, BW = 3.84 MHz

1880 ACPL

1880 ACPU

1842.5 ACPL

1842.5 ACPU

1805 ACPL

1805 ACPU

c182002fc_g3 29 33 37 41 45 49 53 57 Efficiency (%) Gain (dB) Output Power (dBm) CW Performance VDD = 28 V, IDQ = 400mA

1842.5 Gain

1805 Gain

1880 Gain

1880 Eff

1842.5 Eff

1805 Eff

c182002fc_g4 5 27 35 43 51 59 Efficiency (%) Gain (dB) Output Power (dBm) CW Performance at various VDD IDQ = 400 mA, ƒ = 1880 MHz 24V Gain 28V Gain 32V Gain 24V Eff 28V Eff 32V Eff Gain Efficiency c182002fc_g5

Data Sheet 4 of 8 Rev. 02.3, 2016-06-17 PXAC182002FC Typical Performance (cont.) Load Pull Performance Main Side Load Pull Performance – Pulsed CW signal: 160 µs, 10% duty cycle, 28 V, IDQ = 405 mA P1dB Max Output Power Max Drain Efficiency Freq [MHz] Zs [W] Zl [W] Gain [dB] POUT [dBm] POUT [W] hD [%] Zl [W] Gain [dB] POUT [dBm] POUT [W] hD [%] Peak Side Load Pull Performance – Pulsed CW signal: 160 µs, 10% duty cycle, 28 V, IDQ = 685 mA P1dB Max Output Power Max Drain Efficiency Freq [MHz] Zs [W] Zl [W] Gain [dB] POUT [dBm] POUT [W] hD [%] Zl [W] Gain [dB] POUT [dBm] POUT [W] hD [%] -30 -25 -20 -15 -10 1700 1750 1800 1850 1900 1950 2000 Input Return Loss (dB) Gain (dB) Frequency (MHz) CW Performance Small Signal Gain & Input Return Loss VDD = 28 V, IDQ = 400 mA IRL Gain c182002fc_g6

Data Sheet 5 of 8 Rev. 02.3, 2016-06-17 Reference Circuit , 1805 – 1880 MHz Reference circuit assembly diagram (not to scale) PXAC182002FC_IN_01 C102 RF_IN RF_OUT VDD VGS VGSPK c 1 8 2 0 0 2 f c _ C D _ 0 3 - 2 4 - 2 0 1 5 C101 C103 C105 C104 C106 C108 C107 C204 C206 C208 C207 C202 C201 C203 RO4350, .020 (61) C210 C211 RO4350, .020 (60) R102 R101 R103 R104 R106 R105 PXAC182002FC_OUT_01 C216 C213C209 C218 C215 C214 VDD C217 C212 C219 C205

Data Sheet 6 of 8 Rev. 02.3, 2016-06-17 PXAC182002FC Reference Circuit (cont.) Reference Circuit Assembly DUT PXAC182002FC V1 Test Fixture Part No. LTA/PXAC182002FC V1 PCB Rogers 4350, 0.508 mm [0.020”] thick, 2 oz. copper, εr = 3.66, ƒ = 1805 – 1880 MHz Find Gerber files for this test fixture on the Infineon Web site at http://www.infineon.com/rfpower Components Information Component Description Manufacturer P/N Input C101 Capacitor, 1.2 pF ATC ATC600F1R2CW250T C102 Capacitor, 0.5 pF ATC ATC600F0R5CW250T C103, C104, C105, C106 Capacitor, 18 pF ATC ATC600F180JW250T C107, C108 Capacitor, 10 µF Taiyo Yuden UMK325C7106MM-T R101 Resistor, 50 W Richardson C8A50Z4A R102 Resistor, 18 ohms Panasonic Electronic Components ERJ-8GEYJ180V R103, R104 Resistor, 301 W Venkel CR0603-16W-3010FT R105, R106 Resistor, 10 W Panasonic Electronic Components ERJ-3GEYJ100V S1 Hybrid Coupler Anaren X3C19P1-03S Output C201, C207, C215, C218, C219 Capacitor, 18 pF ATC ATC600F180JW250T C202 Capacitor, 0.8 pF ATC ATC600F0R8AW250T C203 Capacitor, 5.1 pF ATC ATC600F5R1AW250T C204 Capacitor, 1.6 pF ATC ATC600F1R6AW250T C205, C217 Capacitor, 220 µF Cornell Dubilier Electronics SK221M050ST C206, C208, C209, C211, C213, C214, C216 Capacitor, 10 µF Taiyo Yuden UMK325C7106MM-T C210 Capacitor, 0.5 pF ATC ATC600F0R5AW250T C212 Capacitor, 1.6 pF ATC ATC600F1R6AW250T Pinout Diagram (top view) Pin Description D1 Drain device 1 (Main) D2 Drain device 2 (Peak) G1 Gate device 1 (Main) G2 Gate device 2 (Peak) S Source (flange) Lead connections for PXAC182002FC S D1 D2 G1 G2 Main Peak

Data Sheet 7 of 8 Rev. 02.3, 2016-06-17 Package Outline Specifications Package H-37248-4 Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/rfpower Diagram Notes—unless otherwise specified: 1. Interpret dimensions and tolerances per ASME Y14.5M-1994. 2. Primary dimensions are mm. Alternate dimensions are inches. 3. All tolerances ± 0.127 [.005] unless specified otherwise. 4. Pins: D1, D2 – drains; G1, G2 – gates; S – source. 6. Gold plating thickness: 1.14 ± 0.38 micron [45 ± 15 microinch]. CL LC CL 2X 12.70 [.500] 19.81±0.20 [.780±0.008] 4X 3.81 [.150] LID 9.40 [.370] FLANGE 9.78 [.385] 2X 4.83±0.51 [.190±0.020] 3.76±0.25 [.148±0.010] SPH 1.57 [.062] 4X R0.76+0.13 -0.38 [R.030 +0.005 -0.015 ]D1 D2 G1 G2 1.02 [.040] 20.57 [.810]S 2X 45° X 2.72 [45° X .107] (8.89 [.350]) (5.08 [.200]) 19.43±0.51 [.765±0.020] 0.0381 [.0015] -A-

Data Sheet 8 of 8 Rev. 02.3, 2016-06-17 We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Y our feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: (highpowerRF@infineon.com) To request other information, contact us at: +1 877 465 3667 (1-877-GO-LDMOS) USA or +1 408 776 0600 International Edition 2016-06-17 Published by Infineon Technologies AG

85579 Neubiberg, Germany

© 2014 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com/rfpower). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of In- fineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. PXAC182002FC V1

Revision History

Revision Date Data Sheet Type Page Subjects (major changes since last revision) 01 2014-09-23 Advance All Data Sheet reflects advance specification for product development 02 2015-03-24 Production All All Data Sheet reflects released product specification Revised all data and includes updated final specs, typical performance graphs, loadpull, refer- ence circuit, package outline 02.1 2015-05-20 Production 1 Updated single-carrier WCDMA test spec 02.2 2015-06-05 Production 1 Corrected I/O in description paragraph, removed f 1 from single-carrier WCDMA test spec condi- tion 02.3 2016-06-17 Production 1, 2 Updated ESD rating and ordering information to include R0