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Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 10
Technical content
Features
- Broadband internal input and output matching
- Asymmetric Doherty design - Main : P1dB = 20 W Typ - Peak : P1dB = 40 W Typ
- Typical Pulsed CW performance, 1880 MHz,
28 V, 160 µs pulse width, 10% duty cycle, class AB,
- Output power at P 1dB = 10 W - Efficiency = 58% - Gain at P 3dB = 19 dB
- Integrated ESD protection
- Human Body Model, Class 1B (per ANSI/ESDA/ JEDEC JS-001)
- Low thermal resistance
- Pb-free and RoHS compliant -75 -50 -25 27 31 35 39 43 47 Efficiency (%) Peak/Average Ratio, Gain (dB) Average Output Power (dBm) Single-carrier WCDMA Drive-up VDD = 28 V, IDQ = 80 mA, ƒ = 1880 MHz 3GPP WCDMA signal, PAR = 10 dB, 3.84 MHz BW Gain Efficiency PAR @ 0.01% CCDF pxac180602md_g1 PXAC180602MD
Data Sheet 2 of 10 Rev. 02.1, 2015-06-18 PXAC180602MD DC Characteristics (each side) Characteristic Conditions Symbol Min Typ Max Unit Drain-Source Breakdown Voltage VGS = 0 V, IDS = 10 mA V(BR)DSS 65 — — V Drain Leakage Current VDS = 28 V, VGS = 0 V IDSS — — 1 µA VDS = 63 V, VGS = 0 V IDSS — — 10 µA On-State Resistance (main) VGS = 10 V, VDS = 0.1 V RDS(on) — 0.76 — W On-State Resistance (peak) VGS = 10 V, VDS = 0.1 V RDS(on) — 0.36 — W Operating Gate Voltage (main) VDS = 26 V, IDQ = 80 mA VGS 2.3 2.6 3.0 V Operating Gate Voltage (peak) VDS = 26 V, IDQ = 0 mA VGS 0.8 1.4 1.8 V Gate Leakage Current VGS = 10 V, VDS = 0 V IGSS — — 1 µA Maximum Ratings Parameter Symbol Value Unit Drain-Source Voltage VDSS 65 V Gate-Source Voltage VGS –6 to +10 V Operating Voltage VDD 0 to +32 V Junction Temperature TJ 225 °C Storage Temperature Range TSTG –65 to +150 °C Thermal Resistance (Doherty, TCASE = 70°C, 55 W CW) RqJC 2.4 °C/W
Ordering Information
Type and Version Order Code Package Description Shipping PXAC180602MD V1 R500 PXAC180602MDV1R500XUMA1 PG-HB1DSO-4-1 Tape & Reel, 500 pcs
Data Sheet 3 of 10 Rev. 02.1, 2015-06-18 Typical Performance (data taken in a production Doherty test fixture) -70 -60 -50 -40 -30 -20 -10 27 31 35 39 43 47 Efficiency(%) ACP Up & Low (dBc) Average Output Power (dBm) Single-carrier WCDMA Drive-up VDD = 28 V, IDQ = 80 mA, ƒ = 1880 MHz, 3GPP WCDMA signal, PAR = 10 dB, BW = 3.84 MHz Efficiency ACP Up ACP Low pxac180602md_g2 1700 1750 1800 1850 1900 1950 2000 Efficiency (%) Gain (dB) Frequency (MHz) Single-carrier WCDMA Broadband Performance VDD = 28 V, IDQ = 80 mA, POUT = 39.5dBm, 3GPP WCDMA signal, PAR = 10 dB Efficiency Gain pxac180602md_g3 -30 -25 -20 -15 -10 -35 -30 -25 -20 -15 -10 1700 1750 1800 1850 1900 1950 2000 Return Loss (dB) ACP Up (dBc) Frequency (MHz) Single-carrier WCDMA Broadband Performance VDD = 28 V, IDQ = 80 mA, POUT = 39.5dBm, 3GPP WCDMA signal, PAR = 10 dB ACP Up IRL pxac180602md_g4 29 33 37 41 45 49 Efficiency (%) Gain (dB) Output Power (dBm) CW Performance VDD = 28 V, IDQ = 80mA
1805 Gain
1842.5 Gain
1880 Gain
1805 Eff
1842.5 Eff
1880 Eff
pxac180602md_g5
Data Sheet 4 of 10 Rev. 02.1, 2015-06-18 PXAC180602MD Typical Performance (cont.) 27 31 35 39 43 47 51 Efficiency (%) Gain (dB) Output Power (dBm) CW Performance at various VDD IDQ = 80 mA, ƒ = 1880 MHz VDD = 32 V VDD = 24 V VDD = 28 V VDD = 32 V Gain Efficiency pxac180602md_g6 -18 -14 -10 1700 1750 1800 1850 1900 1950 2000 Input Return Loss (dB) Gain (dB) Frequency (MHz) Small Signal CW Gain & Input Return Loss VDD = 28 V, IDQ = 80 mA IRL Gain pxac180602md_g7
Data Sheet 5 of 10 Rev. 02.1, 2015-06-18 Load Pull Performance – P1dB Load Pull Performance – P3dB Main Side Load Pull Performance – CW signal: VDD = 28 V, IDQ = 85 mA, Class AB P1dB Max Output Power Max PAE Freq [MHz] Zs [W] Zl [W] Gain [dB] POUT [dBm] POUT [W] PAE [%] Zl [W] Gain [dB] POUT [dBm] POUT [W] PAE [%] Peak Side Load Pull Performance – CW signal: VDD = 28 V, VGSPK = 1.4 V P1dB Max Output Power Max PAE Freq [MHz] Zs [W] Zl [W] Gain [dB] POUT [dBm] POUT [W] PAE [%] Zl [W] Gain [dB] POUT [dBm] POUT [W] PAE [%] Main Side Load Pull Performance – CW signal: VDD = 28 V, IDQ = 85 mA, Class AB P3dB Max Output Power Max PAE Freq [MHz] Zs [W] Zl [W] Gain [dB] POUT [dBm] POUT [W] PAE [%] Zl [W] Gain [dB] POUT [dBm] POUT [W] PAE [%] Peak Side Load Pull Performance – CW signal: VDD = 28 V, VGSPK = 1.4 V P3dB Max Output Power Max PAE Freq [MHz] Zs [W] Zl [W] Gain [dB] POUT [dBm] POUT [W] PAE [%] Zl [W] Gain [dB] POUT [dBm] POUT [W] PAE [%]
Data Sheet 6 of 10 Rev. 02.1, 2015-06-18 PXAC180602MD Reference Circuit , 1805 – 1880 MHz Reference circuit assembly diagram (not to scale) PXAC180602MD-06 C102 RF_IN RF_OUT VDD p x a c 1 8 0 6 0 2 m d _ C D _ 0 2 - 1 8 - 2 0 1 5 C101 C103 C105 C104 R101 C108 C106 R103 RO4350, 0.508 (201) C110 R802 S1 S3 R801 C801 C802 R803 R102 +R804 S2 S4 S5 R805 C803 C804 C805 R806 R104 R105 C111 C109 C112 C113 C115 C114 C116 C118 C117C107 VDD VGSPEAK VGSMAIN
Data Sheet 7 of 10 Rev. 02.1, 2015-06-18 Reference Circuit (cont.) Pin Description D1 Drain device 1 (Peak) D2 Drain device 2 (Main) G1 Gate device 1 (Peak) G2 Gate device 2 (Main) S Source (flange) Pinout Diagram (top view) Lead connections for PXAC180602MD PG_HB1DSO- 4_gw_pd_02-18-2015 S G1 G2 D1 D2 MainPeak Reference Circuit Assembly DUT PXAC180602MD V1 Test Fixture Part No. LTA/PXAC180602MD V1 PCB Rogers 4350, 0.508 mm [0.020”] thick, 2 oz. copper, εr = 3.66, ƒ = 1805 – 1880 MHz Find Gerber files for this test fixture on the Infineon Web site at http://www.infineon.com/rfpower Components Information Component Description Suggested Manufacturer P/N Input C101, C107 Capacitor, 10 µF Taiyo Yuden UMK325C7106MM-T C102, C103, C106, C108 Capacitor, 24 pF ATC ATC100A240JW150XB C104 Capacitor, 2.4 pF ATC ATC100A2R4CW150XB C105 Capacitor, 15 pF ATC ATC100A150JW150XB C801, C802, C803, C804, C805 Capacitor, 1000 pF Panasonic Electronic Components ECJ-1VB1H102K R101, R103 Resistor, 10 W Panasonic Electronic Components ERJ-3GEYJ100V R102, R104 Resistor, 0.0 W Panasonic Electronic Components ERJ-8GEY0R00V R105 Resistor, 50 W Anaren C16A50Z4 R801, R805 Resistor, 100 W Panasonic Electronic Components ERJ-8GEYJ101V R802, R803, R804 Resistor, 10 W Panasonic Electronic Components ERJ-8GEYJ100V R806 Resistor, 1.3k Panasonic Electronic Components ERJ-3GEYJ132V S1, S2 Potentiometer, 2k W Bourns Inc. 3224W-1-202E S3, S4 Voltage Regulator Texas Instruments LM78L05ACM S5 Transistor Infineon Technologies BCP56 Output C109, C110, C116, C117 Capacitor, 10 µF Taiyo Yuden UMK325C7106MM-T C112, C113, C114, C115 Capacitor, 24 pF ATC ATC100A240JW150XB C111, C118 Capacitor, 100 µF Panasonic Electronic Components EEE-FP1V101AP
Data Sheet 8 of 10 Rev. 02.1, 2015-06-18 PXAC180602MD Package Outline Specifications VIEWÊY 2X 0.50 3.45 6.91 3.00 16.26 18.44 2. 2. 19.44 4X 4.90 2X 6.554X 3.99 3.28 2X 1.65 2X 2.02 14.94 ± 0.15
0.50 X 45°
9.02 Y 0.25 1.02 1.00 2X 13.05 4.00
4 X 7°
2 X 10°
4X 1.02 2.62 1.86 R0.45 0...0.1 5°± 3° 1.27 PG-HB1DSO-4_01_02-13-2015 D1 D2 G1 G2 D1 D2 G1 G2 S 0.10 MAX. 2X 0.35 Diagram Notes–unless otherwise specified: 1. Mold/Dam Bar/Metal protusion of 0.30mm max per side not included. 2. Metal protrusion are connected to source and shall not exceed 0.10mm max. 3. Fillets and radii: all radii are 0.3 mm max. 4.Interpret dimensions and tolerances per ISO 8015. 5. Dimensions are mm. 6. Exposed metal surface pre-plated, may not be covered by mold compound. 7. All tolerances ± 0.1mm unless specified otherwise. 8. All metal surfaces pre-plated, except area of cut. 9. Lead thickness: 0.25 mm. 10. Gold plating thickness: 0.25 micron [10 microinch] max. 11. Pins: D1, D2 – drain; G1, G2 – gate; S – source.
Data Sheet 9 of 10 Rev. 02.1, 2015-06-18 Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/rfpower Package Outline Specifications (cont.) Diagram Notes–unless otherwise specified: 1. Mold/Dam Bar/Metal protusion of 0.30mm max per side not included. 2. Metal protrusion are connected to source and shall not exceed 0.10mm max. 3. Fillets and radii: all radii are 0.3 mm max. 4.Interpret dimensions and tolerances per ISO 8015. 5. Dimensions are mm. 6. Exposed metal surface pre-plated, may not be covered by mold compound. 7. All tolerances ± 0.1mm unless specified otherwise. 8. All metal surfaces pre-plated, except area of cut. 9. Lead thickness: 0.25 mm. 10. Gold plating thickness: 0.25 micron [10 microinch] max. 11. Pins: D1, D2 – drain; G1, G2 – gate; S – source. VIEWÊY 2X 0.50 3.45 6.91 3.00 16.26 18.44 2. 2. 19.44 4X 4.90 2X 6.554X 3.99 3.28 2X 1.65 2X 2.02 14.94 ± 0.15 9.02 Y 0.25 1.02 1.00 2X 13.05 4.00 4X 1.02 2.62 1.86 R0.45 0...0.1 5°± 3° 1.27 PG-HB1DSO-4_01_02-13-2015 D1 D2 G1 G2 D1 D2 G1 G2 S 0.10 MAX. 2X 0.35
Data Sheet 10 of 10 Rev. 02.1, 2015-06-18 We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Y our feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: (highpowerRF@infineon.com) To request other information, contact us at: +1 877 465 3667 (1-877-GO-LDMOS) USA or +1 408 776 0600 International Edition 2015-06-18 Published by Infineon Technologies AG
85579 Neubiberg, Germany
© 2014 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com/rfpower). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of In- fineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. PXAC180602MD V1
Revision History
Revision Date Data Sheet Type Page Subjects (major changes since last revision) 01 2013-11-12 Advance All Data Sheet reflects advance specification for product development 01.1 2014-04-15 Advance 1 Added package, updated package identification updated package identification 02 2015-02-13 Production All Data Sheet reflects released product specification - updated features, RF & DC characteristics, Maximum Ratings, Ordering Information, added graphs,loadpull information and reference circuit, updated package outline 02.1 2015-06-18 Production 7 Corrected test fix part no. to LTA