PU7457 PANASONIC | Alldatasheet

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Power Transistor Arrays (F-MOS FETs) unit: mm PU7457 Silicon N-Channel Power F-MOS FET (with built-in zener diode) n Features l High avalanche energy capacity l High electrostatic breakdown voltage l No secondary breakdown l High breakdown voltage, large allowable power dissipation l Allowing Low-voltage drive n Applications l Contactless relay l Diving circuit for a solenoid l Driving circuit for a motor l Control equipment l Switching power supply G: Gate D: Drain S: Source 10-Lead Plastic SIL Package n Electrical Characteristics (TC = 25°C) Parameter Drain to Source cut-off current Gate to Source leakage current Drain to Source breakdown voltage Gate threshold voltage Drain to Source ON-resistance Forward transfer admittance Diode forward voltage Input capacitance (Common Source) Output capacitance (Common Source) Reverse transfer capacitance (Common Source) Turn-on time Fall time Turn-off time (delay time) Symbol IDSS IGSS V DSS V th R DS(on)1 R DS(on)2 | Yfs | V DSF C iss C oss C rss ton tf td(off) Conditions V DS = 80V, VGS = 0 V GS = ±20V, VDS = 0 ID = 1mA, VGS = 0 V DS = 10V, ID = 1mA V GS = 10V, ID = 2A V GS = 4V, ID = 2A V DS = 10V, ID = 2A IDR = 3A, VGS = 0 V DS = 10V, VGS = 0, f = 1MHz V GS = 10V, ID = 2A V DD = 50V, RL = 25W min 2.5 typ 300 400 130 160 0.2 0.3 1.5 max ±10 115 2.5 450 600 -1.6 Unit mA mA V V m W m W S V pF pF pF ms ms ms Internal Connection 25.3±0.2 8.0 9.5±0.2 1.65±0.2 4.4±0.5 4.0±0.2 2.54±0.2 0.8±0.25 95 2.54=22.86±0.25 0.5±0.151.0±0.25 0.5±0.15 C1.5±0.5 13572468 91 0 101 357 468 n Absolute Maximum Ratings (TC = 25°C) Parameter Drain to Source breakdown voltage Gate to Source voltage Drain current Avalanche energy capacity Allowable power dissipation Channel temperature Storage temperature DC Pulse Non repetition TC = 25°C Ta = 25°C Symbol V DSS V GSS ID IDP EAS * PD Tch Tstg Ratings 100 ± 15 ±20 22.5 3.5 150 -55 to +150 Unit V V A A mJ W * L = 5mH, IL = 3A, 1 pulse

Power Transistor Arrays (F-MOS FETs) PU7457 Area of safe operation (ASO) P D ¾ Ta EAS ¾ Tj IAS ¾ L-load I D ¾ VGS V th ¾ TC ID ¾ VDS R DS(on) ¾ ID | Yfs | ¾ ID VDS =10V TC =25˚C Drain current ID (A) Forward transfer admittance |Yfs| (S) 1 10 100 10003 30 300 0.01 0.03 0.1 0.3 100 Non repetitive pulse TC =25˚C IDP t=100ms 1ms 10ms 100ms ID DC Drain to source voltage VDS (V) Drain current ID (A) 25 150 12550 100 75 ID =3A Junction temperature Tj (˚C) Avalanche energy capacity EAS (mJ ) 1 3 10 30 100 0.01 0.1 0.03 0.3 3 ID TC =25˚C 22.5mJ L-load (mH ) Avalanche current IAS (A) 06 0 504010 30 20 3.5V 2.5V 15W VGS =10V Drain to source voltage VDS (V) Drain current ID (A) 06 5413 2 VDS =10V TC =25˚C Gate to source voltage VGS (V) Drain current ID (A) 0 160 40 120 80 14020 100 60 (1) TC =Ta (2) With a 50 · 50 · 2mm Al heat sink (3) Without heat sink (1) (2) (3) Ambient temperature Ta (˚C) Allowable power dissipation PD (W ) 600 500 400 300 200 100 TC =25˚C 10V VGS =4V Drain current ID (A) Drain to source ON-resistance RDS(on) (W ) 0 150 12510025 75 50 VDS =10V ID =1mA Case temperature TC (˚C) Gate threshold voltage Vth (V)

Power Transistor Arrays (F-MOS FETs) C iss, Coss, Crss ¾ VDS V DS , VGS ¾ Qg ton, tf, td(off) ¾ ID PZSM ¾ tp 0 100 8020 60 40 102 103 104 C iss C oss C rss f=1MHz TC =25˚C Drain to source voltage VDS (V) Input capacitance (Common source), Output capacitance (Common source), Reverse transfer capacitance (Common source) Ciss,Coss,Crss (pF) 01 2 10826 4 VDS =25V 50V ID =3A TC =25˚C VGS VDS Gate to source voltage VGS (V) Gate charge amount Qg (nC ) Drain to source voltage VDS (V) 4.0 3.0 1.0 2.5 3.5 2.0 0.5 1.5 VDD =50V VGS =10V TC =25˚C td(off) tf ton Drain current ID (A) Switching time ton,tf,td(off) (ms) 0.1 1 10 1000.3 3 30 100 300 1000 3000 10000 tp Pulse width tp (ms ) Zener diode power PZSM (W ) PU7457