PTRA083818NF

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Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 10

Technical content

Features

• Broadband internal input matching
• Asymmetrical Doherty design - Main : P1dB = 165 W Typ - Peak : P1dB = 250 W Typ
• Typical Pulsed CW performance, 805 MHz, 48 V, combined outputs - Output power at P1dB = 275 W - Efficiency = 59.6% - Gain = 18.6 dB
• Capable of handling 10:1 VSWR @ 48 V, 81.3 W CW output power
• Integrated ESD protection
• Human Body Model class 1C (per ANSI/ESDA/ JEDEC JS-001)
• Low thermal resistance
• Pb-free and RoHS compliant

Description

The PTRA083818NF is a 275-watt LDMOS FET intended for use in multi-standard cellular power amplifier applications in the 733 to 805 MHz frequency band. Features include input matching, high gain and thermally-enhanced package with earless flanges. Manufactured with Infineon's advanced LDMOS process, this device provides excellent thermal performance and superior reliability. RF Characteristics Single-carrier WCDMA Specifications (tested in Infineon Doherty production test fixture) VDD = 48 V, IDQ = 200 mA, VGS(PEAK) = 2.0 V, POUT = 81.3 W avg, ƒ = 805 MHz, 3GPP signal, channel bandwidth = 3.84 MHz, peak/average = 10 dB @ 0.01% CCDF Characteristic Symbol Min Typ Max Unit Linear Gain Gps 17.2 18 — dB Drain Efficiency hD 53 56 — % Adjacent Channel Power Ratio ACPR — –27.3 –24 dBc Output PAR @ 0.01% CCDF OPAR 5.5 6.3 — dB -60 -40 -20 25 30 35 40 45 50 55 Efficiency (%) Peak/Average Ratio, Gain (dB) Average Output Power (dBm) Single-carrier WCDMA Drive-up VDD = 48 V, IDQ(MAIN) = 200 mA, VGS(PEAK) = 2.0 V, ƒ = 805 MHz, 3GPP WCDMA signal, PAR = 10 dB,

3.84 MHz BW

PAR @ 0.01% CCDF ptra083818nf_g1

Data Sheet 2 of 10 Rev. 05.1, 2017-03-30 DC Characteristics Characteristic Conditions Symbol Min Typ Max Unit Drain-Source Breakdown Voltage VGS = 0 V, IDS = 10 mA V(BR)DSS 105 — — V Drain Leakage Current VDS = 48 V, VGS = 0 V IDSS — — 1 µA V DS = 105 V, VGS = 0 V IDSS — — 10 µA Gate Leakage Current VGS = 10 V, VDS = 0 V IGSS — — 1 µA On-State Resistance (Main) VGS = 10 V, VDS = 0.1 V RDS(on) — 0.12 — W On-State Resistance (Peak) VGS = 10 V, VDS = 0.1 V RDS(on) — 0.08 — W Operating Gate Voltage (Main) VDS = 48 V, IDQ = 0.20 A VGS 3 3.5 4 V Operating Gate Voltage (Peak) VDS = 48 V, IDQ = 0 mA VGS — 2 — V Maximum Ratings Parameter Symbol Value Unit Drain-Source Voltage VDSS 105 V Gate-Source Voltage VGS –6 to +12 V Operating Voltage VDD 0 to +55 V Junction Temperature TJ 225 °C Storage Temperature Range TSTG –65 to +150 °C Thermal Characteristics Parameter Symbol Value Unit Thermal Resistance (Main, TCASE = 70°C, 81.3 W CW) R qJC 0.53 °C/W

Ordering Information

Type and Version Order Code Package Description Shipping PTRA083818NF V1 R5 PTRA083818NFV1R5XUMA1 PG-HBSOF-6-2 Tape & Reel, 500

Data Sheet 3 of 10 Rev. 05.1, 2017-03-30 PTRA083818NF Typical RF Performance (data taken in production test fixture) -70 -60 -50 -40 -30 -20 -10 25 30 35 40 45 50 55 Efficiency (%) ACP Up & Low (dBc) Average Output Power (dBm) Single-carrier WCDMA Drive-up VDD = 48 V, IDQ(MAIN) = 200 mA, VGS(PEAK) = 2.0 V, ƒ = 805 MHz, 3GPP WCDMA signal, PAR = 10 dB, BW = 3.84 MHz ACPU ACPL Efficiency ptra083818nf_g2 -30 -25 -20 -15 -10 -35 -30 -25 -20 -15 -10 675 725 775 825 875 Return Loss (dB) ACPL & ACP Up (dBc) Frequency (MHz) Single-carrier WCDMA Broadband Performance VDD = 48 V, IDQ(MAIN) = 200 mA, VGS(PEAK) = 2.0 V, POUT = 49.1 dBm, 3GPP WCDMA signal, PAR = 10 dB ACPU ACPL IRL ptra083818nf_g4 675 725 775 825 875 Efficiency (%) Gain (dB) Frequency (MHz) Single-carrier WCDMA Broadband Performance VDD = 48 V, IDQ(MAIN) = 200 mA, VGS(PEAK) = 2.0 V, POUT = 49.1 dBm, 3GPP WCDMA signal, PAR = 10 dB Efficiency Gain ptra083818nf_g3 29 33 37 41 45 49 53 57 Efficiency (%) Gain (dB) Output Power (dBm) CW Performance VDD = 48 V, IDQ(MAIN) = 200 mA, VGS(PEAK) = 2.0 V ptra083818nf_g5 755MHz 780MHz 805MHz Gain Efficiency

Data Sheet 4 of 10 Rev. 05.1, 2017-03-30 Typical RF Performance (cont.) 29 33 37 41 45 49 53 57 Efficiency (%) Gain (dB) Output Power (dBm) CW Performance at various VDD IDQ(MAIN) = 200 mA, VGS(PEAK) = 2.0 V, ƒ = 805 MHz 44V 48V 52V ptra083818nfv_g6 Gain Efficiency -14 -13 -12 -11 -10 700 750 800 850 900 Input Return Loss (dB) Gain (dB) Frequency (MHz) CW Performance Small Signal Gain & Input Return Loss VDD = 48 V, IDQ(MAIN) = 200 mA, VGS(PEAK) = 2.0 V IRL Gain ptra083818nf_g7

Data Sheet 5 of 10 Rev. 05.1, 2017-03-30 PTRA083818NF Load Pull Performance Main Side Load Pull Performance – Pulsed CW signal: 10 µs, 10% duty cycle, 48 V, IDQ = 350 mA, class AB P1dB Max Output Power Main Drain Efficiency Freq [MHz] Zs [W] Zl [W] Gain [dB] P1dB [dBm] P1dB [W] hD [%] Zl [W] Gain [dB] P1dB [dBm] P1dB [W] hD [%] P3dB Max Output Power Main Drain Efficiency Freq [MHz] Zs [W] Zl [W] Gain [dB] P3dB [dBm] P3dB [W] hD [%] Zl [W] Gain [dB] P3dB [dBm] P3dB [W] hD [%] Peak Side Load Pull Performance – Pulsed CW signal: 10 µs, 10% duty cycle, 48 V, VGS(PEAK) = 2.2 V, class C P1dB Max Output Power Main Drain Efficiency Freq [MHz] Zs [W] Zl [W] Gain [dB] P1dB [dBm] P1dB [W] hD [%] Zl [W] Gain [dB] P1dB [dBm] P1dB [W] hD [%] P3dB Max Output Power Main Drain Efficiency Freq [MHz] Zs [W] Zl [W] Gain [dB] P3dB [dBm] P3dB [W] hD [%] Zl [W] Gain [dB] P3dB [dBm] P3dB [W] hD [%]

Data Sheet 6 of 10 Rev. 05.1, 2017-03-30 Reference Circuit, 733 – 805 MHz Reference circuit assembly diagram (not to scale) C218 C217 C216 C214 C215 C219 C211 C210 C212 C213 C201 C208C202 C207 C203 C209 C206C204 C205 C101 C112 C110 C109 R103 C108 C107 R102 C111 C106 C102 R101 C103 C105 C104 PTRA083818NF_IN_02 RO4360, 24 MIL RO4360, 24 MIL PTRA083818NF_OUT_02 (285) (285) VDD VDDVGS(PEAK) RF_IN RF_OUT VGS(MAIN)

Data Sheet 7 of 10 Rev. 05.1, 2017-03-30 PTRA083818NF Reference Circuit (cont.) Reference Circuit Assembly DUT PTRA083818NF V1 Test Fixture Part No. LTA/PTRA083818NF V1 PCB Rogers 4360, 0.609 mm [0.024”] thick, 2 oz. copper, εr = 6.4, ƒ = 733 – 805 MHz Find Gerber files for this test fixture on the Infineon Web site at http://www.infineon.com/rfpower Components Information Component Description Manufacturer P/N Input C101 Capacitor, 10 pF ATC ATC800A100JT250T C102 Capacitor, 5.6 pF ATC ATC800A5R6CT250T C103, C104, C108, C110 Capacitor, 82 pF ATC ATC800A820JT250T C105, C106, C111, C112 Capacitor, 2.2 µF TDK Corporation C4532X7R1H225M160KA C107 Capacitor, 20 pF ATC ATC800A200JT250T C109 Capacitor, 9.1 pF ATC ATC100B9R1CW500XB R101, R102 Resistor, 10 ohms Panasonic Electronic Components ERJ-3GEYJ100V R103 Resistor, 50 ohms Richardson C8A50Z4A U1 Hybrid Coupler Anaren X3C07P1-05S Output C201 Capacitor, 2.2 µF TDK Corporation C4532X7R1H225M160KA C202 Capacitor, 2.7 pF ATC ATC800A2R7CT250T C203, C214 Capacitor, 82 pF ATC ATC800A820JT250T C204, C215, C216, C217 Capacitor, 10 µF TDK Corporation C5750X5R1H106K230KA C205, C218 Capacitor, 1 µF TDK Corporation C4532X7R2A105M230KA C206 Capacitor, 100 µF United Chemi-Con EMVE101ARA101MKE0S C207, C210 Capacitor, 3.9 pF ATC ATC800A3R9CT250T C208 Capacitor, 12 pF ATC ATC100B120JW500XB C209 Capacitor, 5.6 pF ATC ATC800A5R6CT250T C211 Capacitor, 1.2 pF ATC ATC800A1R2CT250T C212 Capacitor, 6.8 pF ATC ATC800A6R8CT250T C213 Capacitor, 100 pF ATC ATC800A101JT250T C219 Capacitor, 100 µF Panasonic Electronic Components EEE-FP1V101AP Pinout Diagram Pin Description D1 Drain Device 1 (Main) D2 Drain Device 2 (Peak) G1 Gate Device 1 (Main) G2 Gate Device 2 (Peak) S Source (flange) V1 Drain video decoupling, no DC bias V2 NC or connected to GRD G1 G2 D2D1 Main PeakV1 V2

Data Sheet 8 of 10 Rev. 05.1, 2017-03-30 Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/rfpower Package Outline Specifications Package PG-HBSOF-6-2 (top view) 0.63ÊxÊ45 PG-HBSOF-6-2_prelim_08-30-20162ÊXÊ10 25.40 0.25 22.7ʱÊ0.15 2ÊXÊ7 0.52ÊXÊ1.00 G2 2ÊXÊ1.52 2ÊXÊ1.19 2ÊXÊ8.92 2ÊXÊ6.29 2ÊXÊ1.61 25.40 4ÊXÊ7.83 4.46 2ÊXÊ16.76 1.17 3.00 9.75 3.30Y 9.75 2ÊXÊ3.51 1.57ʱÊ0.10 5.40 VIEWÊY 2ÊXÊ0.5 21.3 23.26 24.4 0.05 3.02 2.70 0.75 7G2 G1 D2 D1 VV VV S PG-HBSOF-6-2_prelim_08-30-2016 Diagram Notes–unless otherwise specified: 1. Mold/dam bar/metal protusion of 0.30 mm max per side not included. 2. Metal protrusion are connected to source and shall not exceed 0.10 mm max. 3. Fillets and radii: all radii are 0.3 mm max. 4. Interpret dimensions and tolerances per ISO 8015. 5. Dimensions are mm. 6. Does not include mold/dam bar/metal protusion. 7. Exposed metal surface is tin-plated, may not be covered by mold compound. 8. All tolerances ± 0.1 mm unless specified otherwise. 9. All metal surfaces are tin-plated, except area of cut. 10. Lead thickness: 0.25 mm. 11. Pins: D1, D2 – drain; G1, G2 – gate; S – source, V – VDD. Diagram Notes—unless otherwise specified: 1. Mold/dam bar/metal protrusion of 0.30 mm max per side not included. 2. Metal protrusion are connected to source and shall not exceed 0.10 mm max. 3. Fillets and radii: all radii are 0.3 mm max. 4. Interpret dimensions and tolerances per ISO 8015. 5. Dimensions are mm. 6. Does not include mold/dam bar and metal protrusion. 7. Exposed metal surface is tin-plated, may not be covered by mold compound. 8. All tolerances ± 0.1 mm unless specified otherwise. 9. All metal surfaces are tin-plated, except area of cut. 10. Lead thickness: 0.25 mm. 11. Pins: D1, D2 = drain; G1, G2 = gate; S = sourec, V1, V2 = no DC bias, NC or connect to GRD V2V1 PG-HBSOF-6-2_2017-01-112 X 10°

2 X 7°

0.63 x 45° Diagram Notes—unless otherwise specified: 1. Mold/dam bar/metal protrusion of 0.30 mm max per side not included. 2. Metal protrusions are connected to source and shall not exceed 0.10 mm max. 3. Fillets and radii: all radii are 0.3 mm max. 4. Interpret dimensions and tolerances per ISO 8015. 5. Dimensions are mm. 6. Does not include mold/dam bar and metal protrusion. 7. Exposed metal surface is tin-plated, may not be covered by mold compound. 8. All tolerances ± 0.1 mm unless specified otherwise. 9. All metal surfaces are tin-plated, except area of cut. 10. Lead thickness: 0.25 mm. 11. Pins: D1, D2 = drain; G1, G2 = gate; S = source, V1, V2 = no DC bias, NC or connect to GRD V2V1 2x 7° 0.63x 45° 2x 1.00 2x 1.19 2x 8.92 2x 6.29 2x 1.61 2x 3.51 2x 16.76 2x 1.52 1.57 11. Pins: D1, D2 = drain; G1, G2 = gate; S = source; V1 = drain video decoupling, no DC Bias, V2 = NC or connected to GRD

Data Sheet 9 of 10 Rev. 05.1, 2017-03-30 PTRA083818NF Package Outline Specifications (cont.) Package PG-HBSOF-6-2 (bottom view) Find the latest and most complete information about products and packaging at the Infineon Internet page www.infineon.com/rfpower 2x 0.50 0.05 2.700.75 5.40 3.02 23.26 24.40 2 2 Diagram Notes—unless otherwise specified: 1. Mold/dam bar/metal protrusion of 0.30 mm max per side not included. 2. Metal protrusions are connected to source and shall not exceed 0.10 mm max. 3. Fillets and radii: all radii are 0.3 mm max. 4. Interpret dimensions and tolerances per ISO 8015. 5. Dimensions are mm. 6. Does not include mold/dam bar and metal protrusion. 7. Exposed metal surface is tin-plated, may not be covered by mold compound. 8. All tolerances ± 0.1 mm unless specified otherwise. 9. All metal surfaces are tin-plated, except area of cut. 10. Lead thickness: 0.25 mm. 11. Pins: D1, D2 = drain; G1, G2 = gate; S = source, V1, V2 = no DC bias, NC or connect to GRD V2 V1 PG-HBSOF-6-2_02.1_01-17-2017 D2 D1 G2 G1 11. Pins: D1, D2 = drain; G1, G2 = gate; S = source; V1 = drain video decoupling, no DC Bias, V2 = NC or connected to GRD 2x 0.50 0.05 2.700.75 5.40 3.02 23.26 24.40 2 2 Diagram Notes—unless otherwise specified: 1. Mold/dam bar/metal protrusion of 0.30 mm max per side not included. 2. Metal protrusions are connected to source and shall not exceed 0.10 mm max. 3. Fillets and radii: all radii are 0.3 mm max. 4. Interpret dimensions and tolerances per ISO 8015. 5. Dimensions are mm. 6. Does not include mold/dam bar and metal protrusion. 7. Exposed metal surface is tin-plated, may not be covered by mold compound. 8. All tolerances ± 0.1 mm unless specified otherwise. 9. All metal surfaces are tin-plated, except area of cut. 10. Lead thickness: 0.25 mm. 11. Pins: D1, D2 = drain; G1, G2 = gate; S = source, V1, V2 = no DC bias, NC or connect to GRD V2 V1 PG-HBSOF-6-2_02.1_01-17-2017 D2 D1 G2 G1

Revision History

Revision Date Data Sheet Type Page Subjects (major changes since last revision) 01 2016-05-04 Advance All Data Sheet reflects advance specification for product development 02 2016-08-22 Advance All Revised package (3D rendering, package number and package outline) 03 2016-09-15 Advance 1, 2 Revised RF Characteristics, DC Characteristics 04 2016-12-21 Production All Data Sheet reflects released product specification 05 2017-02-01 Production 2 8, 9 Updated Thermal Characteristics, Maximum Ratings Updated Package Outline 05.1 2017-03-30 Production 3, 4 Updated RF Characteristics table to include OPAR Fixed missing labels on CW performance graphs We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Y our feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: highpowerRF@infineon.com To request other information, contact us at: +1 877 465 3667 (1-877-GO-LDMOS) USA or +1 408 776 0600 International Edition 2017-03-30 Published by Infineon Technologies AG

85579 Neubiberg, Germany

© 2016 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com/rfpower). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of In- fineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Data Sheet 10 of 10 Rev. 05.1, 2017-03-30