DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 10

Technical content

Features

  • Broadband internal input and output matching
  • Asymmetrical design - Main : P1dB = 115 W Typ - Peak : P1dB = 165 W Typ
  • Typical Pulsed CW performance, 820 MHz, 48 V, Doherty configuration - Output power at P3dB = 250 W - Efficiency = 55.6 % - Gain = 16.2 dB
  • Capable of handling 10:1 VSWR @ 48 V, 56.2 W (CW) output power
  • Human Body Model Class 1C (per ANSI/ESDA/ JEDEC JS-001)
  • Integrated ESD protection
  • Low thermal resistance
  • Pb-free and RoHS compliant-80 -60 -40 -20 25 30 35 40 45 50 55 Efficiency (%) Peak/Average Ratio, Gain (dB) Average Output Power (dBm) Single-carrier WCDMA Drive-up VDD = 48 V, IDQ(MAIN) = 200 mA, VGS(PEAK) = 1.0 V, ƒ = 820 MHz, 3GPP WCDMA signal, PAR = 10 dB,

3.84 MHz BW

PAR @ 0.01% CCDF ptra082808nf_g1

Data Sheet 2 of 10 Rev. 04.1, 2018-01-30 PTRA082808NF DC Characteristics (each side) Characteristic Conditions Symbol Min Typ Max Unit Drain-Source Breakdown Voltage VGS = 0 V, IDS = 10 mA V(BR)DSS 105 — — V Drain Leakage Current VDS = 50 V, VGS = 0 V IDSS — — 1 µA VDS = 105 V, VGS = 0 V IDSS — — 10 µA Gate Leakage Current VGS = 10 V, VDS = 0 V IGSS — — 1 µA On-State Resistance (Main) VGS = 10 V, VDS = 0.1 V RDS(on) — 0.3 — W (Peak) VGS = 10 V, VDS = 0.1 V RDS(on) — 0.12 — W (Peak) VDS = 1.0 V, IDQ = 0 A VGS — 1 — V Maximum Ratings Parameter Symbol Value Unit Drain-Source Voltage VDSS 105 V Gate-Source Voltage VGS –6 to +12 V Operating Voltage VDD 0 to +55 V Junction Temperature TJ 225 °C Storage Temperature Range TSTG –65 to +150 °C Thermal Characteristics Parameter Symbol Value Unit Thermal Resistance (Main, TCASE = 70°C, 56.2 W CW) RqJC 0.766 °C/W (Peak,TCASE = 70°C, 200 W CW) RqJC 0.208 °C/W

Ordering Information

Type and Version Order Code Package Description Shipping PTRA082808NF V1 R5 PTRA082808NFV1R5XUMA1 PG-HBSOF-6-2 Tape & Reel, 500 pcs

Data Sheet 3 of 10 Rev. 04.1, 2018-01-30 Typical Performance (data taken in a production test fixture) -60 -50 -40 -30 -20 -10 27 32 37 42 47 52 Efficiency (%) ACP Up & Low (dBc) Average Output Power (dBm) Single-carrier WCDMA Drive-up VDD = 48 V, IDQ(MAIN) = 200 mA, VGS(PEAK) = 1.0 V, ƒ = 820 MHz, 3GPP WCDMA signal, PAR = 10 dB, BW = 3.84 MHz ACPU ACPL Efficiency ptra082808nf_g2 -35 -30 -25 -20 -15 -10 -40 -35 -30 -25 -20 -15 -10 675 725 775 825 875 925 Return Loss (dB) ACPL & ACP Up (dBc) Frequency (MHz) Single-carrier WCDMA Broadband Performance VDD = 48 V, IDQ(MAIN) = 200 mA, VGS(PEAK) = 1.0 V, POUT = 47.5 dBm, 3GPP WCDMA signal, PAR = 10 dB ACPU ACPL IRL ptra082808nf_g4 675 725 775 825 875 925 Efficiency (%) Gain (dB) Frequency (MHz) Single-carrier WCDMA Broadband Performance VDD = 48 V, IDQ(MAIN) = 200 mA, VGS(PEAK) = 1.0 V, POUT = 47.5 dBm, 3GPP WCDMA signal, PAR = 10 dB Efficiency Gain ptra082808nf_g3 29 33 37 41 45 49 53 57 Efficiency (%) Gain (dB) Output Power (dBm) CW Performance VDD = 48 V, IDQ(MAIN) = 200 mA, VGS(PEAK) = 1.0 V ptra082808nf_g5 790MHz 805MHz 820MHz efficiency Gain

Data Sheet 4 of 10 Rev. 04.1, 2018-01-30 PTRA082808NF Typical Performance (cont.) -35 -30 -25 -20 -15 -10 725 775 825 875 Input Return Loss (dB) Gain (dB) Frequency (MHz) CW Performance Small Signal Gain & Input Return Loss VDD = 48 V, IDQ(MAIN) = 200 mA, VGS(PEAK) = 1.0 V IRL Gain ptra082808nf_g7 0 29 33 37 41 45 49 53 57 Efficiency (%) Gain (dB) Output Power (dBm) CW Performance at various VDD IDQ(MAIN) = 200 mA, VGS(PEAK) = 1.0 V, ƒ = 820 MHz 44V 48V 52V ptra082808nf_g6 Efficiency Gain

Data Sheet 5 of 10 Rev. 04.1, 2018-01-30 Load Pull Performance Main Side Load Pull Performance – Pulsed CW signal: 10 µs, 10% duty cycle, 48 V, IDQ = 250 mA P1dB Max Output Power Max Drain Efficiency Freq [MHz] Zs [W] Zl [W] Gain [dB] P1dB [dBm] P1dB [W] hD [%] Zl [W] Gain [dB] P1dB [dBm] P1dB [W] hD [%] P3dB Max Output Power Max Drain Efficiency Freq [MHz] Zs [W] Zl [W] Gain [dB] P3dB [dBm] P3dB [W] hD [%] Zl [W] Gain [dB] P3dB [dBm] P3dB [W] hD [%] Peak Side Load Pull Performance – Pulsed CW signal: 10 µs, 10% duty cycle, 48 V, IDQ = 350 mA P1dB Max Output Power Max Drain Efficiency Freq [MHz] Zs [W] Zl [W] Gain [dB] P1dB [dBm] P1dB [W] hD [%] Zl [W] Gain [dB] P1dB [dBm] P1dB [W] hD [%] P3dB Max Output Power Max Drain Efficiency Freq [MHz] Zs [W] Zl [W] Gain [dB] P3dB [dBm] P3dB [W] hD [%] Zl [W] Gain [dB] P3dB [dBm] P3dB [W] hD [%]

Data Sheet 6 of 10 Rev. 04.1, 2018-01-30 PTRA082808NF Reference Circuit , 790 – 820 MHz Reference circuit assembly diagram (not to scale) C203 C212 C214 C215 C211 C210 C209C208 C202 C207 C201 C204 C205 R102 C110 R103 R101 C109 C105 C104 C103 C108 C101 C102 C107 C106 RO3006, 25 MIL (272) RO3006, 25 MIL (272) PTRA082808NF_IN_03 PTRA082808NF_OUT_03 RF_OUTRF_IN VDD VDD VGS(MAIN) VGS(PEAK) R105 R104 C206 C213

Data Sheet 7 of 10 Rev. 04.1, 2018-01-30 Reference Circuit (cont.) Reference Circuit Assembly DUT PTRA082808NF V1 Test Fixture Part No. LTA/PTRA082808NF V1 PCB Rogers 3006, 0.635 mm [0.025”] thick, 2 oz. copper, εr = 3.66, ƒ = 790 – 820 MHz Find Gerber files for this test fixture on the Infineon Web site at http://www.infineon.com/rfpower Components Information Component Description Manufacturer P/N Input C101, C102 Capacitor, 5.6 pF ATC ATC800A5R6CT250T C103, C104, C108, C109 Capacitor, 56 pF ATC ATC800A560JT250T C105, C110 Capacitor, 10 µF TDK Corporation C5750X5R1H106K230KA C106 Capacitor, 10 pF ATC ATC800A100JT250T C107 Capacitor, 1.5 pF ATC ATC800A1R5CT250T R101, R102 Resistor, 10 ohms Panasonic Electronic Components ERJ-8GEYJ100V R103 Resistor, 50 ohms ANAREN C8A50Z4A R104, R105 Resistor, 1000 ohms Panasonic Electronic Components ERJ-8GEYJ102V U1 Hybrid Coupler ANAREN X3C07P1-05S Output C201 Capacitor, 3.0 pF ATC ATC800A3R0CT250T C202 Capacitor, 15 pF ATC ATC800A150JT250T C203, C210, C212 Capacitor, 82 pF ATC ATC800A820JT250T C204, C205, C206, C213, C214, C215 Capacitor, 10 µF , 100V TDK Corporation C5750X7S2A106M230KB C207 Capacitor, 6.8 pF ATC ATC800A6R8CT250T C208 Capacitor, 3.9 pF ATC ATC800A3R9CT250T C209 Capacitor, 2.2 pF ATC ATC800A2R2CT250T C211 Capacitor, 10 pF ATC ATC800A100JT250T Pinout Diagram (top view) Pin Description D1 Drain Device 1 (Main) D2 Drain Device 2 (Peak) G1 Gate Device 1 (Main) G2 Gate Device 2 (Peak) S Source (flange) V1, V2 Drain video decoupling, no DC bias Main Peak G1 G2 D2D1 V1 V2

Data Sheet 8 of 10 Rev. 04.1, 2018-01-30 PTRA082808NF Package Outline Specifications Package PG-HBSOF-6-2 (top view) 0.63ÊxÊ45 PG-HBSOF-6-2_prelim_08-30-20162ÊXÊ10 25.40 0.25 22.7ʱÊ0.15 2ÊXÊ7 0.52ÊXÊ1.00 G2 2ÊXÊ1.52 2ÊXÊ1.19 2ÊXÊ8.92 2ÊXÊ6.29 2ÊXÊ1.61 25.40 4ÊXÊ7.83 4.46 2ÊXÊ16.76 1.17 3.00 9.75 3.30Y 9.75 2ÊXÊ3.51 1.57ʱÊ0.10 5.40 VIEWÊY 2ÊXÊ0.5 21.3 23.26 24.4 0.05 3.02 2.70 0.75 7G2 G1 D2 D1 VV VV S PG-HBSOF-6-2_prelim_08-30-2016 Diagram Notes–unless otherwise specified: 1. Mold/dam bar/metal protusion of 0.30 mm max per side not included. 2. Metal protrusion are connected to source and shall not exceed 0.10 mm max. 3. Fillets and radii: all radii are 0.3 mm max. 4. Interpret dimensions and tolerances per ISO 8015. 5. Dimensions are mm. 6. Does not include mold/dam bar/metal protusion. 7. Exposed metal surface is tin-plated, may not be covered by mold compound. 8. All tolerances ± 0.1 mm unless specified otherwise. 9. All metal surfaces are tin-plated, except area of cut. 10. Lead thickness: 0.25 mm. 11. Pins: D1, D2 – drain; G1, G2 – gate; S – source, V – VDD. Diagram Notes—unless otherwise specified: 1. Mold/dam bar/metal protrusion of 0.30 mm max per side not included. 2. Metal protrusion are connected to source and shall not exceed 0.10 mm max. 3. Fillets and radii: all radii are 0.3 mm max. 4. Interpret dimensions and tolerances per ISO 8015. 5. Dimensions are mm. 6. Does not include mold/dam bar and metal protrusion. 7. Exposed metal surface is tin-plated, may not be covered by mold compound. 8. All tolerances ± 0.1 mm unless specified otherwise. 9. All metal surfaces are tin-plated, except area of cut. 10. Lead thickness: 0.25 mm. 11. Pins: D1, D2 = drain; G1, G2 = gate; S = sourec, V1, V2 = no DC bias, NC or connect to GRD V2V1 PG-HBSOF-6-2_2017-01-112 X 10°

2 X 7°

0.63 x 45° Diagram Notes—unless otherwise specified: 1. Mold/dam bar/metal protrusion of 0.30 mm max per side not included. 2. Metal protrusions are connected to source and shall not exceed 0.10 mm max. 3. Fillets and radii: all radii are 0.3 mm max. 4. Interpret dimensions and tolerances per ISO 8015. 5. Dimensions are mm. 6. Does not include mold/dam bar and metal protrusion. 7. Exposed metal surface is tin-plated, may not be covered by mold compound. 8. All tolerances ± 0.1 mm unless specified otherwise. 9. All metal surfaces are tin-plated, except area of cut. 10. Lead thickness: 0.25 mm. 11. Pins: D1, D2 = drain; G1, G2 = gate; S = source, V1, V2 = no DC bias, NC or connect to GRD V2V1 2x 7° 0.63x 45° 2x 1.00 2x 1.19 2x 8.92 2x 6.29 2x 1.61 2x 3.51 2x 16.76 2x 1.52 1.57 Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/rfpower 11. Pins: D1, D2 = drain; G1, G2 = gate; V1, V2 = drain video decoupling, no DC bias

Data Sheet 9 of 10 Rev. 04.1, 2018-01-30 Package Outline Specifications (cont.) Package PG-HBSOF-6-2 (bottom view) Find the latest and most complete information about products and packaging at the Infineon Internet page www.infineon.com/rfpower 2x 0.50 0.05 2.700.75 5.40 3.02 23.26 24.40 2 2 Diagram Notes—unless otherwise specified: 1. Mold/dam bar/metal protrusion of 0.30 mm max per side not included. 2. Metal protrusions are connected to source and shall not exceed 0.10 mm max. 3. Fillets and radii: all radii are 0.3 mm max. 4. Interpret dimensions and tolerances per ISO 8015. 5. Dimensions are mm. 6. Does not include mold/dam bar and metal protrusion. 7. Exposed metal surface is tin-plated, may not be covered by mold compound. 8. All tolerances ± 0.1 mm unless specified otherwise. 9. All metal surfaces are tin-plated, except area of cut. 10. Lead thickness: 0.25 mm. 11. Pins: D1, D2 = drain; G1, G2 = gate; S = source, V1, V2 = no DC bias, NC or connect to GRD V2 V1 PG-HBSOF-6-2_02.1_01-17-2017 D2 D1 G2 G1 11. Pins: D1, D2 = drain; G1, G2 = gate; V1, V2 = drain video decoupling, no DC bias

Data Sheet 10 of 10 Rev. 04.1, 2018-01-30 We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Y our feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: (highpowerRF@infineon.com) To request other information, contact us at: +1 877 465 3667 (1-877-GO-LDMOS) USA or +1 408 776 0600 International Edition 2018-01-30 Published by Infineon Technologies AG

85579 Neubiberg, Germany

© 2016 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com/rfpower). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of In- fineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. PTRA082808NF V1

Revision History

Revision Date Data Sheet Type Page Subjects (major changes since last revision) 01 2016-05-18 Advance All Data Sheet reflects advance specification for product development 01.1 2016-09-06 Advance 1 Revised frequency range 02 2016-11-01 Advance 2 3,4 Revised pinout diagram Revised package outline 03 2016-11-04 Production All Data Sheet reflects released product specification 03.1 2016-12-07 Production 1 Revised Maximum Ratings table 03.2 2017-01-12 Production 8, 9 Revised typo in package outline 03.3 2017-03-30 Production 1 3, 4 Updated RF Characteristics table Fixed missing labels on CW performance graphs 04 2017-08-21 Production 6, 7 Updated PCB layout and components information 04.1 2017-01-30 Production 1, 2 Corrected unit for OPAR. Corrected Operating gate voltage for main and peak sides. anita hung mike lu