PTFA181001E INFINEON | Alldatasheet

Document overview

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  • PDF pages: 11

Technical content

Features

  • Thermally-enhanced packages
  • Broadband internal matching
  • Typical EDGE performance at 1879.8 MHz, 28 V - Average output power = 45 W - Linear Gain = 16.5 dB - Efficiency = 36% - EVM RMS = 1.8%
  • Typical CW performance, 1880 MHz, 28 V - Output power at P–1dB = 120 W - Gain 15.5 dB - Efficiency = 52%
  • Integrated ESD protection: Human Body Model, Class 2 (minimum)
  • Excellent thermal stability, low HCI drift
  • Capable of handling 10:1 VSWR @ 28 V,

100 W (CW) output power

  • Pb-free and RoHS compliant *See Infineon distributor for future availability.

Data Sheet 2 of 11 Rev. 02.1, 2009-02-20 RF Characteristics (cont.) Two-tone Measurements (tested in Infineon test fixture) VDD = 28 V, IDQ = 750 mA, POUT = 100 W PEP, ƒ = 1850 MHz, tone spacing = 1 MHz Characteristic Symbol Min Typ Max Unit Gain Gps 16 16.5 — dB Drain Efficiency η D 39 41 — % Intermodulation Distortion IMD — –30 –28 dBc DC Characteristics Characteristic Conditions Symbol Min Typ Max Unit Drain-Source Breakdown Voltage VGS = 0 V, IDS = 10 mA V(BR)DSS 65 — — V Drain Leakage Current VDS = 28 V, VGS = 0 V IDSS — — 1.0 µA VDS = 63 V, VGS = 0 V IDSS — — 10.0 µA On-State Resistance VGS = 10 V, VDS = 0.1 V RDS(on) — 0.85 — Ω Operating Gate Voltage VDS = 28 V, ID = 750 mA VGS 2.0 2.5 3.0 V Gate Leakage Current VGS = 10 V, VDS = 0 V IGSS — — 1.0 µA Maximum Ratings Parameter Symbol Value Unit Drain-Source Voltage VDSS 65 V Gate-Source Voltage VGS –0.5 to +12 V Junction Temperature TJ 200 °C Total Device Dissipation PD 407 W Above 25°C derate by 2.33 W/°C Storage Temperature Range TSTG –40 to +150 °C Thermal Resistance (TCASE = 70°C, 100 W CW) Rθ JC 0.43 °C/W

Ordering Information

Type and Version Package Type Package Description Marking PTFA181001E V4 H-36248-2 Thermally-enhanced slotted flange, single-ended PTFA181001E PTFA181001F V4 H-37248-2 Thermally-enhanced earless flange, single-ended PTFA181001F *See Infineon distributor for future availability.

Data Sheet 3 of 11 Rev. 02.1, 2009-02-20 Edge EVM and Modulation Spectrum vs. Quiescent Current VDD = 28 V, ƒ = 1879.8 MHz, POUT = 46.5 dBm 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 Quiescent Current (A) EVM RMS (avg. %) . -90 -80 -70 -60 -50 -40 -30 -20 -10 Modulation Spectrum (dBc) EVM 400 kHz 600 kHz EDGE Modulation Spectrum Performance VDD = 28 V, IDQ = 750 mA, ƒ = 1879.8 MHz -100 -80 -60 -40 -20 37 39 41 43 45 47 49 Output Power (dBm) Modulation Spectrum (dBc) Drain Efficiency (%) Efficiency 400 kHz 600 kHz Typical Performance (data taken in a production test fixture) Intermodulation Distortion vs. Output Power (as measured in a broadband circuit) VDD = 28 V, IDQ = 750 mA, ƒ 1 = 1879 MHz, ƒ 2 = 1880 MHz -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 37 39 41 43 45 47 49 Output Power, Avg. (dBm) IMD (dBc) 3rd Order 7th 5th EDGE EVM Performance VDD = 28 V, IDQ = 750 mA, ƒ = 1879.8 MHz 37 39 41 43 45 47 49 Output Power (dBm) EVM RMS (avg. %) . Drain Efficiency (%) EVM Efficiency

Data Sheet 4 of 11 Rev. 02.1, 2009-02-20 Linear Broadband Performance VDD = 28 V, IDQ = 750 mA, POUT Avg = 47 dBm 1805 1818 1831 1844 1857 1870 1883 Frequency (MHz) Efficiency (%) -30 -20 -10 Gain, Return Loss (dB) Gain Return Loss Efficiency Power Sweep VDD = 28 V, ƒ = 1880 MHz 14.0 14.5 15.0 15.5 16.0 16.5 17.0 17.5 36 38 40 42 44 46 48 50 52 Output Power (dBm) Power Gain (dB) IDQ = 1125 mA IDQ = 375 mA IDQ = 750 mA IM3 vs. Output Power at Selected Biases VDD = 28 V, ƒ 1 = 1879, ƒ 2 = 1880 MHz -60 -55 -50 -45 -40 -35 -30 -25 -20 37 39 41 43 45 47 49 Output Power, Avg. (dBm) IMD (dBc) IDQ = 1125 mA IDQ = 375 mA IDQ = 750 mA Broadband CW Performance (at P-1dB) VDD = 28 V, IDQ = 750 mA 1805 1818 1831 1844 1857 1870 1883 Frequency (MHz) Gain (dB) Efficiency (%), Output Power (dBm) Output Power Efficiency Gain Typical Performance (cont.)

Data Sheet 5 of 11 Rev. 02.1, 2009-02-20 IS-95 CDMA Performance VDD = 28 V, IDQ = 750 mA, ƒ = 1880 MHz 33 35 37 39 41 43 45 47 Output Power, Avg. (dBm) Drain Efficiency (%) -80 -70 -60 -50 -40 -30 -20 -10 Adj. Ch. Power Ratio (dBc) Efficiency TCASE = 25°C TCASE = 90°C ACP FC – 0.75 MHz ACPR FC + 1.98 MHz Bias Voltage vs. Temperature Voltage normalized to typical gate voltage, series show current 0.95 0.96 0.97 0.98 0.99 1.00 1.01 1.02 1.03 -20 0 20 40 60 80 100 Case Temperature (°C) Normalized Bias Voltage (V) 0.15 A 0.44 A 0.73 A 1.10 A 2.20 A 3.30 A 4.41 A 5.51 A Output Power (P–1dB) vs. Drain Voltage IDQ = 750 mA, ƒ = 1880 MHz 24 26 28 30 32 Drain Voltage (V) Output Power (dBm) Gain & Efficiency vs. Output Power VDD = 28 V, IDQ = 750 mA, ƒ = 1880 MHz 36 38 40 42 44 46 48 50 52 Output Power (dBm) Gain (dB) Drain Efficiency (%) Efficiency Gain Typical Performance (cont.)

Data Sheet 6 of 11 Rev. 02.1, 2009-02-20 Broadband Circuit Impedance Z Source Z Load G S D Frequency Z Source W Z Load W MHz R jX R jX 1805 4.62 –6.23 1.71 2.79 1830 4.18 –6.10 1.41 2.92 1850 4.20 –6.13 1.47 3.05 1860 4.58 –6.20 1.99 3.13 1880 4.42 –6.36 1.91 3.16 0.1 0.1 0.1 AVELENGTHS TOW ARD GENER <---W AVELENGTHS TOW ARD LOAD - 0.0

1880 MHz

1805 MHz

Z0 = 50 Ω Three-Carrier CDMA2000 Performance VDD = 28 V, IDQ = 750 mA, ƒ = 1880 MHz 33 35 37 39 41 43 45 47 Output Power, Avg. (dBm) Drain Efficiency (%) -75 -70 -65 -60 -55 -50 -45 -40 -35 Adj. Ch. Power Ratio (dBc)ACP Low ACP Up ALT Up Efficiency Typical Performance (cont.)

Data Sheet 7 of 11 Rev. 02.1, 2009-02-20 Reference Circuit Reference circuit schematic for ƒ = 1880 MHz Circuit Assembly Information DUT PTFA181001E or PTFA181001F LDMOS Transistor PCB 0.76 mm [.030"] thick, εr = 4.5 Rogers TMM4 2 oz. copper Microstrip Electrical Characteristics at 1880 MHz1 Dimensions: L x W (mm) Dimensions: L x W (in.) 1Electrical characteristics are rounded. RF_IN a181001ef_sch_06-04-18 RF_OUT 2KV 0.001µF 0.001µF BCP56 1.3K V QQ1 LM7805 0.001µF VDD 10 V 2K V 1.2K V 10pF 10 V DUT 1µF 0.1µF 10µF 35V 0.01µF 2KV 10pF 5.1K V C10 0.6pF l2 l3 l6 l7 5.1K V C22 1.5pF C21 1.5pF C24 10pF C23 0.6pF l10 l11 l12 l13 l14 l15 VDD C11 1µF C13 1µF C12 10pF C14 10µF 50V C15 10µF 50V C16 1µF C18 1µF C17 10pF C19 10µF 50V C20 10µF 50V

Data Sheet 8 of 11 Rev. 02.1, 2009-02-20 Reference circuit assembly diagram (not to scale) Reference Circuit (cont.) Component Description Suggested Manufacturer P/N or Comment C1, C2, C3 Capacitor, 0.001 µF Digi-Key PCC1772CT-ND C4 Tantalum capacitor, 10 µF, 35 V Digi-Key 399-1655-2-ND C5 Capacitor, 0.1 µF Digi-Key PCC104BCT-ND C6, C11, C13, C16, C18 Capacitor, 1.0 µF ATC 920C105 C7 Capacitor, 0.01 µF ATC 200B 103 C8, C9, C12, C17, C24 Ceramic capacitor, 10 pF ATC 100B 100 C10, C23 Ceramic capacitor, 0.6 pF ATC 100B 0R6 C14, C15, C19, C20 Tantalum capacitor, 10 µF, 50 V Garrett Electronics TPSE106K050R0400 C21, C22 Ceramic capacitor, 1.5 pF ATC 100B 1R5 L1, L2 Ferrite, 8.9 mm Elna Magnetics BDS 4.6/3/8.9-4S2 Q1 Transistor Infineon Technologies BCP56 QQ1 Voltage regulator National Semiconductor LM7805 R1 Chip Resistor 1.2 k-ohms Digi-Key P1.2KGCT-ND R2 Chip Resistor 1.3 k-ohms Digi-Key P1.3KGCT-ND R3, R8 Chip Resistor 2 k-ohms Digi-Key P2KECT-ND R4 Potentiometer 2 k-ohms Digi-Key 3224W-202ETR-ND R5, R9 Chip Resistor 10 ohms Digi-Key P10ECT-ND R6, R7 Chip Resistor 5.1 k-ohms Digi-Key P5.1KECT-ND Gerber files for this circuit available on request QQ1 C2R1 C10 R7 C6 C8C7 C16 C17 C18 C19 C20 C13 C14 C15 C11 C12 C24 C23 C21 C22 A181001_01 VDD VDD VDD a181001ef_assy a181001ef_dtl QQ1 C2R1 R7 C6 C8C7 VDD

Data Sheet 9 of 11 Rev. 02.1, 2009-02-20 Package Outline Specifications Package H-36248-2 Diagram Notes—unless otherwise specified: 2. All tolerances ± 0.127 [.005] unless specified otherwise. 3. Pins: D = drain, S = source, G = gate. 4. Interpret dimensions and tolerances per ASME Y14.5M-1994. 5. Primary dimensions are mm. Alternate dimensions are inches. 6. Gold plating thickness: S, D, G - flange & leads: 1.14 ± 0.38 micron [45 ± 15 microinch] Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/products CL 34.04 [1.340] 19.81±0.20 [.780±.008] 1.02 [.040] 19.43 ±0.51 [.765±.020] (45° X 2.72 [.107]) 2X 12.70 [.500] 4.83±0.51 [.190±.020] 27.94 [1.100] 4X R1.52 [R.060] 2X R1.63 [R.064] D G S FLANGE 9.78 [.385] CL CL 3.61±0.38 [.142±.015] SPH 1.57 [.062] [.370 ]+.004 –.006 LID 9.40+0.10 –0.15

Data Sheet 10 of 11 Rev. 02.1, 2009-02-20 Package Outline Specifications (cont.) Package H-37248-2 Diagram Notes—unless otherwise specified: 2. All tolerances ± 0.127 [.005] unless specified otherwise. 3. Pins: D = drain, S = source, G = gate. 4. Interpret dimensions and tolerances per ASME Y14.5M-1994. 5. Primary dimensions are mm. Alternate dimensions are inches. 6. Gold plating thickness: S, D, G - flange & leads: 1.14 ± 0.38 micron [45 ± 15 microinch] Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/products CL 0.0381 [.0015] 2X 12.70 [.500] 19.43±0.51 [.765±.020] 19.81±0.20 [.780±.008] SPH 1.57 [.062] FLANGE 9.78 [.385] S G D ( 45° X 2.72 [.107]) 20.57 [.810] -A- 3.61±0.38 [.142±.015] 1.02 [.040] 4.83±0.51 [.190±.020] CL CL [R.020 ]+.015 –.005 4X R0.508 +0.381–0.127 LID 9.40 +0.10 –0.15 [.370 ]+.004 –.006 071117_h-37248-2_po

Data Sheet 11 of 11 Rev. 02.1, 2009-02-20 PTFA181001E/F Confidential, Limited Internal Distribution Revision History: 2009-02-20 Data Sheet Previous Version: 2006-04-14, Data Sheet Page Subjects (major changes since last revision) 1, 2, 9, 10 Update to product V4, with new package technologies. Update package outline diagrams.

8 Fixed typing error

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81726 Munich, Germany

© 2009 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office ( www.infineon.com/rfpower ). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.