PSS20S51F6

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Publication Date : March 2014 < Dual-In-Line Package Intelligent Power Module > PSS20S51F6 / PSS20S51F6-C TRANSFER MOLDING TYPE INSULATED TYPE OUTLINE PSSxxS51F6 ( Short t erminal type) MAIN FUNCTION AND RATINGS  3 phase DC/AC inverter  600V / 20A (CSTBT)  N-side IGBT open emitter  Built-in bootstrap diodes with current limiting resistor APPLICATION  AC 100~240Vrms(DC voltage:400V or below) class low power motor control TYPE NAME PSS20S51F6 /-C With temperature output function -C : Control side zigzag terminal (none) : Short terminal INTEGRATED DRIVE, PROTECTION AND SYSTEM CONTROL FUNCTIONS

• For P-side : Drive circuit, High voltage high-speed level shifting, Control supply under-voltage (UV) protection
• For N-side : Drive circuit, Control supply under-voltage protection (UV), Short circuit protection (SC),
• Fault signaling : Corresponding to SC fault (N-side IGBT), UV fault (N-side supply)
• Temperature output : Outputting LVIC temperature by analog signal
• Input interface : 3, 5V line, Schmitt trigger receiver circuit (High Active)
• UL Recognized : UL1557 File E80276 INTERNAL CIRCUIT VUFS(1) VVFS(7) VWFS(13) W(34) VP(12) WP(18) UP(6) VP1(4) UN(21) VN(22) WN(23) FO(24) VN1(28) VNC(27) NW(37) CIN(26) NU(35) NV(36) V(33) U(32) P(31) VOT(20) VUFB(3) VVFB(9) VWFB(15) VP1(10) VP1(16) CFO(25) DIPIPM HVIC1 HVIC2 HVIC3 HO HO HO WOUT VOUT UOUT IGBT1 Di1 IGBT2 Di2 IGBT3 Di3 IGBT4 Di4 IGBT5 Di5 IGBT6 Di6 LVIC

< Dual-In-Line Package Intelligent Power Module > PSS20S51F6 / PSS20S51F6-C TRANSFER MOLDING TYPE INSULATED TYPE Publication Date : March 2014 MAXIMUM RATINGS (Tj = 25°C, unless otherwise noted) INVERTER PART Symbol Parameter Condition Ratings Unit VCC Supply voltage Applied between P-NU,NV,NW 450 V VCC(surge) Supply voltage (surge) Applied between P-NU,NV,NW 500 V VCES Collector-emitter voltage 600 V ±IC Each IGBT collector current Tf = 25°C (Note1) 20 A ±ICP Each IGBT collector current (peak) Tf = 25°C, less than 1ms 40 A PC Collector dissipation Tf = 25°C, per 1 chip 25.0 W Tj Junction temperature (Note2) -20~+125 °C (Note1) Pulse width and period are limited due to junction temperature. (Note2) The maximum junction temperature rating of the power chips integrated within the DIP IPM is 150°C (@Tf≤100°C).However, to ensure safe operation of the DIPIPM, the average junction temperature should be limited to T j(ave)≤125°C (@Tf≤100°C). CONTROL (PROTECTION) PART Symbol Parameter Condition Ratings Unit VD Control supply voltage Applied between VP1-VNC, VN1-VNC 20 V VDB Control supply voltage Applied between VUFB-VUFS, VVFB-VVFS ,VWFB-VWFS 20 V VIN Input voltage Applied between UP, VP, WP, UN, VN, WN-VNC -0.5~VD+0.5 V VFO Fault output supply voltage Applied between FO-VNC -0.5~VD+0.5 V IFO Fault output current Sink current at FO terminal 1 mA VSC Current sensing input voltage Applied between CIN-VNC -0.5~VD+0.5 V TOTAL SYSTEM Symbol Parameter Condition Ratings Unit VCC(PROT) Self protection supply voltage limit (Short circuit protection capability) VD = 13.5~16.5V, Inverter Part Tj = 125°C, non-repetitive, less than 2μs 400 V Tf Module operation temperature Measurement point of Tf is provided in Fig.1 -20~+100 °C Tstg Storage temperature -40~+125 °C Viso Isolation voltage 60Hz, Sinusoidal, AC 1min, between connected all pins and heat sink plate 2500 Vrms Fig. 1: Tf MEASUREMENT POINT THERMAL RESISTANCE Symbol Parameter Condition Limits Unit Min. Typ. Max. Rth(j-f)Q Junction to fin thermal resistance (Note 3) Inverter IGBT part (per 1/6 module) - - 4.0 K/W Rth(j-f)F Inverter FWDi part (per 1/6 module) - - 6.5 K/W Note 3: Grease with good thermal conductivity and long- term endurance should be applied evenly with about +100μm~+200μm thickness on the contacting surface of heat sink. Fixing screws are tightened by the specified torque. Control terminals Tf point IGBT chip position FWDi chip position Power terminals Groove Thermocouple detecting point It should be fixed to the contact surface of the outer fin (Surface finish: warpage -50~+100μm, roughness under Rz12) 17.75mm 16.4mm Grease should be applied evenly with about +100μm~+200μm and fixing screws are tightened by the specified torque. Outer fin (heatsink)

< Dual-In-Line Package Intelligent Power Module > PSS20S51F6 / PSS20S51F6-C TRANSFER MOLDING TYPE INSULATED TYPE Publication Date : March 2014 ELECTRICAL CHARACTERISTICS (Tj = 25°C, unless otherwise noted) INVERTER PART Symbol Parameter Condition Limits Unit Min. Typ. Max. VCE(sat) Collector-emitter saturation voltage VD=VDB = 15V, VIN= 5V IC= 20A, Tj= 25°C - 1.50 2.00 V IC= 20A, Tj= 125°C - 1.60 2.10 VEC FWDi forward voltage VIN= 0V, -IC= 20A - 1.60 2.10 V ton Switching times VCC= 300V, VD= VDB= 15V IC= 20A, Tj= 125°C, VIN= 0↔5V Inductive Load (upper-lower arm) 0.60 1.20 1.80 μs tC(on) - 0.30 0.60 μs toff - 1.60 2.60 μs tC(off) - 0.35 0.80 μs trr - 0.30 - μs ICES Collector-emitter cut-off current VCE=VCES Tj= 25°C - - 1 mA Tj= 125°C - - 10 CONTROL (PROTECTION) PART Symbol Parameter Condition Limits Unit Min. Typ. Max. ID Circuit current Total of VP1-VNC, VN1-VNC VD=15V, VIN=0V - - 6.00 mA VD=15V, VIN=5V - - 6.00 IDB Each part of VUFB- VUFS, VVFB- VVFS, VWFB- VWFS VD=VDB=15V, VIN=0V - - 0.55 VD=VDB=15V, VIN=5V - - 0.55 VSC(ref) Short circuit trip level VD = 15V (Note 4) 0.45 0.48 0.51 V UVDBt P-side Control supply under-voltage protection(UV) Tj ≤125°C Trip level 10.0 - 12.0 V UVDBr Reset level 10.5 - 12.5 V UVDt N-side Control supply under-voltage protection(UV) Trip level 10.3 - 12.5 V UVDr Reset level 10.8 - 13.0 V VOT Temperature Output Pull down R=5kΩ (Note 5) LVIC Temperature=100°C 2.90 3.02 3.15 V VFOH Fault output voltage VSC = 0V, FO terminal pulled up to 5V by 10kΩ 4.9 - - V VFOL VSC = 1V, IFO = 1mA - - 0.95 V tFO Fault output pulse width CFO=22nF (Note 6) 1.6 2.4 - ms IIN Input current VIN = 5V 0.70 1.00 1.50 mA Vth(on) ON threshold voltage Applied between UP, VP, WP, UN, VN, WN-VNC - 2.10 2.60 V Vth(off) OFF threshold voltage 0.80 1.30 - Vth(hys) ON/OFF threshold hysteresis voltage 0.35 0.80 - VF Bootstrap Di forward voltage IF=10mA including voltage drop by limiting resistor (Note 7) 0.5 0.9 1.3 V R Built-in limiting resistance Included in bootstrap Di 16 20 24 Ω Note 4 : SC protection works only for N-side IGBT. Please select the external shunt resistance such that the SC trip-level is less than 2.0 times of the current rating. 5 : DIPIPM don't shutdown IGBTs and output fault signal automatically when temperatu re rises excessively. When temperature exceeds the protective level that user defined, controller (MCU) should stop the DIPIPM. Temperature of LVIC vs. VOT output characteristics is described in Fig. 3. 6 : Fault signal Fo outputs when SC or UV protection works. Fo pulse width is different for each protection modes. At SC failure, Fo pulse width is a fixed width which is specified by the capacitor connected to C FO terminal. (CFO=9.1 x 10-6 x tFO [F]), but at UV failure, Fo outputs continuously until recovering from UV state. (But minimum Fo pulse width is the specified time by CFO.) 7 : The characteristics of bootstrap Di is described in Fig.2. Fig. 2 Characteristics of bootstrap Di VF-IF curve including voltage drop by limiting resistor (Right chart is enlarged chart.) 100 200 300 400 500 600 700 800 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 IF [mA] VF [V] IF [mA] VF [V]

< Dual-In-Line Package Intelligent Power Module > PSS20S51F6 / PSS20S51F6-C TRANSFER MOLDING TYPE INSULATED TYPE Publication Date : March 2014 Fig. 3 Temperature of LVIC vs. VOT output characteristics 2.9 3.02 3.15 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 70 80 90 100 110 120 130 VOT output (V)_ LVIC temperature ( °C) Typ. Max. Min. Fig. 4 VOT output circuit (1) It is recommended to insert 5kΩ (5.1kΩ is recommended) pull down resistor for getting linear output characteristics at low temperature below room temperature. When the pull down resistor is inserted between VOT and VNC(control GND), the extra circuit current, which is calculated approximately by VOT output voltage divided by pull down resistance, flows as LVIC circuit current continuously. In the case of using VOT for detecting high temperature over room temperature only, it is unnecessary to insert the pull down resistor. (2) In the case of using V OT with low voltage controller like 3.3V MCU, V OT output might exceed control supply voltage 3.3V when temperature rises excessively. If system uses low voltage controller, it is recommended to insert a clamp Di between control supply of the controller and VOT output for preventing over voltage destruction. (3) In the case of not using VOT, leave VOT output NC (No Connection). Refer the application note for this product about the usage of VOT. Ref VOT Temperature Signal VNC Inside LVIC of DIPIPM MCU 5kΩ

< Dual-In-Line Package Intelligent Power Module > PSS20S51F6 / PSS20S51F6-C TRANSFER MOLDING TYPE INSULATED TYPE Publication Date : March 2014 MECHANICAL CHARACTERISTICS AND RATINGS Parameter Condition Limits Unit Min. Typ. Max. Mounting torque Mounting screw : M3 (Note 8) Recommended 0.78N·m 0.59 - 0.98 N·m Terminal pulling strength Load 9.8N EIAJ-ED-4701 10 - - s Terminal bending strength Load 4.9N, 90deg. bend EIAJ-ED-4701 2 - - times Weight - 20 - g Heat-sink flatness (Note 9) -50 - 100 μm Note 8: Plain washers (ISO 7089~7094) are recommended. Note 9: Measurement point of heat sink flatness RECOMMENDED OPERATION CONDITIONS Symbol Parameter Condition Limits Unit Min. Typ. Max. VCC Supply voltage Applied between P-NU, NV, NW 0 300 400 V VD Control supply voltage Applied between VP1-VNC, VN1-VNC 13.5 15.0 16.5 V VDB Control supply voltage Applied between VUFB-VUFS, VVFB-VVFS, VWFB-VWFS 13.0 15.0 18.5 V ΔVD, ΔVDB Control supply variation -1 - +1 V/μs tdead Arm shoot-through blocking time For each input signal 1.5 - - μs fPWM PWM input frequency Tf ≤ 100°C, Tj ≤ 125°C - - 20 kHz IO Allowable r.m.s. current VCC = 300V, VD = 15V, P.F = 0.8, Sinusoidal PWM Tf ≤ 100°C, Tj ≤ 125°C (Note10) fPWM= 5kHz - - 10.0 Arms fPWM= 15kHz - - 6.4 PWIN(on) Minimum input pulse width (Note 11) 1.0 - - μs PWIN(off) 1.0 - VNC VNC variation Between VNC-NU, NV, NW (including surge) -5.0 - +5.0 V Tj Junction temperature -20 - +125 °C Note 10: Allowable r.m.s. current depends on the actual application conditions. 11: DIPIPM might not make response if the input signal pulse width is less than PWIN(on) , PWIN(off) Heat sink side Heat sink side 3.0mm + - 21mm Measurement position

< Dual-In-Line Package Intelligent Power Module > PSS20S51F6 / PSS20S51F6-C TRANSFER MOLDING TYPE INSULATED TYPE Publication Date : March 2014 Fig. 5 Timing Charts of The DIPIPM Protective Functions [A] Short-Circuit Protection (N-side only with the external shunt resistor and RC filter) a1. Normal operation: IGBT ON and outputs current. a2. Short circuit current detection (SC trigger) (It is recommended to set RC time constant 1.5~2.0μs so that IGBT shut down within 2.0μs when SC.) a3. All N-side IGBT's gates are hard interrupted. a4. All N-side IGBTs turn OFF. a5. FO outputs. The pulse width of the Fo signal is set by the external capacitor CFO. a6. Input = “L”: IGBT OFF a7. Fo finishes output, but IGBTs don't turn on until inputting next ON signal (LH). (IGBT of each phase can return to normal state by inputting ON signal to each phase.) a8. Normal operation: IGBT ON and outputs current. [B] Under-Voltage Protection (N-side, UV b1. Control supply voltage V D exceeds under voltage reset level (UVDr), but IGBT turns ON by next ON signal (LH). (IGBT of each phase can return to normal state by inputting ON signal to each phase.) b2. Normal operation: IGBT ON and outputs current. b3. VD level drops to under voltage trip level. (UVDt). b4. All N-side IGBTs turn OFF in spite of control input condition. b5. Fo outputs for the period set by the capacitance CFO, but output is extended during VD keeps below UVDr. b6. VD level reaches UVDr. b7. Normal operation: IGBT ON and outputs current. Lower-side control input Protection circuit state Internal IGBT gate Output current Ic Sense voltage of the shunt resistor Error output Fo SC trip current level SET RESET SC reference voltage Delay by RC filtering UVDr RESET SET RESET UVDt b1 Control input Protection circuit state Control supply voltage VD Output current Ic Error output Fo

< Dual-In-Line Package Intelligent Power Module > PSS20S51F6 / PSS20S51F6-C TRANSFER MOLDING TYPE INSULATED TYPE Publication Date : March 2014 [C] Under-Voltage Protection (P-side, UVDB) c1. Control supply voltage VDB rises. After the voltage reaches under voltage reset level UVDBr, IGBT turns on by next ON signal (LH). c2. Normal operation: IGBT ON and outputs current. c3. VDB level drops to under voltage trip level (UVDBt). c4. IGBT of the correspond phase only turns OFF in spite of control input signal level, but there is no FO signal output. c5. VDB level reaches UVDBr. c6. Normal operation: IGBT ON and outputs current. Control input Protection circuit state Control supply voltage VDB Output current Ic Error output Fo UVDBr RESET SET RESET UVDBt Keep High-level (no fault output)

< Dual-In-Line Package Intelligent Power Module > PSS20S51F6 / PSS20S51F6-C TRANSFER MOLDING TYPE INSULATED TYPE Publication Date : March 2014 Fig. 6 Example of Application Circuit (1) If control GND is connected with power GND by common broad pattern, it may cause malfunction by power GND fluctuation. It is recommended to connect control GND and power GND at only a point N1 (near the terminal of shunt resistor). (2) It is recommended to insert a Zener diode D1(24V/1W) between each pair of control supply terminals to prevent surge destruction. (3) To prevent surge destruction, the wiring between the smoothing capacitor and the P, N1 terminals should be as short as possible. Generally a 0.1-0.22μF snubber capacitor C3 between the P-N1 terminals is recommended. (4) R1, C4 of RC filter for preventing protection circuit malfunction is recommended to select tight tolerance, temp-compensated type. The time constant R1C4 should be set so that SC current is shut down within 2μs. (1.5μs~2μs is recommended generally.) SC interrupting time might vary with the wiring pattern, so the enough evaluation on the real system is necessary. (5) To prevent malfunction, the wiring of A, B, C should be as short as possible. (6) The point D at which the wiring to CIN filter is divided should be near the terminal of shunt resistor. NU, NV, NW terminals should be connected at near NU, NV, NW terminals when it is used by one shunt operation. Low inductance SMD type with tight tolerance, temp-compensated type is recommended for shunt resistor. (7) All capacitors should be mounted as close to the terminals as possible. (C1: good temperature, frequency characteristic electrolytic type and C2:0.22μ-2μF, good temperature, frequency and DC bias characteristic ceramic type are recommended.) (8) Input logic is High-active. There is a 3.3kΩ(min.) pull-down resistor in the input circuit of IC. To prevent malfunction, the input wiring should be as short as possible. When using RC coupling, make the input signal level meet the turn-on and turn-off threshold voltage. (IFO is estimated roughly by the formula of control power supply voltage divided by pull-up resistance. In the case of pulled up to 5V, 10kΩ (5kΩ or more) is recommended.) When using opto coupler, Fo also can be pulled up to 15V (control supply of DIPIPM) by the resistor. (10) Fo pulse width can be set by the capacitor connected to CFO terminal. CFO(F) = 9.1 x 10-6 x tFO (Required Fo pulse width). (11) If high frequency noise superimposed to the control supply line, IC malfunction might happen and cause DIPIPM erroneous operation. To avoid such problem, line ripple voltage should meet dV/dt ≤+/-1V/μs, Vripple≤2Vp-p. (12) For DIPIPM, it isn't recommended to drive same load by parallel connection with other phase IGBT or other DIPIPM. Long GND wiring here might generate noise to input signal and cause IGBT malfunction. Long wiring here might cause SC level fluctuation and malfunction. Power GND wiring Control GND wiring M MCU 15V VD C4 R1 Shunt resistor B C A UN(21) VN(22) WN(23) Fo(24) VN1(28) VNC(27) P U W NU LVIC V CIN(26) NV NW IGBT1 IGBT2 IGBT3 IGBT4 IGBT5 IGBT6 Di1 Di2 Di3 Di4 Di5 Di6 D CFO(25) VOT(20) 5kΩ WP(18) VWFB(15) VWFS(13) C1 D1 C2 VP1(16) HVIC VP(12) VVFB(9) VVFS(7) C1 D1 C2 VP1(10) HVIC UP(6) VUFB(3) VUFS(1) C1 D1 C2 VP1(4) HVIC Long wiring here might cause short circuit failure

< Dual-In-Line Package Intelligent Power Module > PSS20S51F6 / PSS20S51F6-C TRANSFER MOLDING TYPE INSULATED TYPE Publication Date : March 2014 Fig. 7 MCU I/O Interface Circuit Fig. 8 Pattern Wiring Around the Shunt Resistor Fig. 9 Pattern Wiring Around the Shunt Resistor (for the case of open emitter) When DIPIPM is operated with three shunt resistors, voltage of each shunt resistor cannot be input to CIN terminal directly. In that case, it is necessary to use the external protection circuit as below. (1) It is necessary to set the time constant R fCf of external comparator input so that IGBT stops within 2μs when short circuit occurs. SC interrupting time might vary with the wiring pattern, comparator speed and so on. (2) It is recommended for the threshold voltage Vref to set to the same rating of short circuit trip level (Vsc(ref): typ. 0.48V). (3) Select the external shunt resistance so that SC trip-level is less than specified value (=2.0 times of rating current). (4) To avoid malfunction, the wiring A, B, C should be as short as possible. (5) The point D at which the wiring to comparator is divided should be close to the terminal of shunt resistor. (6) OR output high level when protection works should be over 0.51V (=maximum Vsc(ref) rating). (7) GND of Comparator, GND of Vref circuit and Cf should be not connected to power GND but to control GND wiring. UP,VP,WP,UN,VN,WN Fo VNC(Logic) DIPIPM MCU 10kΩ 5V line 3.3kΩ(min) Note) Design for input RC filter depends on PWM control scheme used in the application and wiring impedance of the printed circuit board. DIPIPM input signal interface integrates a minimum 3.3kΩ pull-down resistor. Therefore, when inserting RC filter, it is necessary to satisfy turn-on threshold voltage requirement. Fo output is open drain type. It should be pulled up to control power supply (e.g. 5V, 15V) with a resistor that makes Fo sink current IFo 1mA or less. In the case of pulled up to 5V supply, 10kΩ （5kΩ or more） is recommended. Wiring Inductance should be less than 10nH. Inductance of a copper pattern with length=17mm, width=3mm is about 10nH. NU, NV, NW should be connected each other at near terminals. VNC NU NV NW DIPIPM VNC GND wiring from VNC should be connected close to the terminal of shunt resistor. Shunt resistor DIPIPM NU NV NW Low inductance shunt resistor like surface mounted (SMD) type is recommended. GND wiring from VNC should be connected close to the terminal of shunt resistor. Shunt resistors Each wiring Inductance should be less than 10nH. Inductance of a copper pattern with length=17mm, width=3mm is about 10nH. P V U W N-side IGBT P-side IGBT Drive circuit DIPIPM VNC NW Drive circuit CIN NV NU Vref Vref Vref Comparators (Open collector output type) External protection circuit Protection circuit Shunt resistors Rf Cf 5V B A C OR output D

< Dual-In-Line Package Intelligent Power Module > PSS20S51F6 / PSS20S51F6-C TRANSFER MOLDING TYPE INSULATED TYPE Publication Date : March 2014 Fig. 10 Package Outlines PSSxxS51F6 (Short terminal type) Dimensions in mm Terminal of () is the dummy terminal for internal use. This terminal should be kept NC (no connection).

< Dual-In-Line Package Intelligent Power Module > PSS20S51F6 / PSS20S51F6-C TRANSFER MOLDING TYPE INSULATED TYPE Publication Date : March 2014 Fig. 11 Package Outlines PSSxxS51F6-C (Control side zigzag terminal type) Dimensions in mm Terminal of () is the dummy terminal for internal use. This terminal should be kept NC (no connection).

< Dual-In-Line Package Intelligent Power Module > PSS20S51F6 / PSS20S51F6-C TRANSFER MOLDING TYPE INSULATED TYPE Publication Date : March 2014 Revision Record Rev. Date Page Revised contents 1 3/10/2014 - New

< Dual-In-Line Package Intelligent Power Module > PSS20S51F6 / PSS20S51F6-C TRANSFER MOLDING TYPE INSULATED TYPE Publication Date : March 2014 © 2014 MITSUBISHI ELECTRIC CORPORATION. ALL RIGHTS RESERVED. DIPIPM and CSTBT are registered trademarks of MITSUBISHI ELECTRIC CORPORATION. Keep safety first in your circuit designs! Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or proper ty damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials

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