PS4051 PERICOM | Alldatasheet

Document overview

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  • PDF pages: 9

Technical content

Features

  • Low On-resistance: 60Ω typ, with ±5V Supplies, Minimizes Distortion
  • On-Resistance Matching between channels better than 6Ω
  • Guaranteed Low Leakage Currents: <0.1nA at +25oC
  • Rail-to-Rail Analog Signal Range
  • Low Distortion: <0.04% (600Ω)
  • Low Crosstalk: –90dB @100kHz
  • TTL/CMOS Compatible (with +5V or ±5V Supplies)
  • Low Power Consumption.
  • 16-pin Narrow SOIC and QSOP Packages save board area
  • Pin-compatible upgrades for 74HC4051/4052/4053

Applications

  • Audio and Video Switching and Routing
  • Lab and Medical Instrumentation
  • Low-Voltage Data-Acquisition and Process Control Systems
  • Battery-Powered Communication Systems

Description

The PS4051/PS4052/PS4053 are precision low-voltage CMOS analog multiplexers/switches. The PS4051 is an eight-channel single-ended mux designed to select one of eight inputs to a common output. What input is selected depends on the status of three address bits (ADDA-ADDC). The PS4052 is a differential four-channel mux, controlled by two address bits: ADDA, and ADDB. The PS4053 is a triple 2-to-1 mux (or triple SPDT, single-pole double-throw, switch). The INH (inhibit) pin can be driven high, to open all switches regardless of address bit status. All control inputs are TTL compatible when V+ = +5V. These devices are designed to operate with power supplies from ±2.7V to ±8V. Single-supply operation is possible from +2.7V to +16V. When on, each switch conducts current equally well in either direction and can handle rail-to-rail analog signals. In the off -state each switch blocks voltages up to the power-supply rails. Off-leakage current is guaranteed to be less than 0.1nA at +25oC, and < 2.5nA at +85oC. These devices are available in 16-pin DIP, Narrow SOIC, and QSOP packages for operation over the –40oC to +85oC temperature range. Functional Block Diagrams and Pin Configurations Top Views For free samples and the latest literature: www.pericom.com, or phone 1-800-435-2336 NO1 NO3 COM NO7 INH NO5 GND NO2 NO4 NO0 ADDC NO6 ADDB ADDA LOGIC NO0B NO1B COMB NO3B INH NO2B GND NO1A NO2A COMA NO3A NO0A ADDB ADDA LOGIC N0B NCB NOA COMA INH NCA GND COMB COMC NOC ADDC NCC ADDB ADDA LOGIC PS4051 PS4052 PS4053

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches Caution: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Thermal Information Continuous Power Dissipation Narrow SO and QSOP Note 1: Signals on NO, COM, or logic inputs exceeding V+ or V– are clamped by internal diodes. Limit forward diode current to 30mA. Absolute Maximum Ratings Voltages Referenced to V– or 30mA, whichever occurs first Peak Current, COM, NO, NC S P H N I C D D A B D D A A D D A h c ti w S n O X X X e n o N O N O N O N O N O N O N O N O N S P H N I B D D A A D D A h cti w S n O X X e n o N B A O N B A O N B A O N B A O N Truth Tables S P H N I C D D A B D D A A D D A s e h cti w S n O X X X e n o N C O N B O N A O N C O N B O N A C N C O N B C N A O N C O N B C N A C N C C N B O N A O N C C N B O N A C N C C N B C N A O N C C N B C N A C N Logic “0”, VAL ≤ 0.8V Logic “1”, VIH ≥ 2.4V

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches PS8461 02/16/00 Electrical Specifications - Dual Supplies (V± = ± 5V ±10%, GND = 0V, VAH = VIH = 2.4V, VAL = VIL = 0.8V) r et e m a r a P lo b m y S s n oitid n o C C °(.p m e T ni M p y T x a M stin U h cti w S g ola n A la n gi S g ola n A e g n a R V G O L A N A llu F V V V e c n atsis e R n O R N O V V V V V M O C V I O N A m Ω llu F e c n atsis e R O n e e w te B h cta M sle n n a h C ∆R N O V M O C V r o C N V I O N A m V V V V llu F e c n atsis e R O ss e ntal F R N O T A L F V V V V I O N A m V M O C V V llu F ff O O N tn erru C e g a k a e L I O N F F O V 5.5 V V 5.5 V V M O C V 5.4 V O N V 5.4 – 1.0 A n llu F – 0.1 e g a k a e L ff O M O C tn erru C I M O C F F O V 5.5 V V V 5.5 V M O C V 5.4 V O N V 5.4 S P – 1.0 llu F – 5.2 S P S P – 1.0 llu F – 5.1 e g a k a e L n O M O C (tn erru C I N O M O C V M O C V 5.4 S P – 1.0 llu F S P S P – 1.0 llu F – 5.2 t u p n I cig o L h gi H cig o L e g atlo V tu p n I V H A , V H I llu F 4.2 V w o L cig o L e g atlo V tu p n I V L A V L I 8.0 tn erru C tu p n I e g atlo V tu p n I hti w w o L r o h gi H I H I I L I VA V I V V 1.0 1.0 µA

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches Notes: The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. Guaranteed by design ∆RΟΝ = RΟΝ max - RΟΝ min Flatness is defined as the difference between the maximum and minimum values of on-resistance measured over the specific analog signal range, i.e., VNO = 3V to 0 and 0V to –3V. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC. Off Isolation = 20log10 VCOM / VNO. See Figure 5. Electrical Specifications - Dual Supplies (continued) (V± = ±5V ±10%, GND = 0V, VAH = VIH = 2.4V, VAL = VIL = 0.8V) r et e m a r a P lo b m y S s n oitid n o C C p m e T ni M p y T x a M stin U ci m a n y D e m iT n oitis n ar T t S N A R T eru gi F s n e k a M -er ofe B k a er B y ale D e m iT t N E P O eru gi F e m iT n O ru T t N O eru gi F llu F e m iT ff O ru T t F F O eru gi F llu F n oitc ejn I e g ra h C Q CL n VS R V S C p n oitalo sI ff O R R I O CL V p H N I R V L V H k f O N V S M R B d klatss o r C X K L A T CL R p L H k f V eru gi F O N V S M R tu p n I cig o L e c n atic a p a C C N I z H M f F p e c n atic a p a C ff O O N C F F O O N V H M f O N V ff O M O C e c n atic a p a C C F F O M O C V H M f M O C V S P S P S P n O M O C e c n atic a p a C C N O M O C V H M f M O C V S P S P S P ylp p u S e g n a R ylp p u S -re w o P llu F 7.2 V tn erru C ylp p u S e vitis o P I V H N I V A V r o V V 5.5 V V 5.5 V µA ylp p u S e vita g e N tn erru C I

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches PS8461 02/16/00 r et e m a r a P lo b m y S s n oitid n o C C p m e T ni M p y T x a M stin U h cti w S e g n a R la n gi S g ola n A V G O L A N A llu F V V e c n atsis e R n O R N O I O N A m V M O C V 5.3 V 5.4 V Ω llu F e g a k a e L ff O O N tn erru C I F F O O N V O N V V M O C V 5.5 V V 5.4 1.0 nΑ llu F e g a k a e L ff O M O C tn erru C I F F O M O C V 5.5 V V M O C V 5.4 V O N r o V V M O C V V O N V 5.4 S P llu F S P S P llu F e g a k a e L n O M O C tn erru C I N O M O C V M O C V O N V 5.4 V 5.5 V S P llu F S P S P llu F t u p n I cig o L la tigi D e g atlo V tu p n I h gi H cig o L V H A V H I llu F 4.2 V e g atlo V tu p n I w o L cig o L V L A V L I 8.0 tu p n I hti w tn erru C tu p n I w o L r o h gi H e g atlo V I H I I L I VA V I V V µA ylp p u S tn erru C ylp p u S vitis o P I VA V I V r o V 0.1 0.1 µA llu F Electrical Characteristics - Single 5V Supply (V+ = +5V ±10%, V– = 0V, GND = 0V, VAH = VIH = 2.4V, VAL = VIL = 0.8V)

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches r et e m a r a P lo b m y S s n oitid n o C C p m e T ni M p y T x a M stin U ci m a n y D e m iT n O ru T t N O s n llu F e m iT ff O ru T t F F O llu F e k a M -er ofe B k a er B la v retn I t N E P O n oitc ejn I e g ra h C Q CL V n S R V S = Ω 5.1 C p Electrical Characteristics - Single 5V(continued) (V+ = +5V ±10%, V– = 0V, GND = 0V, VAH = VIH = 2.4V, VAL = VIL = 0.8V) r et e m a r a P lo b m y S s n oitid n o C C p m e T ni M p y T x a M stin U h cti w S e g n a R la n gi S g ola n A V G O L A N A llu F V V e c n atsis e R O R N O I O N V A m M O C V 5.1 V V Ω llu F ci m a n y D e m iT n oitis n ar T t S N A R T V eru gi F N I V 4.2 V O N V V 5.1 O N V s n e m iT n O ru T t N O V eru gi F H N I V 4.2 V L N I V V O N V 5.1 e m iT ff O ru T t F F O V eru gi F H N I V 4.2 V L N I V V O N V 5.1 n oitc ejn I e g ra h C Q CL V n S R V S Ω C p Electrical Characteristics - Single 3V Supply (V+ = +3.3V ±10%, V– = 0V, GND = 0V, VAH = VIH = +2.4V, VAL = VILL = +0.8V) Notes: The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. Guaranteed by design ∆RΟΝ = RΟΝ max - RΟΝ min Flatness is defined as the difference between the maximum and minimum value of on-resistance measured. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC. Worst-case isolation is on channel 4 because of its proximity to the COM pin. Off isolation = 20log VCOM/VNO, VCOM = output, VNO = input to off switch Leakage testing at single supply is guaranteed by testing with dual supplies.

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches PS8461 02/16/00 Figure 8. NO/COM Capacitance

Ordering Information

r e b m u N tr a P e r u t a r e p m e T e g a k c a P E P E S P C º ot C º P I D P E S E S P C º ot C º C I O S w o rra N E E E S P C º ot C º P O S Q E P C S P C º ot C º P I D P E S C S P C º ot C º C I O S w o rra N E E C S P C º ot C º P O S Q E P E S P C º ot C º P I D P E S E S P C º ot C º C I O S w o rra N E E E S P C º ot C º P O S Q