PRTR5V0U2D NEXPERIA | Alldatasheet

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Technical content

  1. Product profile

1.1 General description

Ultra low capacitance double rail-to-rail ElectroStatic Discharge (ESD) protection device in a SOT457 (SC-74) small Surface-Mounted Device (SMD) plastic package. The device is designed to protect two Hi-Speed data lines or high-frequency signal lines from the damage caused by ESD and other transients. PRTR5V0U2D integrates two ultra low capacitance rail-to-rail ESD protection channels and one additional ESD protection diode to ensure signal line protection even if no supply voltage is available.

1.2 Features

n ESD protection of two Hi-Speed data lines or high-frequency signal lines n Ultra low input/output to ground capacitance: C(I/O-GND)=1p F n ESD protection up to 8 kV n IEC 61000-4-2, level 4 (ESD) n Very low clamping voltage due to an integrated additional ESD protection diode n Very low reverse current n AEC-Q101 qualified (85°C) n Small SMD plastic package

1.3 Applications

n USB 2.0 interfaces n Digital Video Interface (DVI) n High Definition Multimedia Interface (HDMI) n Mobile and cordless phones n Personal Digital Assistants (PDA) n Digital cameras n Wide Area Network (WAN) / Local Area Network (LAN) systems n PCs, notebooks, printers and other PC peripherals PRTR5V0U2D Ultra low capacitance double rail-to-rail ESD protection Rev. 01 — 28 April 2009 Product data sheet

PRTR5V0U2D_1 © NXP B.V. 2009. All rights reserved.

1.4 Quick reference data

[1] Measured from pin 1, 3, 4 or 6 to ground. [2] Measured from pin 1 or 6 to pin 3 or 4. [3] Measured from pin 5 to ground. Table 1. Quick reference data Tamb =2 5°C unless otherwise specified. Table 2. Pinning

1 I/O1 input/output 1

2 GND ground

3 I/O2 input/output 2

4 I/O2 input/output 2

6 I/O1 input/output 1

Table 3. Ordering information Table 4. Marking codes

PRTR5V0U2D_1 © NXP B.V. 2009. All rights reserved. [1] Device stressed with ten non-repetitive ESD pulses. [2] Measured from pin 1, 3, 4 or 6 to pin 2 or 5. Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Table 6. ESD maximum ratings Tamb =2 5°C unless otherwise specified.

PRTR5V0U2D_1 © NXP B.V. 2009. All rights reserved. Table 7. ESD standards compliance

PRTR5V0U2D_1 © NXP B.V. 2009. All rights reserved. [1] Measured from pin 1, 3, 4 or 6 to ground. [2] Measured from pin 1 or 6 to pin 3 or 4. [3] Measured from pin 1, 3, 4 or 6 to pin 5. [4] Measured from pin 5 to ground. Table 8. Characteristics Tamb =2 5°C unless otherwise specified.

PRTR5V0U2D_1 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 — 28 April 2009 6 of 12 NXP Semiconductors PRTR5V0U2D Ultra low capacitance double rail-to-rail ESD protection Fig 4. ESD clamping test setup and waveforms 006aab112 50 Ω R Z C Z vertical scale = 200 V/div horizontal scale = 50 ns/div unclamped +1 kV ESD voltage waveform (IEC 61000-4-2 network) clamped +1 kV ESD voltage waveform (IEC 61000-4-2 network) unclamped −1 kV ESD voltage waveform (IEC 61000-4-2 network) clamped −1 kV ESD voltage waveform (IEC 61000-4-2 network) vertical scale = 200 V/div horizontal scale = 50 ns/div vertical scale = 10 V/div horizontal scale = 50 ns/div GND GND GND GND 450 Ω RG 223/U 50 Ω coax ESD TESTER IEC 61000-4-2 network C Z = 150 pF; RZ = 330 Ω

4 GHz DIGITAL

10× ATTENUATOR DUT Device Under Test vertical scale = 10 V/div horizontal scale = 50 ns/div

PRTR5V0U2D_1 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 — 28 April 2009 7 of 12 NXP Semiconductors PRTR5V0U2D Ultra low capacitance double rail-to-rail ESD protection 7. Application information Handling data rates up to 480 Mbit/s, USB 2.0 interfaces require ESD protection devices with an extremely low line capacitance in order to avoid signal distortion. With a capacitance of only 1 pF , the PRTR5V0U2D offers IEC 61000-4-2, level 4 compliant ESD protection. The PRTR5V0U2D integrates two ultra low capacitance rail-to-rail ESD protection channels and one additional ESD protection diode. The additional ESD protection diode connected between ground and VCC prevents charging of the supply. Circuit board layout and protection device placement Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge transients. The following guidelines are recommended: 1. Place the PRTR5V0U2D as close to the input terminal or connector as possible. 2. The path length between the PRTR5V0U2D and the protected line should be minimized. 3. Keep parallel signal paths to a minimum. 4. Avoid running protected conductors in parallel with unprotected conductors. 5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and ground loops. 6. Minimize the length of the transient return path to ground. 7. Avoid using shared transient return paths to a common ground point. 8. Ground planes should be used whenever possible. For multilayer PCBs, use ground vias. Fig 5. Application diagram: USB 2.0 006aaa485 D + D − D + D − GND USB controller common mode choke protected IC/device VBUS VBUS

PRTR5V0U2D_1 © NXP B.V. 2009. All rights reserved. [1] For further information and the availability of packing methods, seeSection13. Table 9. Packing methods

PRTR5V0U2D_1 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 — 28 April 2009 9 of 12 NXP Semiconductors PRTR5V0U2D Ultra low capacitance double rail-to-rail ESD protection 10. Soldering Fig 7. Reflow soldering footprint SOT457 (SC-74) Fig 8. Wave soldering footprint SOT457 (SC-74) solder lands solder resist occupied area solder paste sot457_fr 3.45 1.95 2.8253.3 0.45 (6×) 0.55 (6×) 0.7 (6×) 0.8 (6×) 2.4 0.95 0.95 Dimensions in mm sot457_fw 5.3 5.05 1.45 (6×) 0.45 (2×) 1.5 (4×) 2.85 1.475 1.475 solder lands solder resist occupied area preferred transport direction during soldering Dimensions in mm

PRTR5V0U2D_1 © NXP B.V. 2009. All rights reserved. Table 10. Revision history

PRTR5V0U2D_1 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 — 28 April 2009 11 of 12 NXP Semiconductors PRTR5V0U2D Ultra low capacitance double rail-to-rail ESD protection 12. Legal information

12.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

12.2 Definitions

Draft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet —A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

12.3 Disclaimers

General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes —NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use —NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications —Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values —Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale —NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license —Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Quick reference data —The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. ESD protection devices —These products are only intended for protection against ElectroStatic Discharge (ESD) pulses and are not intended for any other usage including, without limitation, voltage regulation applications. NXP Semiconductors accepts no liability for use in such applications and therefore such use is at the customer’s own risk. Export control —This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.

12.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 13. Contact information For more information, please visit:http://www.nxp.com For sales office addresses, please send an email to:salesaddresses@nxp.com Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.

NXP Semiconductors PRTR5V0U2D Ultra low capacitance double rail-to-rail ESD protection © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 28 April 2009 Document identifier: PRTR5V0U2D_1 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 14. Contents