PN531

PN531 PHILIPS | Alldatasheet

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Technical content

Datasheet sections

• 1 INTRODUCTION
• 1.1 Scope
• 1.1 Features
• 1.2 Application
• 2 BLOCK DIAGRAM
• 2.1 Simplified PN531 Block Diagram
• 3 PN531 PINNING INFORMATION
• 3.1 Pinning Diagram
• 3.2 Pin Description
• 4 OPERATING MODES
• 4.1 Reader/Writer Operating mode
• 4.2 NFC MODE
• 4.3 Card Operating mode
• 5 TYPICAL APPLICATION
• 5.1 Circuit Diagram
• 6 ELECTRICAL CHARACTERISTICS
• 6.1 Absolute Maximum Continuous Ratings
• 6.2 Operating Condition Range
• 6.3 Current Consumption
• 7 REVISION HISTORY
• 8 DEFINITIONS
• 9 LIFE SUPPORT APPLICATIONS

PN531- µC based Transmission module February 2004Objective Short Form Specification Revision 2.0 Public Philips Semiconductors

Philips Semiconductors Objective Short Form Specification Rev. 2.0 February 2004 PN531 µC based Transmission module

1 INTRODUCT ION

1.1 Scope

The PN531 is a highly integrated transmission module for contactless communication at 13.56 MHz including µ-controller functionality based on an 80C51 core with 32 kbyte of ROM and 1 kbyte of RAM. This µc-based transmission module combines an outstanding modulation and demodulation concept completely integrated for different kinds of contactless communication methods and protocols at 13.56 MHz with an easy to use firmware for the different supported modes and the required host interfaces. The embedded firmware handles the ISO 14443A and MIFARE® reader protocol as well as the basic FeliCaTM reader protocol and the complete NFC IP-1 protocol. Furthermore the embedded firmware and the internal hardware support the handling and the host protocols for the different interfaces as

• USB 2.0
• I2C
• SPI and
• Serial UART The PN531 supports 3 different operating modes
• Reader/writer mode for FeliCaTM and ISO14443A cards
• Supports Card interface mode for FeliCaTM and ISO14443A/MIFARE® in combination with secure µC
• NFC IP-1 mode In reader/ writer mode the PN531’s internal transmitter part is able to drive a reader/writer antenna designed to communicate with ISO14443A /MIFARE® or FeliCaTM cards and transponders without additional active circuitry. The receiver part provides a robust and efficient implementation of a demodulation and decoding circuitry for signals from ISO14443A compatible cards and transponders. The digital part handles the complete ISO14443A framing and error detection (Parity & CRC). The PN531 supports MIFARE Classic (e.g. MIFARE® Standard) products. The PN531 supports contactless communication using MIFARE® Higher Baudrates up to 424kbit/s in both directions. In the reader/ writer mode the PN531 transmission module supports the FeliCaTM communication scheme. The receiver part provides a robust and efficient implementation of the demodulation and decoding circuitry for FeliCaTM coded signals. The digital part handles the FeliCaTM framing and error detection like CRC. The PN531 supports contactless communication using FeliCaTM Higher Baudrates up to 424kbit/s in both directions. In card mode the PN531 is able to answer a reader/writer command either in FeliCaTM or ISO14443A/MIFARE® card mode. The PN531 generates the proper digital load modulated signals and with an external circuit, can respond to commands sent by the reader/writer. The PN531 offers the possibility to directly communicate with several NFC enabled devices in the NFC IP-1 mode. The NFC IP-1 mode offers different baudrates up to 424kbit/s. The PN531 handles the complete NFC framing and error detection.

Philips Semiconductors Objective Short Form Specification Rev. 2.0 February 2004 PN531 µC based Transmission module

1.1 Features

• 80C51 microcontroller core with 32 kbyte ROM and 1 kbyte RAM
• Highly integrated analog circuitry for transmission and reception
• Output drivers to connect an antenna with minimum number of external components
• Integrated RF Level detector
• Integrated mode detector
• Hardware and embedded Firmware support for
• ISO 14443A reader/writer mode
• MIFARE® Classic encryption and MIFARE® higher baudrate communication up to 424 kbit/s
• Contactless communication according to the FeliCaTM scheme at 212 kbit/s and 424 kbit/s
• NFC standard ECMA 340 and ISO 18092: NFC IP-1 interface and protocol
• Host protocol on following interfaces
• USB 2.0 full speed compliant device
• SPI
• I2C
• High speed serial UART
• Optional interrupt line to the host
• Hard reset with low power function
• Flexible Power down mode or power reduction mode per software
• Internal oscillator to connect a 27.12 MHz quartz
• Internal oscillator to connect a 4 MHz quartz for the USB interface
• 2.5 - 3.6 V power supply
• USB bus powered (In USB mode)
• Specific IO ports and interrupt sources for external devices control

Philips Semiconductors Objective Short Form Specification Rev. 2.0 February 2004 PN531 µC based Transmission module

1.2 Applica tion

The PN531 is tailored to fulfil the requirements of various applications using contactless communication based on the ECMA340 (NFC IP-1) Interface and protocol standard, the ISO14443A reader and FeliCa reader protocol. NFC IP-1 is also standardised in ISO/IEC 18092. Compatible to current RFID infrastructure the NFC technology offers a new direct communication link between two NFC enhanced devices. This peer-to-peer communication enables a direct data exchange between devices. The integrated microcontroller and embedded firmware of the PN 531 means a fast and easy integration in a contactless system. The high-level abstraction commands and the complete handling of RF communication protocols free the host CPU of all real time related constraints. NFC technology is designed to meet requirements for consumer markets, as well as handheld and PC markets. Typical devices to integrate the PN531 are

• Mobile phones
• PDAs
• PCs
• Intelligent remote controls
• PC peripherals e.g. printers and mice
• Consumer electronic devices like digital cameras

Philips Semiconductors Objective Short Form Specification Rev. 2.0 February 2004 PN531 µC based Transmission module

2 BLO CK DIAGRAM

2.1 Simplified PN531 Block Diagram

incl. Data processing CRC/Parity generation & Check Framing Generation & Check Bit Coding & Decoding Host Interfaces I2C serial UART SPI USB 80C51 Core, ROM, RAM Host Interface PN531 Figure 1: PN531 Block Diagram The Analog circuitry handles the modulation and demodulation of the analog signals according to the card mode, reader /writer mode and NFC mode communication scheme. The RF level detector detects the presence of an external RF field at 13.56 MHz. The mode detector detects a MIFARE®, FeliCaTM or NFC coding of an incoming signal in order to prepare the internal receiver to demodulate signals that are sent to the PN531. The integrated contactless UART and the firmware handle the protocol requirements for the communication schemes including the RF based protocols as well as the protocols for host communication. The microcontroller with its embedded firmware allows autonomous management of communication both on the RF interface and with the host. Various host interfaces are implemented to fulfil different customer requirements.

Philips Semiconductors Objective Short Form Specification Rev. 2.0 February 2004 PN531 µC based Transmission module

3 PN531 PINNING INFORMATION

3.1 Pinning Diagram

The device is available in an HVQFN40 package. PN531 IRQ NSS RSTPD OSC2OUT OSC2IN DVDD DVSS TVDD TVSS1 TX1 TX2 AVDD AVSS RX VMID AUX 1 SIGOUT SIGIN LOADMOD PVDD OSCOUT OSCIN TVSS2 MOSI SCK MISO RSTOUT VBUS DELATT TESTEN AUX 2 SVDD P35 P34 P30 P31 P33_INT1 P32_INT0 Figure 2-Pinning Diagram PN531 The device operates with six individual power supplies for best performance in terms of EMC behaviour and signal de-coupling. This gives outstanding RF performance and maximum flexibility to adapt to different operating voltages of digital and analog parts.

Philips Semiconductors Objective Short Form Specification Rev. 2.0 February 2004 PN531 µC based Transmission module

3.2 Pin Description

Description

1 DVSS PWR Digital Ground

2 LOADMOD O DVDD Load Modulation output provides digital signal for FeliCa and MIFARE®

3 TVSS1 PWR Transmitter Ground: supplies the output stage of TX1 and TX2

4 TX1 O TVDD Transmitter 1: delivers the modulated 13.56 MHz energy carrier

5 TVDD PWR Transmitter power supply: supplies the output stage of TX1 and TX2

6 TX2 O TVDD Transmitter 2: delivers the modulated 13.56 MHz energy carrier

7 TVSS2 PWR Transmitter Ground: supplies the output stage of TX1 and TX2

8 AVDD PWR Analog Power Supply

9 VMID PWR AVDD Internal Reference Voltage: This pin delivers the internal reference voltage.

10 RX I AVDD Receiver Input: Input pin for the reception signal, which is the load

modulated 13.56 MHz energy carrier from the antenna circuit.

11 AVSS PWR Analog Ground

12 AUX1 O DVDD Auxiliary Output: This pin delivers analog and digital test signals. 13 AUX2 O DVDD Auxiliary Output: This pin delivers analog and digital test signals. 14 OSCIN I AVDD Crystal Oscillator Input: input to the inverting amplifier of the oscillator. This pin is also the input for an externally generated clock (fosc = 27.12 MHz). 15 OSCOUT O AVDD Crystal Oscillator output: Output of the inverting amplifier of the oscillator. 16 I0 I DVDD Interface mode lines: selects the used host interface. In test mode I0 is used as test signals. 17 I1 I DVDD Interface mode lines: selects the used host interface. In test mode I0 is used as test signals. 18 TESTEN I DVDD Test enable pin: When set to 1 enable the test mode. When set to 0 reset the TCB and disable the access to the test mode.

19 OSC2OUT O DVDD Crystal Oscillator output: Output of the inverting amplifier of the oscillator

for the USB clock.

20 OSC2IN I DVDD Crystal Oscillator Input: input to the inverting amplifier of the oscillator for

the USB clock generation. This pin is also the input for an externally generated clock (fosc =4 MHz). In test mode this signal is used as test clock input

21 P35 IO DVDD General purpose IO signal

22 P34 IO SVDD General purpose IO signal or clk signal for the SAM

23 SIGOUT O SVDD Contactless communication interface output: delivers a serial data stream

according to NFCIP-1 and output signal for the SAM. In test mode this signal is used as test signal output.

24 SIGIN I SVDD Contactless communication interface input: accepts a digital, serial data

stream according to NFCIP-1 and input signal from the SAM. In test mode

Philips Semiconductors Objective Short Form Specification Rev. 2.0 February 2004 PN531 µC based Transmission module Pin Symbol Type Pad Ref Voltage this signal is used as test signal input.

25 SVDD PWR Connected to SAM power supply; used as a reference for communication

with the SAM. 26 P31 IO PVDD General purpose IO signal. Can be configured to act either as TX line of the second serial interface or general purpose IO. In test mode this signal is used as input and output test signal. 27 P30 IO PVDD General purpose IO signal. Can be configured to act either as RX line of the second serial interface or general purpose IO. In test mode this signal is used as input and output test signal.

28 IRQ O PVDD Interrupt request: Output to signal an interrupt event to the host (Port 7 bit

29 RSTOUT IO PVDD Output reset signal. When Low it indicates that the circuit is in reset state. 30 DELATT O PVDD Optional output for an external 1.5 KOhms resistor connection on D+. 31 NSS IO PVDD Not Slave Select. In test mode this signal is used as input and output test signal. 32 MOSI IO PVDD Master Out Slave In. In test mode this signal is used as input and output test signal 33 MISO IO PVDD Master In Slave Out. In test mode this signal is used as input and output test signal 34 SCK IO PVDD Serial interface clock. In test mode this signal is used as input and output test signal

35 PVDD PWR Pad power supply

36 P33_INT1 IO PVDD General purpose IO signal. Can be used to generate an HZ state on the output of the selected interface for the Host communication and to enter TAMA into power down mode without resetting the internal state of TAMA. In test mode this signal is used as input and output test signal. 37 P32_INT0 IO PVDD General purpose IO signal. Can also be used as an interrupt source In test mode this signal is used as input and output test signal.

38 RSTPD I PVDD Reset and Power Down: When High, internal current sources are switched

off, the oscillator is inhibited, and the input pads are disconnected from the outside world. With a positive edge on this pin the internal reset phase starts.

39 DVDD PWR Digital Power Supply

40 VBUS PWR USB power supply.

Philips Semiconductors Objective Short Form Specification Rev. 2.0 February 2004 PN531 µC based Transmission module

4 OPERATING MODES

PN531 supports the following operating modes:

• Reader/Writer mode supporting ISO14443A/MIFARE® and FeliCaTM scheme
• Card Operating mode supporting ISO14443A/MIFARE® and FeliCaTM scheme
• NFC mode including 106, 212 and 424kbit/s. The modes support different baudrates and modulation schemes. The following chapters will explain the different modes in more detail.

4.1 Reader/Writer Operating mode

The PN531 can act as a reader / writer for ISO14443A/MIFARE® or FeliCaTM cards. ISO14443A or FeliCa CardPN531 Battery Host Figure 3 Reader/Writer Mode In the reader/ writer mode the PN531 enables communication to a passive ISO14443A/MIFARE® or FeliCaTM card. The PN531’s firmware and contactless UART handle the ISO 14443A/MIFARE® and FeliCaTM protocol.

Philips Semiconductors Objective Short Form Specification Rev. 2.0 February 2004 PN531 µC based Transmission module

4.2 NFC MODE

NFC communication differentiates between an active and a passive communication.

• Active NFC Mode means both the initiator and the target are using their own RF field for the communication.
• Passive NFC Mode means that the target answers to an initiator command in a load modulation scheme. The initiator is active i.e. generating the RF field. Battery Host PN531 PN531 Battery Host Figure 4 NFC Mode
• Initiator: generates RF field @ 13.56 MHz and starts the NFC communication
• Target: responds to initiator commands either using load modulation scheme (RF field continuously generated by Initiator) or using modulation of self generated RF field (no RF field generated by initiator)

Philips Semiconductors Objective Short Form Specification Rev. 2.0 February 2004 PN531 µC based Transmission module

4.2.1 ACTIVE NFC MODE

Active NFC Mode means both the initiator and the target use their own RF field to enable the communication.

• Communication Diagrams for active NFC communication NFC Initiator NFC Target 1. Initiator starts communication at selected transfer speed 2. Target answers at the same transfer speed powered for digital processing powered for digital processing Host HostHost Initial Command NFC Target powered to generate RF field NFC Initiator Response powered to generate RF field Host Figure 5 active NFC Mode The PN531’s firmware and contactless UART handle the NFC protocol.

Philips Semiconductors Objective Short Form Specification Rev. 2.0 February 2004 PN531 µC based Transmission module

4.2.2 PASSIVE NFC MODE

Passive NFC Mode means that the target answers to an initiator command in a load modulation scheme. The initiator is active i.e. generating the RF field.

• Communication Diagrams for passive NFC communication NFC Initiator NFC Target 1. Initiator starts communication at selected transfer speed HostHost 2. Targets answers using load modulated data at the same transfer speed powered to generate RF field powered for digital processing Figure 6 passive NFC Mode The PN531’s firmware and contactless UART handle the NFC protocol.

4.3 Card Operating mode

The PN531 can be addressed like a FeliCaTM or ISO14443A/ MIFARE® card. This means that the PN531 in combination with a secure µC may acts as an ISO14443A /MIFARE® or FeliCaTM card.

• Communication diagram Reader/ Writer for FeliCa or MIFARE PN531 Battery Host & SAM Emulates a contactless card Figure 7 -Card Operating Mode

Philips Semiconductors Objective Short Form Specification Rev. 2.0 February 2004 PN531 µC based Transmission module

5 TYPICAL APPLICATION

5.1 Circuit Diagram

5.1.1 CIRCUIT BASED ON SPI, SERIAL UART OR I2C HOST INTERFACE

The figure below shows a typical application, where the antenna is directly connected to the PN531. The used host interface is SPI, Serial UART or I2C. C L C C C L Rx L Antenna Coil R R PN531 Tx1 Tx2 TVSS1Host Host Interface IRQ RSTOUT (o) DVDD IRQ (o) TVDDAVDD DVSS AVSS OSCIN OSCOUT 27,12 MHz VMID SigIn SigOut C C PADVDD PADVSS C C TVSS2 RSTPD (o) VBUS * Figure 8: Circuit Diagram for SPI, Serial UART and I2C host interface Note: 1. * Can be used in the card operating mode to connect to SAM 2. (o) Optional

Philips Semiconductors Objective Short Form Specification Rev. 2.0 February 2004 PN531 µC based Transmission module

5.1.2 CIRCUIT BASED ON USB HOST INTERFACE

The figure below shows a typical application where the antenna is directly connected to the PN531. The host interface is USB. C L C C C L Rx L Antenna Coil R R PN531 Tx1 Tx2 Host USB interface VMID SigIn SigOut C C C C OSCIN OSCOUT 27,12 MHz OSC2IN OSC2OUT

4 MHz

Figure 9: Circuit Diagram with USB host interface Note: 1. * Can be used for the card operating mode to connect to SAM

Philips Semiconductors Objective Short Form Specification Rev. 2.0 February 2004 PN531 µC based Transmission module

6 ELECTRI CAL CHARACTERISTICS

6.1 Absolute Maximum Continuous Ratings

SYMBOL PARAMETER MIN MAX UNIT AVDD DVDD PVDD SVDD TVDD Supply Voltages -0.5 4.0 V VBUS USB Supply Voltage -0.5 5.5 V Table 6-1: Absolute Maximum Continuous Ratings

6.2 Operating Condition Range

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT Tamb Ambient Temperature -30 +25 +85 °C USB Supply Voltage (USB mode) VSS = 0V 4.2 5 5.25 V VBUS Supply Voltage (Non USB mode) VBUS= DVDD VSS = 0V 2.5 3.3 3.6 V TVDD, AVDD, DVDD Supply Voltages TVDD= AVDD= DVDD VSS = 0V 2.5 3.3 3.6 V PVDD Supply Voltage for host interface VSS = 0V 1.6 1.8 – 3.3 3.6 V SVDD Supply Voltage for SAM interface VSS = 0V 1.6 1.8 – 3.3 3.6 V Table 6-2: Operating Condition Range Note: 1. TVDD<3V reduces the performance (e.g. the achievable operating distance). 2. VSS represents DVSS, AVSS, TVSS1 and TVSS2

Philips Semiconductors Objective Short Form Specification Rev. 2.0 February 2004 PN531 µC based Transmission module

6.3 Curre nt Consumption

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT IHPD Hard Power Down Current (Not powered from USB) AVDD=DVDD=TVDD=PVDD=S VDD=3V, RF level detector off 10 µA ISPD Soft Power down Current (Not powered from USB) AVDD=DVDD=TVDD=PVDD=S VDD=3V, RF level detector on 30 µA Isupend USB suspend Current AVDD=DVDD=TVDD=PVDD=S VDD=3V, RF level detector on (without resistor on D+/D-) 250 µA IDVDD Digital Supply Current AVDD=DVDD=TVDD=PVDD=S VDD=3V, RF level detector on 15 mA Analog Supply Current AVDD=DVDD=TVDD=PVDD=S VDD=3V, RF level detector on 6 tbd mA IAVDD Analog Supply Current AVDD=DVDD=TVDD=PVDD=S VDD=3V, RF level detector off 3 tbd mA IPVDD Pad Supply Current tbd mA ISVDD Pad Supply Current for SAM interface tbd mA ITVDD Transmitter Supply Current Continuous Wave, TVDD=3V 60 100 mA Table 6-3: Current Consumption Note: 1. TVDD depends on TVDD and the external circuitry connected to Tx1 and Tx2. 2. DVDD depends on the system configuration. 3. PVDD depends on the overall load at the digital pins. 4. SVDD depends on the overall load at the digital pins. 5. During operation with a typical circuitry the overall current is below 100 mA. Typical value using a complementary driver configuration and an antenna matched to 40 Ohm between TX1 and TX2 at 13.56 MHz.

7 REVISION HISTORY

2.0 February

2004 Second published version, change to public

1.0 April2003 First published version

Table 7: Document Revision History

Philips Semiconductors Objective Short Form Specification Rev.2.0 February 2004 PN531 µC based Transmission module

8 DEFINITIO NS

Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics section of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

9 LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to resu lt in personal injury. Philip s customers using or selling these products for use in such applications do so on their own ri sk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.

Philips Semiconductors - a worldwide company Contact Information For additional information please visit http://www.semiconductors.philips.com.Fax: +31 40 27 24825 © Koninklijke Philips Electronics N.V. 2002 SCA74 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without any notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. P h i l i S e m p i s c o n d u c t o r s