PMPB20UN NEXPERIA | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 14
Technical content
Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. use http://www.nexperia.com salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e -mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia
20 V, single N-channel Trench MOSFET
12 September 2012 Product data sheet
1.1 General description
1.2 Features and benefits
- Trench MOSFET technology
- Small and leadless ultra thin SMD plastic package: 2 x 2 x 0.65 mm
- Exposed drain pad for excellent thermal conduction
- Tin-plated 100 % solderable side pads for optical solder inspection
1.3 Applications
- Charging switch for portable devices
- DC-to-DC converters
- Power management in battery-driven portable devices
- Hard disk and computing power management
1.4 Quick reference data
Table 1. Quick reference data
Table 2. Pinning information
1 D drain
2 D drain
3 G gate
4 S source
5 D drain
6 D drain
7 D drain
8 S source
Table 3. Ordering information Table 4. Marking codes Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
NXP Semiconductors PMPB20UN PMPB20UN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved Product data sheet 12 September 2012 3 / 13 Symbol Parameter Conditions Min Max Unit Tamb = 25 °C; t ≤ 5 s [1] - 3.5 W Tsp = 25 °C - 12.5 W Tj junction temperature -55 150 °C Tamb ambient temperature -55 150 °C Tstg storage temperature -65 150 °C Source-drain diode IS source current Tamb = 25 °C [1] - 1.8 A [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for drain 6 cm2. Tj (°C) - 75 17512525 75- 25 017aaa123 120 Pder (%) Fig. 1. Normalized total power dissipation as a function of junction temperature Tj (°C) - 75 17512525 75- 25 017aaa124 120 Ider (%) Fig. 2. Normalized continuous drain current as a function of junction temperature
Table 6. Thermal characteristics [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 6 cm2.
Table 7. Characteristics
NXP Semiconductors PMPB20UN PMPB20UN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved Product data sheet 12 September 2012 6 / 13 Symbol Parameter Conditions Min Typ Max Unit VGS = 8 V; VDS = 0 V; Tj = 25 °C - - 100 nA VGS = 4.5 V; ID = 6.6 A; Tj = 25 °C - 19 25 mΩ VGS = 4.5 V; ID = 6.6 A; Tj = 150 °C - 30 39 mΩ VGS = 2.5 V; ID = 5.6 A; Tj = 25 °C - 25 34 mΩ RDSon drain-source on-state resistance VGS = 1.8 V; ID = 1.7 A; Tj = 25 °C - 36 57 mΩ gfs forward transconductance VDS = 10 V; ID = 6.6 A; Tj = 25 °C - 25 - S RG gate resistance f = 1 MHz - 1.2 - Ω Dynamic characteristics QG(tot) total gate charge - 4.7 7.1 nC QGS gate-source charge - 0.8 - nC QGD gate-drain charge VDS = 10 V; ID = 6.6 A; VGS = 4.5 V; Tj = 25 °C - 1.2 - nC Ciss input capacitance - 460 - pF Coss output capacitance - 135 - pF Crss reverse transfer capacitance VDS = 10 V; f = 1 MHz; VGS = 0 V; Tj = 25 °C - 75 - pF td(on) turn-on delay time - 7 - ns tr rise time - 19 - ns td(off) turn-off delay time - 17 - ns tf fall time VDS = 10 V; ID = 6.6 A; VGS = 4.5 V; RG(ext) = 6 Ω; Tj = 25 °C - 26 - ns Source-drain diode VSD source-drain voltage IS = 1.8 A; VGS = 0 V; Tj = 25 °C - 0.7 1.2 V VDS (V) 0 431 2 017aaa817 ID (A) 4.5 V 2.5 V 1.6 V 1.4 V 1.2 V VGS = 1.8 V 2 V 1 V Tj = 25 °C Fig. 6. Output characteristics: drain current as a function of drain-source voltage; typical values 017aaa818 VGS (V) 0 1.51.00.5 10-5 10-4 10-3 10-2 ID (A) 10-6 min typ max Tj = 25 °C; VDS = 5 V Fig. 7. Sub-threshold drain current as a function of gate-source voltage
NXP Semiconductors PMPB20UN PMPB20UN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved Product data sheet 12 September 2012 7 / 13 ID (A) 0 252010 155 017aaa819 0.04 0.06 0.02 0.08 0.10 RDSon (Ω) 1.4 V 1.6 V 1.8 V 2 V 2.2 V 2.5 V VGS = 4.5 V Tj = 25 °C Fig. 8. Drain-source on-state resistance as a function of drain current; typical values VGS (V) 0 542 31 017aaa820 0.04 0.06 0.02 0.08 0.10 RDSon (Ω) Tj = 25 °C Tj = 150 °C ID = 7 A Fig. 9. Drain-source on-state resistance as a function of gate-source voltage; typical values 017aaa821 VGS (V) 0 321 ID (A) Tj = 150 °C Tj = 25 °C VDS > ID × RDSon Fig. 10. Transfer characteristics: drain current as a function of gate-source voltage; typical values Tj (°C) -60 1801200 60 017aaa822 1.0 1.5 2.0 a Fig. 11. Normalized drain-source on-state resistance as a function of junction temperature; typical values
NXP Semiconductors PMPB20UN PMPB20UN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved Product data sheet 12 September 2012 8 / 13 Tj (°C) -60 1801200 60 017aaa823 0.5 1.0 1.5 VGS(th) (V) max typ min ID = -0.25 mA; VDS = VGS Fig. 12. Gate-source threshold voltage as a function of junction temperature 017aaa824 VDS (V) 10-1 102101 102 103 C (pF) Ciss Coss Crss f = 1 MHz; VGS = 0 V Fig. 13. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values QG (nC) 0 542 31 017aaa825 1.5 3.0 4.5 VGS (V) ID = 6 A; VDS = 10 V; Tamb = 25 °C Fig. 14. Gate-source voltage as a function of gate charge; typical values 017aaa137 VGS VGS(th) QGS1 QGS2 QGD VDS QG(tot) ID QGS VGS(pl) Fig. 15. Gate charge waveform definitions
NXP Semiconductors PMPB20UN PMPB20UN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved Product data sheet 12 September 2012 9 / 13 VDS (V) 0 0.80.60.2 0.4 017aaa826 0.6 1.2 1.8 IS (A) Tj = 150 °C Tj = 25 °C VGS = 0 V Fig. 16. Source current as a function of source-drain voltage; typical values 8. Test information P t 006aaa812 duty cycle δ = Fig. 17. Duty cycle definition
NXP Semiconductors PMPB20UN PMPB20UN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved Product data sheet 12 September 2012 10 / 13 9. Package outline ReferencesOutline version European projection Issue date IEC JEDEC JEITA SOT1220 sot1220_po 12-04-23 12-04-30 Unit mm min nom max 1.9 1.0 0.65 A Dimensions (mm are the original dimensions) Note 1. Dimension A is including plating thickness. DFN2020MD-6: plastic thermal enhanced ultra thin small outline package; no leads; 6 terminals; body 2 x 2 x 0.65 mm SOT1220 A1 bp 0.25 D D1 E1 E2 e 0.27 0.64 J1 Lp v 0.05 y 0.1 0.511.1 0.2 0.1 scale J 0 2 mm 0.2 0.3 D2 E 1.9 2.1 (8×) X detail X A J Lp e e pin 1 index area solderable lead end protrusion max. 0.02 mm (6×) pin 1 index area B AE D bp (6×) C yCy1 A Bv Fig. 18. Package outline DFN2020MD-6 (SOT1220)
NXP Semiconductors PMPB20UN PMPB20UN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved Product data sheet 12 September 2012 11 / 13 10. Soldering 1.35 1.25 1.05 0.9 1.1 1.2 2.5 0.935 0.935 SOT1220Footprint information for reflow soldering of DFN2020MD-6 package sot1220_froccupied area solder land solder resist solder land plus solder paste solder paste deposit Dimensions in mm 0.33 (6×) 0.76 0.66 0.56 0.25 0.35 0.45 0.25 (6×) 0.35 (6×) 0.65 0.65 0.45 (6×) 0.43 (6×) 0.53 (6×) 2.06 0.775 0.285 Fig. 19. Reflow soldering footprint for DFN2020MD-6 (SOT1220)
Table 8. Revision history
NXP Semiconductors PMPB20UN PMPB20UN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved Product data sheet 12 September 2012 13 / 13 13. Contents © NXP B.V. 2012. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 12 September 2012