PM75CLA060

PM75CLA060 MITSUBISHI | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 6

Technical content

Apr. 2004 MITSUBISHI <INTELLIGENT POWER MODULES> PM75CLA060 FLAT-BASE TYPE INSULATED PACKAGE PM75CLA060 FEATURE a) Adopting new 5th generation IGBT (CSTBT) chip, which performance is improved by 1µm fine rule process. For example, typical Vce(sat)=1.5V @Tj=125°C b) I adopt the over-temperature conservation by Tj detection of CSTBT chip, and error output is possible from all each con- servation upper and lower arm of IPM. c) New small package Reduce the package size by 10%, thickness by 22% from S-DASH series.

• 3φ 75A, 600V Current-sense IGBT type inverter
• Monolithic gate drive & protection logic
• Detection, protection & status indication circuits for, short- circuit, over-temperature & under-voltage (P-Fo available from upper arm devices)
• Acoustic noise-less 5.5kW/7.5kW class inverter application APPLICATION General purpose inverter, servo drives and other motor controls PACKAGE OUTLINES Dimensions in mm 106 19.75 3.25 16 15.25 2-φ5.5 6-M5 NUTS MOUNTING HOLES6-23-23-23-2 B NP UV W 10.75 12 (SCREWING DEPTH) 19-I 0.5 32.75 23 23 23 5511.75 13.5 17.5 17.5 19.75 14.5 1616 12011 1. VUPC 2. UFO 3. UP 4. VUP1 5. VVPC 6. VFO 7. VP 8. VVP1 9. VWPC 10. WFO 11. WP 12. VWP1 13. VNC 14. VN1 15. NC 16. UN 17. VN 18. WN 19. Fo Terminal code 159 1 3 1 9 12 22 + – 1 0.5 2-φ2.5

MITSUBISHI <INTELLIGENT POWER MODULES> PM75CLA060 FLAT-BASE TYPE INSULATED PACKAGE Apr. 2004 VCES ±IC ±ICP PC Tj Collector-Emitter Voltage Collector Current Collector Current (Peak) Collector Dissipation Junction Temperature V D = 15V, VCIN = 15V TC = 25°C TC = 25°C TC = 25°C (Note-1) V A A W MAXIMUM RATINGS (Tj = 25°C, unless otherwise noted) INVERTER PART Symbol Parameter Condition Ratings Unit 600 150 297 –20 ~ +150 INTERNAL FUNCTIONS BLOCK DIAGRAM VFO IFO CONTROL PART V mA Supply Voltage Input Voltage Fault Output Supply Voltage Fault Output Current Symbol Parameter Condition Ratings Unit Applied between : VUP1 -VUPC VVP1 -VVPC , VWP1 -VWPC , VN1 -VNC Applied between : UP-VUPC , VP-VVPC W P-VWPC , UN • VN • WN -VNC Applied between : UFO -VUPC , VFO -VVPC , WFO -VWPC FO -VNC Sink current at UFO , VFO , WFO , FO terminals VD VCIN V V VN U N W P VWP1 WF OVWPC VP VVP1 VF OVVPC U P VUP1 UF OVUPCNC NC N W V U P Fo V NC VN1W N Gnd In Fo Vcc Gnd Si Out OT Gnd In Fo Vcc Gnd Si Out OT Gnd In Fo Vcc Gnd Si Out OT Gnd In Fo Vcc Gnd Si Out OT Gnd In Fo Vcc Gnd Si Out OT Gnd In Fo Vcc Gnd Si Out OT

MITSUBISHI <INTELLIGENT POWER MODULES> PM75CLA060 FLAT-BASE TYPE INSULATED PACKAGE Apr. 2004 ParameterSymbol Supply Voltage Protected by SC Supply Voltage (Surge) Module Case Operating Temperature Storage Temperature Isolation Voltage Condition V CC(surge) TC Tstg Viso Ratings VCC(PROT) 400 500 –20 ~ +100 –40 ~ +125 2500 Unit V Vrms V VD = 13.5 ~ 16.5V, Inverter Part, Tj = +125°C Start Applied between : P-N, Surge value (Note-1) 60Hz, Sinusoidal, Charged part to Base, AC 1 min. (Note-1) Tc (base plate) measurement point is below. 2.1 2.0 3.3 2.4 0.4 1.0 2.5 1.0 Min. Typ. Max. Collector-Emitter Saturation Voltage Collector-Emitter Cutoff Current C = 75A, VD = 15V, VCIN = 15V (Fig. 2) Tj = 25°C Tj = 125°C ELECTRICAL CHARACTERISTICS (Tj = 25°C, unless otherwise noted) INVERTER PART ParameterSymbol Condition VCE(sat) ICES VEC ton trr tc(on) toff tc(off) Limits 0.5 1.6 1.5 2.2 1.0 0.2 0.4 1.2 0.5 T j = 25°C Tj = 125°C FWDi Forward Voltage Switching Time VD = 15V, VCIN = 0V↔ 15V VCC = 300V, IC = 75A Tj = 125°C Inductive Load (Fig. 3,4) VCE = VCES , VCIN = 15V (Fig. 5) VD = 15V, IC = 75A VCIN = 0V, Pulsed (Fig. 1) TOTAL SYSTEM V mA V µs Unit 0.32* 0.53* 0.42 0.69 0.038 °C/W R th(j-c)Q R th(j-c)F R th(j-c)Q R th(j-c)F R th(c-f) Inverter IGBT part (per 1/6) (Note-2) Inverter FWDi part (per 1/6) (Note-2) Inverter IGBT part (per 1/6) (Note-1) Inverter FWDi part (per 1/6) (Note-1) Case to fin, (per 1 module) Thermal grease applied (Note-1) Symbol Condition UnitMin. Junction to case Thermal Resistances THERMAL RESISTANCES Contact Thermal Resistance Parameter Limits Typ. Max. UP IGBT 28.7 –6.6 VP WP UN VN WN FWDi 28.7 0.8 IGBT 65.2 –6.6 FWDi 65.2 2.5 IGBT 85.3 –6.6 FWDi 85.3 2.5 IGBT 38.0 4.6 FWDi 38.0 –4.5 IGBT 55.4 4.6 FWDi 55.4 –4.5 IGBT 75.5 4.6 FWDi 75.5 –4.5 arm axis X Y Bottom view Top view Tc B NP UV W * If you use this value, Rth(f-a) should be measured just under the chips. (Note-2) Tc (under the chip) measurement point is below. (unit : mm)

MITSUBISHI <INTELLIGENT POWER MODULES> PM75CLA060 FLAT-BASE TYPE INSULATED PACKAGE Apr. 2004 µs V mA ms VD = 15V Detect Tj of IGBT chip –20 ≤ Tj ≤ 125°C VD = 15V, VFO = 15V (Note-3) VD = 15V (Note-3) –20≤ Tj ≤ 125°C, VD = 15V (Fig. 3,6) VD = 15V (Fig. 3,6) 3.5 3.5 Main terminal screw : M5 Mounting part screw : M5 Symbol Parameter Mounting torque Mounting torque Weight Condition Unit N • m N • m g Limits Min. Typ. Max. 2.5 2.5 3.0 3.0 380 MECHANICAL RATINGS AND CHARACTERISTICS VD = 15V, VCIN = 15V Applied between : UP-VUPC , VP-VVPC , WP-VWPC U N • VN • WN -VNC ID 25 1.8 2.3 12.5 0.01 mACircuit Current Input ON Threshold Voltage Input OFF Threshold Voltage Short Circuit Trip Level Short Circuit Current Delay Time Over Temperature Protection Supply Circuit Under-Voltage Protection Fault Output Current Minimum Fault Output Pulse Width V th(ON) Vth(OFF) SC toff(SC) OT OT r UV UV r IFO(H) IFO(L) tFO Trip level Reset level Trip level Reset level CONTROL PART 1.2 1.7 150 135 11.5 1.0 ParameterSymbol Condition Max.Min. Typ. Unit Limits 1.5 2.0 0.2 145 125 12.0 12.5 1.8 (Note-3) Fault output is given only when the internal SC, OT & UV protections schemes of either upper or lower arm device operate to protect it. V VN1 -VNC VXP1 -VXPC A RECOMMENDED CONDITIONS FOR USE Recommended value UnitConditionSymbol Parameter VApplied across P-N terminals Applied between : VUP1 -VUPC , VVP1 -VVPC VWP1 -VWPC , VN1 -VNC (Note-4) Applied between : UP-VUPC , VP-VVPC , WP-VWPC U N • VN • WN -VNC Using Application Circuit of Fig. 8 For IPM’s each input signals (Fig. 7) Supply Voltage Control Supply Voltage Input ON Voltage Input OFF Voltage PWM Input Frequency Arm Shoot-through Blocking Time ≤ 400 15 ± 1.5 ≤ 0.8 ≥ 9.0 ≤ 20 ≥ 2.0 VCC VCIN(ON) VCIN(OFF) fPWM tdead VD V kHz µs V (Note-4) With ripple satisfying the following conditions dv/dt swing ≤ ±5V/µs, Variation ≤ 2V peak to peak

MITSUBISHI <INTELLIGENT POWER MODULES> PM75CLA060 FLAT-BASE TYPE INSULATED PACKAGE Apr. 2004 PRECAUTIONS FOR TESTING 1. Before appling any control supply voltage (VD ), the input terminals should be pulled up by resistores, etc. to their corre- sponding supply voltage and each input signal should be kept off state. After this, the specified ON and OFF level setting for each input signal should be done. 2. When performing “SC ” tests, the turn-off surge voltage spike at the corresponding protection operation should not be al- lowed to rise above VCES rating of the device. (These test should not be done by using a curve tracer or its equivalent.) P, (U,V,W) U,V,W, (N) U,V,W, (N)VD (all) IN Fo IN Fo VD (all) VCIN (0V) IcV V P, (U,V,W) VCIN (15V) –Ic Fig. 7 Dead time measurement point example Fig. 1 VCE(sat) Test Fig. 2 V EC Test 0V 1.5V 1.5V 1.5V2V 2V0V t t tdeadtdeadtdead 1.5V: Input on threshold voltage Vth(on) typical value, 2V: Input off threshold voltage Vth(off) typical value IPM’ input signal VCIN (Upper Arm) IPM’ input signal VCIN (Lower Arm) 10% 90% trr Irr trtd(on) tc(on) tc(off) td(off) VCIN Ic VCE 10%10% 10% 90% tf (ton= td(on) + tr) (toff= td(off) + tf) Fo Fo P N N C S C S U,V,W Vcc Vcc Ic IcVD (all) VD (all) P U,V,W VCIN VCIN VCIN (15V) VCIN (15V) Fo Fo Fig. 3 Switching time and SC test circuit Fig. 4 Switching time test waveform a) Lower Arm Switching Signal input (Upper Arm) Signal input (Lower Arm) Signal input (Upper Arm) Signal input (Lower Arm) b) Upper Arm Switching VCIN Fig. 5 ICES Test Fig. 6 SC test waveform SC Short Circuit Current toff(SC) VD (all) U,V,W, (N) P, (U,V,W) A Pulse VCEVCIN (15V) Ic Fo IN Fo Constant Current

MITSUBISHI <INTELLIGENT POWER MODULES> PM75CLA060 FLAT-BASE TYPE INSULATED PACKAGE Apr. 2004 NOTES FOR STABLE AND SAFE OPERATION ;

• Design the PCB pattern to minimize wiring length between opto-coupler and IPM’s input terminal, and also to minimize the stray capacity between the input and output wirings of opto-coupler.
• Connect low impedance capacitor between the Vcc and GND terminal of each fast switching opto-coupler.
• Fast switching opto-couplers: tPLH , tPHL ≤ 0.8µs, Use High CMR type.
• Slow switching opto-coupler: CTR > 100%
• Use 4 isolated control power supplies (VD ). Also, care should be taken to minimize the instantaneous voltage charge of the power supply.
• Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N terminal.
• Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line and improve noise immunity of the system. : Interface which is the same as the U-phase Fig. 8 Application Example Circuit OUT Si OT OT OT OT OT OT GNDGND In Vcc U V W NC N P M IF OUT Si GNDGND In Vcc OUT Si GNDGND In Vcc OUT Si GNDGND In Fo Fo Fo Fo Vcc OUT Si GNDGND In Fo Vcc OUT Si GNDGND In Fo Vcc VWP1 WP VWPC UN VN VN1 WN VNC Rfo Rfo Rfo RfoFo VVP1 VP VVPC ≥0.1µ 1kΩ ≥0.1µ ≥0.1µ 20kΩ 20kΩ 20kΩ ≥10µ ≥10µ ≥10µ 20kΩ ≥10µ ≥0.1µ Fo Fo Fo VUP1 UP VUPC NC IF IF IF VD VD VD VD