PI7C9X2G308GP PERICOM | Alldatasheet
Document overview
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Technical content
Features
Industry Specifications Compliance ÎÎ PCI Express® Base Specification, Revision 2.1 ÎÎ PCI Express CEM Specification, Revision 2.0 ÎÎ PCI-to-PCI Bridge Architecture Spec., Rev 1.2 ÎÎ Advanced Configuration Power Interface (ACPI) ÎÎ Specification ÎÎ SMBus interface support Enhanced Features Part Number Package PB-Free & Green Temperature PI7C9X2G308GPANJEX† 196 LBGA YES -40oC TO 85oC PI7C9X2G308GPAEVB Board Board Evaluation kit for PI7C9X2G308GPA
Ordering Information
Applications
ÎÎ NAS/ Storage ÎÎ Server ÎÎ HBA / Combo cards ÎÎ Embedded system ÎÎ IPC/ Industrial control ÎÎ Automotive ÎÎ Wireless AP/ Switch Router ÎÎ Wired/ Wireless Tele/ data communication ÎÎ Printer/ MFP/ Peripheral ÎÎ Surveillance/ Security ÎÎ Set-top box and consumer devices ÎÎ NB/ PC Motherboard PCIe slot expansion ÎÎ PCISIG PCI Express 2.1 certificated ÎÎ Integrated 100MHz Clock buffer for each downstream port ÎÎ Reliability, Availability and Serviceability o Supports Data Poisoning and End-to-End CRC o Advanced Error Reporting and Logging ÎÎ Device State Power Management o Supports D0, D3Hot and D3Cold device power states ÎÎ Advanced Power Savings o Empty downstream ports are set to idle ÎÎ Programmable driver current and de-emphasis level at each individual port ÎÎ Port Arbitration: Round Robin (RR), Weighted RR and Time-based Weighted RR ÎÎ Extended Virtual Channel capability o Two Virtual Channels (VC) and Eight Traffic Class (TC) support o Independent TC/VC mapping for each port ÎÎ Supports Isochronous Traffic o Isochronous traffic class mapped to VC1 only ÎÎ Supports “Cut-through”(Default) as well as “Store and Forward” mode for switching packets ÎÎ Peer-to-peer switching between any two downstream ports ÎÎ Supports up to 512-byte maximum payload size ÎÎ Power Dissipation: 1.3 W typical in L0 normal mode (Including clock buffer Pd) ÎÎ Industrial Temperature Range: -40 oC to 85oC ÎÎ MTBF: 50, 927, 360 hours ÎÎ Package: 196-pin LBGA 15mm x 15mm o Pb free and 100% Green ÎÎ 150ns typical latency for packet running through switch without blocking ÎÎ Link Power Management o Supports L0, L0s, L1, L2, L2/L3Ready and L3 link power states o Active state power management for L0s and L1 states o Supports PCI-PM and ASPM of L1.1 PM Sub-state ÎÎ Supports Device Specific PME Turn-Off Message for each downstream port ÎÎ Supports Access Control Service (ACS) for peer-to-peer traffic ÎÎ Supports Address Translation (AT) packet for SR-IOV application ÎÎ Supports OBFF and LTR ÎÎ Supports Serial Hot Plug Controller † Note: Adding an X suffix =Tape/Reel PCI®, PCIe® and PCI Express® are registered trademarks of the PCI SIG® (www.pcisig.org)