PI74FCT162374T

PI74FCT162374T PERICOM | Alldatasheet

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PI74FCT16374/162374/162H374T 16-BIT REGISTERS (3-STATE)

1 PS2034A 03/28/01

1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 21234567890121234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 Product Description: Pericom Semiconductor’s PI74FCT series of logic circuits are produced in the Company’s advanced 0.6 micron CMOS technology, achieving industry leading speed grades. The PI74FCT16374T, PI74FCT162374T, and PI74FCT162H374T are 16-bit octal registers designed with 16 D-type flip-flops with a buffered common clock and 3-state outputs. The Output Enable (xOE) and clock (xCLK) controls are organized to operate as two 8-bit registers or one 16-bit register. When OE is HIGH, the outputs are in the high impedance state. Input data meeting the setup and hold time requirements of the D inputs is transferred to the O outputs on the LOW-to-HIGH transition of the clock input. The PI74FCT16374T output buffers are designed with a Power-Off disable allowing “live insertion” of boards when used as backplane drivers. The PI74FCT162374T has ±24 mA balanced output drivers. It is designed with current limiting resistors at its outputs to control the output edge rate resulting in lower ground bounce and undershoot. This eliminates the need for external terminating resistors for most interface applications. The PI74FCT162H374T has “Bus Hold” which retains the input’s last state whenever the input goes to high-impedance preventing “floating” inputs and eliminating the need for pull-up/down resistors. Product Features: Common Features:  PI74FCT16374T, PI74FCT162374T, and PI74FCT162H374T are high-speed, low power devices with high current drive.  Vcc = 5V ±10%  Hysteresis on all inputs  Packages available: – 48-pin 240 mil wide plastic TSSOP (A) – 48-pin 300 mil wide plastic SSOP (V) PI74FCT16374T Features:  High output drive: I OH = –32 mA; IOL = 64 mA  Power off disable outputs permit "live insertion"  Typical V OLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C PI74FCT162374T Features:  Balanced output drivers: ±24 mA  Reduced system switching noise  Typical V OLP (Output Ground Bounce) < 0.6V at VCC = 5V, TA = 25°C PI74FCT162H374T Features:  Bus Hold retains last active bus state during 3-state  Eliminates the need for external pull-up resistors Logic Block Diagram PI74FCT16374T PI74FCT162374T PI74FCT162H374T Fast CMOS 16-Bit Registers (3-State) 1OE 1CLK 1O0 C D1D0 TO 7 OTHER CHANNELS 2OE 2CLK 2O0 C D2D0 TO 7 OTHER CHANNELS

PI74FCT16374/162374/162H374T 16-BIT REGISTERS (3-STATE)

2 PS2034A 03/28/01

1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 21234567890121234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1OE 1O0 1O1 GND 1O2 1O3 VCC 1O4 1O5 GND 1O6 1O7 2O0 2O1 GND 2O2 2O3 VCC 2O4 2O5 GND 2O6 2O7 2OE 1CLK 1D0 1D1 GND 1D2 1D3 VCC 1D4 1D5 GND 1D6 1D7 2D0 2D1 GND 2D2 2D3 VCC 2D4 2D5 GND 2D6 2D7 2CLK Product Pin Description Pin Name Description xOE 3-State Output Enable Inputs (Active LOW) xCLK Clock Inputs xDx Inputs (1) xOx 3-State Outputs GND Ground VCC Power Inputs Outputs Function XDXX CLK XOE XOX High-Z X L H Z XHH Z Truth Table(1) Note: 1. H = High Voltage Level L = Low Voltage Level X = Don’t Care Z = High Impedance ↑↑↑↑↑ = LOW-to-HIGH transition Note: 1. For the PI74FCT162H374T, these pins have “Bus Hold.” All other pins are standard, outputs, or I/Os. Product Pin Configuration 48-PIN V48 A48

PI74FCT16374/162374/162H374T 16-BIT REGISTERS (3-STATE)

3 PS2034A 03/28/01

1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 21234567890121234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 Parameters Description Test Conditions(1) Min. Typ (2) Max. Units VIH Input HIGH Voltage Guaranteed Logic HIGH Level 2.0 V VIL Input LOW Voltage Guaranteed Logic LOW Level 0.8 V IIH Input HIGH Current Standard Input , VCC = Max. V IN = VCC 1µ A IIH Input HIGH Current Standard I/O , VCC = Max. V IN = VCC 1µ A IIH Input HIGH Current Bus Hold Input (4), VCC = Max. V IN = VCC ±100 µA IIH Input HIGH Current Bus Hold I/O (4), VCC = Max. V IN = VCC ±100 µA IIL Input LOW Current Standard Input , VCC = Min. V IN = GND –1 µA IIL Input LOW Current Standard I/O , VCC = Min. V IN = GND –1 µA IIL Input LOW Current Bus Hold Input (4), VCC = Min. V IN = GND ±100 µA IIL Input LOW Current Bus Hold I/O (4), VCC = Min. V IN = GND ±100 µA IBHH Bus Hold Bus Hold Input (4), VCC = Min. V IN = 2.0V –50 µA IBHL Sustain Current V IN = 0.8V +50 IOZH(5) High Impedance V CC = Max. V OUT = 2.7V 1 µA IOZL(5) Output Current V CC = Max. V OUT = 0.5V –1 µA VIK Clamp Diode Voltage V CC = Min., IIN = –18 mA –0.7 –1.2 V IOS Short Circuit Current V CC = Max.(3), VOUT = GND –80 –140 –200 mA IO Output Drive Current V CC = Max.(3), VOUT = 2.5V –50 –180 mA VH Input Hysteresis 100 m V Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. Pins with Bus Hold are identified in the pin description. 5. This specification does not apply to bi-directional functionalities with Bus Hold.

PI74FCT16374/162374/162H374T 16-BIT REGISTERS (3-STATE)

4 PS2034A 03/28/01

1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 21234567890121234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI74FCT16374T Output Drive Characteristics (Over the Operating Range) Parameters Description Test Conditions(1) Min. Typ (2) Max. Units VOH Output HIGH Voltage V CC = Min., VIN = VIH or VIL IOH = –3.0 mA 2.5 3.5 V IOH = –15.0 mA 2.4 3.5 IOH = –32.0 mA 2.0 3.0 VOL Output LOW Voltage V CC = Min., VIN = VIH or VIL IOL = 64 mA 0.2 0.55 V IOFF Power Down Disable V CC = 0V, VIN or VOUT ≤≤≤≤≤4.5V — — ±100 µA PI74FCT162374T/162H374T Output Drive Characteristics (Over the Operating Range) Parameters Description Test Conditions(1) Min. Typ (2) Max. Units VOH Output HIGH Voltage V CC = Min., VIN = VIH or VIL IOH = –24.0 mA 2.4 3.3 V VOL Output LOW Voltage V CC = Min., VIN = VIH or VIL IOL = 24 mA 0.3 0.55 V IODL Output LOW Current V CC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3) 60 115 150 mA IODH Output HIGH Current V CC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3) –60 –115 –150 mA Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type . 2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is determined by device characterization but is not production tested. Capacitance (TA = 25°C, f = 1 MHz) Parameters(4) Description Test Conditions Typ Max. Units CIN Input Capacitance V IN = 0V 4.5 6 pF COUT Output Capacitance V OUT = 0V 5.5 8 pF

PI74FCT16374/162374/162H374T 16-BIT REGISTERS (3-STATE)

5 PS2034A 03/28/01

1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 21234567890121234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 Power Supply Characteristics Parameters Description Test Conditions (1) Min. Typ (2) Max. Units ICC Quiescent Power V CC = Max. V IN = GND or VCC 0.1 500 µA Supply Current ∆ICC Supply Current per V CC = Max. V IN = 3.4V(3) 0.5 1.5 mA Input @ TTL HIGH ICCD Supply Current per V CC = Max., V IN = VCC 60 100 µA/ Input per MHz(4) Outputs Open V IN = GND MHz XOE = GND One Bit Toggling 50% Duty Cycle IC Total Power Supply V CC = Max., V IN = VCC 0.6 1.5 (5) mA Current(6) Outputs Open V IN = GND fCP = 10 MHZ 50% Duty Cycle XOE = GND V IN = 3.4V 1.1 3.0 (5) fI = 5 MHZ VIN = GND 50% Duty Cycle One Bit Toggling V CC = Max., V IN = VCC 3.0 5.5 (5) Outputs Open V IN = GND fCP = 10 MHZ 50% Duty Cycle XOE = GND V IN = 3.4V 7.5 19.0 (5)

16 Bits Toggling V IN = GND

fI = 2.5 MHZ 50% Duty Cycle Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at Vcc = 5.0V, +25°C ambient. 3. Per TTL driven input (V IN = 3.4V); all other inputs at Vcc or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested. 6. I C =IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fINI) ICC = Quiescent Current ∆ICC = Power Supply Current for a TTL High Input (V IN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at D H ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fI = Input Frequency NI = Number of Inputs at f I All currents are in milliamps and all frequencies are in megahertz.

PI74FCT16374/162374/162H374T 16-BIT REGISTERS (3-STATE)

6 PS2034A 03/28/01

1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 21234567890121234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI74FCT16374T Switching Characteristics over Operating Range 16374T 16374AT 16374CT 16374DT 16374ET Parameters Description Conditions (1) Min Max Min Max Min Max Min Max Min Max Unit tPHL xCLKx to xOx R L = 500Ω tPZL xOE to xOx tPLZ xOE to xOx or LOW, XDX to XCLK or LOW, XDX to XCLK HIGH or LOW (3) PI74FCT162374T Switching Characteristics over Operating Range 162374T 162374AT 162374CT 162374DT 162374ET Parameters Description Conditions (1) Min Max Min Max Min Max Min Max Min Max Unit tPHL xCLKx to xOx R L = 500Ω tPZL xOE to xOx tPLZ xOE to xOx or LOW, XDX to XCLK or LOW, XDX to XCLK HIGH or LOW (3) Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not production tested. 4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.

PI74FCT16374/162374/162H374T 16-BIT REGISTERS (3-STATE)

7 PS2034A 03/28/01

1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 21234567890121234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI74FCT162H374T Switching Characteristics over Operating Range 162H374T 162H374AT 162H374CT 162H374DT 162H374ET Parameters Description Conditions (1) Min Max Min Max Min Max Min Max Min Max Unit tPHL xCLKx to xOx R L = 500Ω tPZL xOE to xOx tPLZ xOE to xOx or LOW, XDX to XCLK or LOW, XDX to XCLK HIGH or LOW (3) Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not production tested. 4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design. Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131  1-800-435-2336  Fax (408) 435-1100  http://www.pericom.com