PI6LC48H04LIEX

PI6LC48H04 PERICOM | Alldatasheet

Document overview

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Technical content

Features

ÎÎ PCIe® 3.0/2.0/1.0 compliant à P CIe 3.0 Phase jitter - 0.45ps RMS (High Freq. Typ.) ÎÎ LVDS compatible outputs ÎÎ Supply voltage of 3.3V±5% and 2.5V±5% ÎÎ 25MHz crystal or clock input frequency ÎÎ HCSL outputs, 0.7V low power differential pair ÎÎ Jitter 35ps cycle-to-cycle (typ) ÎÎ RMS phase jitter 12kHz ~ 20MHz @ 100MHz - 0.32ps (typ) ÎÎ RMS phase jitter 12kHz ~ 20MHz @ 125MHz, 156.25MHz, 200MHz - 0.3ps (typ) ÎÎ Industrial temperature range ÎÎ Packaging: (Pb-free and Green) à 2 0-pin TSSOP (L20) PCIe® 3.0 and Ethernet Clock Generator with 4 HCSL Outputs 15-0047

www.pericom.com PI6LC48H04 Rev .A 04/07/2015All trademarks are property of their respective owners. PI6LC48H04 PCIe 3.0 and Ethernet Clock Generator with 4 HCSL Outputs Pin Description Pin # Pin Name I/O Ty pe Description 1 VDDX Power Crystal supply pin. OE0&1 Input Pull-up Output enable pin for Q0+/- and Q1+/-. When HIGH, output is enabled and active. When LOW, output is disabled and in high impedance state. Don’t care if OE is LOW. Internal 343kΩpull-up resistor. Input Pull-up Frequency select pin. Internal 343kΩ pull-up resistor. Input Pull-up Frequency select pin. Internal 343kΩ pull-up resistor. XTAL_IN/CLK Input Crystal or clock input. Connect to a 25MHz crystal or single ended clock. XTAL_OUT Output Crystal output. Leave unconnected for clock input. PD# Input Pull-up Power down pin. When HIGH, the device is in normal operation. When LOW, the device is in power down mode and all outputs are in high impedance state. Internal 343kΩ pull-up resistor. OE Input Pull-up Output enable pin for all outputs. When HIGH, Q2+/- and Q3+/- are en abled and active and Q0+/- and Q1+/- depends on OE0&1. When LOW, all outputs are disabled and in high impedance state and not dependent on OE0&1. Internal 343kΩ pull-up resistor. GNDX Power Crystal ground. VSWING_ CTRL Input Pull-up and pull down VOH selection pin for all outputs. Tri-level selction for different voltage swings. 11,12 Q3-, Q3+ Output Low power HCSL clock output 3. 13,14 Q2-, Q2+ Output Low power HCSL clock output 2. VDDOA Power Analog and output supply pin. GNDOA Power Analog and output ground. 17,18 Q1-, Q1+ Output Low power HCSL clock output 1. 19,20 Q0-, Q0+ Output Low power HCSL clock output 0. Table 1: Output Select Table (25MHz Xtal Input) S1 S0 CLK(MHz) 156.25 100 125 200 (Default) Table 2: Output Enable Table OE OE0&1 Q0+/- Q1+/- Q2+/- Q3+/- HiZ HiZ HiZ HiZ HiZ HiZ HiZ HiZ HiZ HiZ Active Active 1 (Default) 1 (Default) Active Active Active Active Table 1a: Output Select Table (Generating other frequencies) Xtal Input Freq. S1 S0 CLK(MHz) 21.33MHz 133.3MHz 26.66MHz 133.3MHz Note: Above frequencies are only for the provided settings. Do not deviate from provided S1, S0 settings. For any other output frequencies, please contact Pericom 15-0047

www.pericom.com PI6LC48H04 Rev .A 04/07/2015All trademarks are property of their respective owners. PI6LC48H04 PCIe 3.0 and Ethernet Clock Generator with 4 HCSL Outputs Table 3: VSWING_CTRL Select Table VSWING_CTRL Output Amplitude (V) 0.63 Open (default) 0.75 0.87 15-0047

www.pericom.com PI6LC48H04 Rev .A 04/07/2015All trademarks are property of their respective owners. PI6LC48H04 PCIe 3.0 and Ethernet Clock Generator with 4 HCSL Outputs Electrical Specifications Recommended Operation Conditions Parameter Min. Ty p. Max. Unit Ambient Operating Temperature -40 +85 °C Power Supply Voltage (measured with respect to GND) 3.135 3.3 3.465 V 2.375 2.5 2.625 V Maximum Ratings (Above which useful life may be impaired. For user guidelines, not tested.) Note: Stresses greater than those listed under MAXI MUM RATINGS may cause permanent damage to the device. This is a stress rating only and func tional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Expo sure to absolute maximum rating conditions for extended periods may affect reliability. 15-0047

www.pericom.com PI6LC48H04 Rev .A 04/07/2015All trademarks are property of their respective owners. PI6LC48H04 PCIe 3.0 and Ethernet Clock Generator with 4 HCSL Outputs DC Characteristics (TA = -40°C to +85°C) Symbol Parameter Conditions Min. Ty p. Max. Unit VDD Supply Voltage 3.135 3.3 3.465 V 2.375 2.5 2.625 V VIH Input High Voltage(1) OE, S0, S1, OE0&1, PD# @ VDD=3.3V 2.0 VDD +0.3 V OE, S0, S1, OE0&1, PD# @ VDD=2.5V 1.7 VDD +0.3 V VSWING_CTRL @ VDD = 3.3V and 2.5V VDD x 0.7 VDD +0.3 V VIL Input Low Voltage(1) OE, S0, S1, OE0&1, PD# @ VDD=3.3V GND -0.3 0.8 V OE, S0, S1, OE0&1, PD# @ VDD=2.5V GND -0.3 0.7 V VSWING_CTRL @ VDD = 3.3V and 2.5V GND -0.3 VDD x 0.3 V IIH Input High Current OE, S0, S1, OE0&1, PD# with Vin = VDD -5 5 µA VSWING_CTRL with Vin = V DD 150 IIL Input Low Current OE, S0, S1, OE0&1, PD# with Vin = 0 -20 VSWING_CTRL with Vin = 0 -150 IDD (2) Operating Supply Current CL = 2pF 120 mA IDDOE OE = LOW 65 mA IDDPD Power Down Supply Current 50 µA CIN Input Capacitance @ 25MHz 7 pF COUT Output Capacitance @ 25MHz 6 pF Notes: 1. Single edge is monotonic when transitioning through region. 2. Total current consumption of device, inclusive of I DDOE 15-0047

www.pericom.com PI6LC48H04 Rev .A 04/07/2015All trademarks are property of their respective owners. PI6LC48H04 PCIe 3.0 and Ethernet Clock Generator with 4 HCSL Outputs HCSL Output AC Characteristics (VDD = 3.3V ±5%, TA = -40°C to +85°C) Symbol Parameter Conditions Min. Ty p. Max. Unit FIN Input Frequency 25 MHz FOUT Output Frequency 100 200 MHz VOH Output High Voltage (1,2) 100 MHz HCSL output @ VDD = 3.3V 660 800 900 mV VOL Output Low Voltage(1,2) 100 MHz HCSL output @ VDD = 3.3V -150 0 mV VCPA Crossing Point Voltage(1,2) Absolute @100MHz 250 350 550 mV VCN Crossing Point Voltage(1,2,4) Variation over all edges@100MHz 140 mV JCC Jitter, Cycle-to-Cycle(1,3) 35 60 ps JPeriod Period jitter 26 40 ps JPhase RMS Phase Jitter, (Random) 100MHz 25MHz Xtal input, 12kHz - 20MHz 0.32 0.5 ps 125MHz 25MHz Xtal input, 12kHz - 20MHz 0.3 0.5 ps 156.25MHz 25MHz Xtal input, 12kHz - 20MHz 0.3 0.5 ps 200MHz 25MHz Xtal input, 12kHz - 20MHz 0.3 0.5 ps JRMS2.0 PCIe 2.0 RMS Jitter PCIe 2.0 Test Method @ 100MHz Output 3.1 ps JRMS3.0 PCIe 3.0 RMS Jitter PLL L-BW @ 2M & 5M 1st H3 1.42 ps PLL L-BW @ 2M & 4M 1st H3 2.05 ps PLL H-BW @ 2M & 5M 1st H3 0.45 ps PLL H-BW @ 2M & 4M 1st H3 0.45 ps tOR Rise Time(1,2) From 0.175V to 0.525V 175 700 ps tOF Fall Time(1,2) From 0.525V to 0.175V 175 700 ps tRF Slew Rate Differential Slew Rate +150mV / -150mV 1.1 2.7 5.5 V/ns TSKEW Skew between outputs At Crossing Point Voltage 25 ps TDUTY-CYCLE Duty Cycle(1,3) 45 55 % TOE Output Enable Time(5) All outputs 10 μs TOT Output Disable Time(5) All outputs 10 μs tSTABLE Stabilization Time From Power-up VDD=3.3V 20 ms Notes: 1. CL = 2 pF 2. Single-ended waveform 3. Differential waveform 4. Measured at the crossing point 5. CLK pins are tri-stated when OE is LOW 15-0047

www.pericom.com PI6LC48H04 Rev .A 04/07/2015All trademarks are property of their respective owners. PI6LC48H04 PCIe 3.0 and Ethernet Clock Generator with 4 HCSL Outputs HCSL Output AC Characteristics (VDD = 2.5V ±5%, TA = -40°C to +85°C) Symbol Parameter Conditions Min. Ty p. Max. Unit FIN Input Frequency 25 MHz FOUT Output Frequency 100 200 MHz VOH Output High Voltage (1,2) 100 MHz HCSL output @ VDD = 2.5V 660 800 900 mV VOL Output Low Voltage(1,2) 100 MHz HCSL output @ VDD = 2.5V -150 0 mV VCPA Crossing Point Voltage(1,2) Absolute @100MHz 250 350 550 mV VCN Crossing Point Voltage(1,2,4) Variation over all edges@100MHz 140 mV JCC Jitter, Cycle-to-Cycle(1,3) 35 60 ps JPeriod Period jitter 26 40 ps JPhase RMS Phase Jitter, (Random) 100MHz 25MHz Xtal input, 12kHz - 20MHz 0.32 0.5 ps 125MHz 25MHz Xtal input, 12kHz - 20MHz 0.3 0.5 ps 156.25MHz 25MHz Xtal input, 12kHz - 20MHz 0.3 0.5 ps 200MHz 25MHz Xtal input, 12kHz - 20MHz 0.3 0.5 ps JRMS2.0 PCIe 2.0 RMS Jitter PCIe 2.0 Test Method @ 100MHz Output 3.1 ps JRMS3.0 PCIe 3.0 RMS Jitter PLL L-BW @ 2M & 5M 1st H3 1.42 ps PLL L-BW @ 2M & 4M 1st H3 2.05 ps PLL H-BW @ 2M & 5M 1st H3 0.45 ps PLL H-BW @ 2M & 4M 1st H3 0.45 ps tOR Rise Time(1,2) From 0.175V to 0.525V 175 700 ps tOF Fall Time(1,2) From 0.525V to 0.175V 175 700 ps tRF Slew Rate Differential Slew Rate +150mV / -150mV 1.1 2.7 5.5 V/ns TSKEW Skew between outputs At Crossing Point Voltage 25 ps TDUTY-CYCLE Duty Cycle(1,3) 45 55 % TOE Output Enable Time(5) All outputs 10 μs TOT Output Disable Time(5) All outputs 10 μs tSTABLE Stabilization Time From Power-up VDD=2.5V 20 ms Notes: 1. CL = 2 pF 2. Single-ended waveform 3. Differential waveform 4. Measured at the crossing point 5. CLK pins are tri-stated when OE is LOW 15-0047

www.pericom.com PI6LC48H04 Rev .A 04/07/2015All trademarks are property of their respective owners. PI6LC48H04 PCIe 3.0 and Ethernet Clock Generator with 4 HCSL Outputs

Application Information

Decoupling capacitors of 0.01μF should be connected between each VDD pin and the ground plane and placed as close to the V DD pin as possible. Crystal Use a 25MHz fundamental mode parallel resonant crystal with less than 300PPM of error across temperature. Crystal circuit connection The following diagram shows crystal circuit connection with a parallel crystal. For the CL=18pF crystal, it is suggested to use C1= 27pF, C2= 27pF. C1 and C2 can be adjusted to fine tune to the target ppm of crystal oscillator according to different board layouts. 27pF Crystal(CL=18pF) 27pF XTAL_IN XTAL_OUT SaRonix-eCera FL2500047 X1 X2 Cb C1 C2 Cj RdRfCb Pseudo sine Cj CL= crystal spec. loading cap. Cj = chip in/output cap. (3~5pF) Cb = PCB trace/via cap. (2~4pF) C1,2 = load cap. components Rd = drive level res. (100Ω) ASIC Final choose/trim C1=C2=2 *CL - (Cb +Cj) for the target +/-ppm Example: C1=C2=2*(18pF) – (4pF+5pF)=27pF 15-0047

www.pericom.com PI6LC48H04 Rev .A 04/07/2015All trademarks are property of their respective owners. PI6LC48H04 PCIe 3.0 and Ethernet Clock Generator with 4 HCSL Outputs Driving LVDS inputs Component Value Receiver has termination Receiver does not have termination R7a, R7b 10K Ω 140 Ω R8a, R8b 5.6K Ω Ω Cc 0.1 uF 0.1 uF Vcm 1.2 volts 1.2 volts Driving LVDS Test Loads Rs RO 5 inches Rs Zo=100Ω 2pF 2pF Low-Power HCSL Differential Output Test Load Device 15-0047

www.pericom.com PI6LC48H04 Rev .A 04/07/2015All trademarks are property of their respective owners. PI6LC48H04 PCIe 3.0 and Ethernet Clock Generator with 4 HCSL Outputs Thermal Characteristics Symbol Parameter Conditions Min. Ty p. Max. Unit θJA Thermal Resistance Junction to Ambient Still air 84 °C/W θJC Thermal Resistance Junction to Case 17 °C/W Recomended Crystal Specification Pericom recommends: a) GC2500003 XTAL 49S/SMD(4.0 mm), 25M, CL=18pF , +/-30ppm http://www.pericom.com/pdf/datasheets/se/GC_GF .pdf b) FY2500107, SMD 5x3.2(4P), 25M, CL=18pF , +/-30ppm http://www.pericom.com/pdf/datasheets/se/FY_F9.pdf c) FL2500038, SMD 3.2x2.5(4P), 25M, CL=18pF , +/-20ppm http://www.pericom.com/pdf/datasheets/se/FL.pdf Phase Noise Plot 100MHz 1 25MHz 156.25MHz 2 00MHz 15-0047

www.pericom.com PI6LC48H04 Rev .A 04/07/2015All trademarks are property of their respective owners. PI6LC48H04 PCIe 3.0 and Ethernet Clock Generator with 4 HCSL Outputs

Ordering Information

Ordering Code Package Code Package Ty pe Operating Temperature PI6LC48H04LIE L Pb-free & Green, 20-pin TSSOP Industrial PI6LC48H04LIEX L Pb-free & Green, 20-pin TSSOP, Tape & Reel Notes:

• Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
• "E" denotes Pb-free and Green packaging
• X = Suffix for tape and reel packaging Packaging Mechanical: 20-Pin TSSOP (L) DATE: 05/03/12 DESCRIPTION: 20-pin, 173mil Wide TSSOP PACKAGE CODE: L DOCUMENT CONTROL #: PD-1311 REVISION: F Notes: 1. Refer JEDEC MO-153F/AC 2. Controlling dimensions in millimeters 3. Package outline exclusive of mold flash and metal burr 12-0373Note: For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php 15-0047