PI6C2405A PERICOM | Alldatasheet

Document overview

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  • PDF pages: 7

Technical content

Features

  • Maximum rated frequency: 133 MHz
  • Low cycle-to-cycle jitter
  • Input to output delay, less than 300ps
  • Internal feedback allows outputs to be synchronized to the clock input
  • 5V tolerant input*
  • Spread spectrum clock ready
  • Operates at 3.3V VDD
  • Packaging (Pb-free & Green available): -8-pin, 150-mil SOIC (W) -8-pin, 173-mil TSSOP (L) * CLKIN must reference the same voltage thresholds for the PLL to deliver zero delay skewing

Description

The PI6C2405A is a PLL based, zero-delay buffer, with the ability to distribute five outputs of up to 133MHz at 3.3V . All the outputs are distributed from a single clock input CLKIN and output OUT0 performs zero delay by connecting a feedback to PLL. An internal feedback on OUT0 is used to synchronize the out - puts to the input; the relationship between loading of this signal and the outputs determines the input-output delay. PI6C2405A is able to track spread spectrum clocking for EMI reduction. PI6C2405A is characterized for both commercial and industrial operation. PI6C2405A-1H is a high-drive version of PI6C2405A-1 Zero-Delay Clock Buffer PI6C2405A PLLCLKIN OUT0 OUT1 OUT2 OUT3 OUT4 PI6C2405A(–1, –1H) Block Diagram GND 4 OUT1 OUT0 VDD OUT3 CLKIN OUT2 OUT4 Pin Configuration Pin Description Pin Signal Description

1 CLKIN Input clock reference frequency (weak pull-down)

2, 3, 5, 7 OUT[1-4] Clock Outputs

4 GND Ground

6 VDD 3.3V Supply

8 OUT0 Clockoutput, internal PLL feedback (weak pull-down)

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The relationship between loading of the OUT0 signal and other outputs determines the input-output delay. Zero delay is achieved when all outputs, including feedback, are loaded equally. Zero Delay and Skew Control CLKIN Input to OUTx Delay vs. Difference in Loading between OUT0 pin and OUTx pins Output Load Difference: OUT0 Load - OUTx Load (pF) CLKIN - Input to OUTx Delay (ps) 600 800 400 200 -200 -400 -600 -800 -900 -1000 -25 -20 -15 -10 -5 0 5 10 15 20 25 PI6C2405A-1H PI6C2405A-1 Maximum Ratings Operating Conditions (VCC = 3.3V ±0.3V) Parameter Description Min. Max. Units VDD Supply V oltage 3.0 3.6 V TA Commerical Operating Temperature 0 70 °CIndustrial Operating Temperature -40 85 CL Load Capacitance, below 100 MHz 30 pFLoad Capacitance, from 100 MHz to 133 15 CIN Input Capacitance 7

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Parameter Description Test Conditions Min. Typ. Max. Units FO Output Frequency 30pF load 10 100 MHz15pF load 10 133 tDC Duty Cycle(1) (-1) Measured at VDD/2, FOUT < 66.67MHz, 30pF load 40 %Measured at VDD/2, FOUT < 45MHz 15pF load 45 55 Duty Cycle(1) (-1H) Measured at VDD/2, FOUT < 100MHz 15pF load 40 60 Measured at VDD/2, FOUT < 45MHz 30pF load 45 55 tR Rise Time(1)(-1) Measured between 0.8V and 2.0V , 30pF load 2.2 ns Measured between 0.8V and 2.0V , 15pF load 1.5 Rise Time(1)(-1H) Measured between 0.8V and 2.0V , 30pF load 1.5 tF Fall Time(1)(-1) Measured between 0.8V and 2.0V , 30pF load 2.2 Measured between 0.8V and 2.0V , 15pF load 1.5 Fall Time(1)(-1H) Measured between 0.8V and 2.0V , 30pF load 1.5 tsk(o) Output to Output skew (-1, -1H)(1) All outputs equally loaded 200 pst0 Delay, CLKIN Rising Edge to OUT0 Rising Edge(1) Measured at VDD/2 0 ±300 tSK(D) Device-to-device skew(1) Measured at VDD/2 on OUT0 pins of device 0 600 tSLEW Output slew rate (1) Measured between 0.8V and 2.0V on -1H device using Test Circuit #2 1 V/ns tJIT Cycle-to-Cycle Jitter (-1, -1H) Measured at 66.67 MHz, loaded 30pF load 200 ps tLOCK PLL Lock time (1) Stable power supply, valid clocks presented on CLKIN pin 1.0 ms Parameter Description Test Conditions Min. Max. Units VIL Input LOW V oltage 0.8 VVIH Input HIGH V oltage 2.0 IIL Input LOW Current VIN = 0V 50 µAIIH Input HIGH Current VIN = VDD 125 VOL Output LOW V oltage IOL = -8mA(-1); IOL = 12mA(-1H) 0.4 VVOH Output HIGH V oltage IOH = -8mA(-1); IOH = -12mA(-1H) 2.4 IDD Supply Current Unloaded outputs 100 MHz, Select inputs at VDD or GND 54 mAUnloaded outputs 66 MHz, CLKIN 39 Notes: 1. See Switching Waveforms on page 5.

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Parameter Description Test Conditions Min. Typ. Max. Units FO Output Frequency 30pF load 10 100 MHz15pF load 10 133 tDC Duty Cycle(1) (-1) Measured at VDD/2, FO < 66 MHz, 30pF load 40 50 60 %Duty Cycle(1) (-1H) Measured at VDD/2, FO < 66 MHz, 30pF load 45 50 55 tR Rise Time(1) @ 30pF Measured between 0.8V and 2.0V 2.2 ns Rise Time(1) @ 15pF 1.5 Rise Time(1) @ 30pF (-1H) 1.5 tF Fall Time(1) @ 30pF Measured between 0.8V and 2.0V 2.2 Fall Time(1) @ 15pF 1.5 Fall Time(1) @ 30pF (-1H) 1.5 tsk(o) Output to Output skew (-1, -1H)(1) All outputs equally loaded 200 pst0 Input to output delay, CLKIN Rising Edge to OUT0 Rising Edge(1) Measured at VDD/2 0 ±300 tSK(D) Device-to-device skew(1) Measured at VDD/2 on OUT0 pins of device 0 600 tSLEW Output slew rate (1) Measured between 0.8V and 2.0V on -1H device using Test Circuit #2 1 V/ns tJIT Cycle-to-Cycle Jitter (-1, -1H) Measured at 66.67 MHz, loaded 30pF load 200 ps tLOCK PLL Lock time (1) Stable power supply, valid clocks presented on CLKIN pin 1.0 ms Notes: 1. See Switching Waveforms on page 5. Parameter Description Test Conditions Min. Max. Units VIL Input LOW V oltage 0.8 VVIH Input HIGH V oltage 2.0 IIL Input LOW Current VIN = 0V 50 µAIIH Input HIGH Current VIN = VDD 125 VOL Output LOW V oltage IOL = -8mA(-1); IOL = 12mA(-1H) 0.4 VVOH Output HIGH V oltage IOH = -8mA(-1); IOH = -12mA(-1H) 2.4 IDD Supply Current Unloaded outputs 100 MHz, Select inputs at VDD or GND 54 mAUnloaded outputs 66.67 MHz, select inputs at VDD or GND 39

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0.8V 2.0V 0.8V 2.0V OUTPUT 0V 3.3V VDD/2 VDD/2 VDD/2 VDD/2 VDD/2 VDD/2 tSK(O) OUTPUT OUTPUT INPUT OUTPUT tSK(D) OUTPUT Device 1 OUTPUT Device 2 Duty Cycle Timing All Outputs Rise/Fall Time Output-Output Skew Input-Output Propagation Delay Device-Device Skew tDC = thigh thigh+tlow VDD CLOAD VDD GND GND CLK out OUTPUTS 0.1µF 0.1µF VDD 10pF VDD GND GND CLK outOUTPUTS 0.1µF 0.1µF 1k-ohm 1k-ohm Test Circuit 2 Test Circuit for tSLEW ,Output slew rate on –1H device Test Circuit 1 Test Circuit for all parameters except tSLEW

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Packaging Mechanical: 8-Pin SOIC (W) .0040 .0098 SEATING PLANE .013 .020 .050 BSC .016 .0075 .0098 .0099 .0196 0-8˚ .050 .149 .157 X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS 3.78 3.99 .189 .196 4.80 5.00 1.27 .016 .026 1.35 1.75 .2284 .2440 5.80 6.20 0.406 0.660 0.330 0.508 0.10 0.25 0.40 1.27 0.19 0.25 0.25 0.50 x 45˚ .053 .068 REF Packaging Mechanical: 8-Pin TSSOP (L)

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Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com Ordering Information for Commercial Operating Ranges Ordering Code Package Code Package Description PI6C2405A-1W W 8-pin 150-mil SOIC PI6C2405A-1WE W Pb-free & Green, 8-pin 150-mil SOIC PI6C2405A-1HW W 8-pin 150-mil SOIC PI6C2405A-1HWE W Pb-free & Green, 8-pin 150-mil SOIC PI6C2405A-1L L 8-pin 173-mil TSSOP PI6C2405A-1LE L Pb-free & Green, 8-pin 173-mil TSSOP PI6C2405A-1HL L 8-pin 173-mil TSSOP PI6C2405A-1HLE L Pb-free & Green, 8-pin 173-mil TSSOP Ordering Information for Industrial Operating Ranges Ordering Code Package Code Package Description PI6C2405A1WI W 8-pin 150-mil SOIC PI6C2405A-1WIE W Pb-free & Green, 8-pin 150-mil SOIC PI6C2405A-1HWI W 8-pin 150-mil SOIC PI6C2405A-1HWIE W Pb-free & Green, 8-pin 150-mil SOIC PI6C2405A-1LI L 8-pin 173-mil TSSOP PI6C2405A-1LIE L Pb-free & Green, 8-pin 173-mil TSSOP PI6C2405A-1HLI L 8-pin 173-mil TSSOP PI6C2405A-1HLIE L Pb-free & Green, 8-pin 173-mil TSSOP Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ 2. X = Tape/Reel