PI6C2308-4W

PI6C2308 PERICOM | Alldatasheet

Document overview

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• PDF pages: 10

Technical content

1 PS8384D 06/26/01

• 10 MHz to 134 MHz operating range
• Zero input-output propagation delay, adjustable by external capacitive load on FBK input
• Multiple configurations, see “Available PI6C2308 Configurations” table
• Input to output delay, less than 200ps
• Multiple low skew outputs - Output-output skew less than 200ps - Device-device skew less than 600ps - Two banks of four outputs, Hi-Z by two select inputs
• Low Jitter, less than 200ps
• 3.3V operation
• Space-saving Packages: 16-pin, 150-mil SOIC package (W16) (-1, -1H, -2, -3, -4, -6) 16-pin TSSOP package (L16) (-1, -1H)
• Available in industrial and commercial temperatures Functional Description Providing two banks of four outputs, the PI6C2308 is a 3.3V zero- delay buffer designed to distribute clock signals in applications including PC, workstation, datacom, telecom, and high-performance systems. Each bank of four outputs can be controlled by the select inputs as shown in the Select Input Decoding Table. The PI6C2308 provides 8 copies of a clock signal that has 200ps phase error compared to a reference clock. The skew between the output clock signals for PI6C2308 is less than 200ps. When there are no rising edges on the REF input, the PI6C2308 enters a power down state. In this mode, the PLL is off and all outputs are Hi-Z. This results in less than 12µA of current draw. The Select Input Decoding Table shows additional examples when the PLL shuts down. The PI6C2308 configuration table shows all available devices. The base part, PI6C2308-1, provides output clocks in sync with a reference clock. With faster rise and fall times, the PI6C2308-1H is the high drive version of the PI6C2308-1. Depending on which output drives the feedback pin, PI6C2308-2 provides 2X and 1X clock signals on each output bank. The PI6C2308-3 allows the user to obtain 4X and 2X frequencies on the outputs. The PI6C2308-4 provides 2X clock signals on all outputs. PI6C2308 (-1, -2, -3, -4) allows bank B to be Hi-Z when all output clocks are not required.The PI6C2308-6 allows bank B to switch from Reference clock to half of the frequency of Reference clock using the control inputs S1 and S2 if Bank A is connected to feedback FBK. In addition, using the control inputs S1 and S2, the PI6C2308-6 allows bank A to switch from Reference clock to 2X the frequency of Reference clock if Bank B is connected to feedback FBK. For testing purposes, the select inputs connect the input clock directly to outputs. Block Diagrams Pin Configuration PI6C2308 (–1, –1H, –2, –3, –4, –6) 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 3.3V Zero-Delay Buffer PI6C2308 /K31 /K32 /K33 /K56 /K44/K44/K34 /K47/K4E/K44 /K35 /K43/K4C/K4B/K41/K32 /K36 /K43/K4C/K4B/K42/K32 /K37 /K53/K31/K38 /K43/K4C/K4B/K42/K31 /K46/K42/K4B /K43/K4C/K4B/K41/K33 /K56/K44/K44 /K43/K4C/K4B/K42/K34 /K43/K4C/K4B/K42/K33 /K53/K32 /K31/K36 /K31/K35 /K31/K34 /K31/K33 /K31/K32 /K31/K31 /K31/K30 /K39 /K52/K45/K46 /K43/K4C/K4B/K41/K31 /K47/K4E/K44 /K43/K4C/K4B/K41/K34 16-Pin W, L /K50/K4C/K4C /K4D/K55/K58/K52/K45/K46 /K53/K32 /K53/K31 /K53/K65/K6C/K65/K63/K74 /K49/K6E/K70/K75/K74 /K44/K65/K63/K6F/K64/K69/K6E/K67 /K46/K42/K4B /K43/K4C/K4B/K41/K31 /K43/K4C/K4B/K41/K32 /K43/K4C/K4B/K41/K33 /K43/K4C/K4B/K41/K34 /K43/K4C/K4B/K42/K32 /K43/K4C/K4B/K42/K33 /K43/K4C/K4B/K42/K34 /K43/K4C/K4B/K42/K31 /K50/K49/K36/K43/K32/K33/K30/K38/K2D/K36 /K4D/K55/K58 /KF7/K32 /KF7/K32 /K50/K4C/K4C /K4D/K55/K58 /K45/K78/K74/K72/K61 /K44/K69/K76/K69/K64/K65/K72 /K28/K2D/K33/K2C /K2D/K34/K29 /K45/K78/K74/K72/K61 /K44/K69/K76/K69/K64/K65/K72 /K28/K2D/K32/K2C/K2D/K33/K29 /K52/K45/K46 /K53/K32 /K53/K31 /K53/K65/K6C/K65/K63/K74 /K49/K6E/K70/K75/K74 /K44/K65/K63/K6F/K64/K69/K6E/K67 /K46/K42/K4B /K43/K4C/K4B/K41/K31 /K43/K4C/K4B/K41/K32 /K43/K4C/K4B/K41/K33 /K43/K4C/K4B/K41/K34 /K43/K4C/K4B/K42/K32 /K43/K4C/K4B/K42/K33 /K43/K4C/K4B/K42/K34 /K43/K4C/K4B/K42/K31 /K50/K49/K36/K43/K32/K33/K30/K38 /K28/K2D/K31/K2C /K2D/K31/K48/K2C /K2D/K32/K2C /K2D/K33/K2C /K2D/K34/K29 /KF7/K32

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1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI6C2308 3.3V Zero Delay Buffer 2S1 S] 4-1[AKLC] 4-1[BKLCe cruoStuptuOn wodtuhSLLP

00 Z -iHZ -iHL LPY

10 n evirDn evirDe cnerefeRY 11 n evirDn evirDL LPN Select Input Decoding for PI6C2308 (-1, -1H, -2, -3, -4) eciveDm orFkcabdeeFy cneuqerFAknaBy cneuqerFBknaB 1-8032C6IPB knaBroAknaBe cnerefeRe cnerefeR H1-8032C6IPB knaBroAknaBe cnerefeRe cnerefeR 2-8032C6IPA knaBe cnerefeR2 /ecnerefeR 2-8032C6IPB knaBe cnerefeRX2e cnerefeR 3-8032C6IPA knaBe cnerefeRX2e cnerefeR 3-8032C6IPB knaBe cnerefeRX4e cnerefeRX2 4-8032C6IPB knaBroAknaBe cnerefeRX2e cnerefeRX2 6-8032C6IPA knaBe cnerefeR2 /ecnerefeRroecnerefeR 6-8032C6IPB knaBe cnerefeRX2roecnerefeRe cnerefeR Available PI6C2308 Configurations 2S1 S] 4-1[AKLC] 4-1[BKLCe cruoStuptuOn wodtuhSLLP 01 e cnerefeR=nevirD2 /ecnerefeR=nevirDe cnerefeRY

10 L LP=nevirDL LP=nevirDL LPN

11 L LP=nevirD2 /LLP=nevirDL LPN

Select Input Decoding for PI6C2308-6

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1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI6C2308 3.3V Zero Delay Buffer To close the feedback loop of the PI6C2308, the FBK pin can be driven from any of the 8 available output pins. The output driving the FBK pin will be driving a total load of 7pF plus any additional load that it drives. The relative loading of this output (with respect to the remaining outputs) can adjust the input-output delay. This is shown in the graph above. Zero Delay and Skew Control REF. Input to CLKA/CLKB Delay vs. Difference in Loading between FBK pin and CLKA/CLKB pins Maximum Ratings Static Discharge Voltage retemaraPn oitpircseD. niM. xaMs tinU V DD egatloVylppuS0 .36 .3V TA erutarepmeTgnitarepO )tneibmA( 00 7C ” CL ecnaticapaCdaoL  03 Fp C NI ecnaticapaCtupnI  7 Operating Conditions (Over operating range, TA = 0”C to +70°C, VCC = 3.3V –0.3V) For applications requiring zero input-output delay, all outputs including the one providing feedback should be equally loaded. If input-output delay adjustments are required, use the above graph to calculate loading differences between the feedback output and remaining outputs. /K36/K30/K30 /K38/K30/K30 /K34/K30/K30 /K32/K30/K30 /K30 /K2D/K32/K30/K30 /K2D/K34/K30/K30 /K2D/K36/K30/K30 /K2D/K38/K30/K30 /K2D/K39/K30/K30 /K2D/K31/K30/K30/K30 /K2D/K32/K35 /K2D/K32/K30 /K2D/K31/K35 /K2D/K31/K30 /K2D/K35/K30 /K35 /K31/K30 /K31/K35 /K32/K30 /K32/K35 /K4F/K75/K74/K70/K75/K74 /K4C/K6F/K61/K64 /K44/K69/K66/K66/K65/K72/K65/K6E/K63/K65/K3A /K46/K42/K4B /K4C/K6F/K61/K64 /K2D /K43/K4C/K4B/K41/K2F/K43/K4C/K4B/K42 /K4C/K6F/K61/K64 /K28/K70/K46/K29 /K52/K45/K46 /K2D /K49/K6E/K70/K75/K74 /K74/K6F /K43/K4C/K4B/K41/K2F/K43/K4C/K4B/K42 /K44/K65/K6C/K61/K79 /K28/K70/K73/K29 /K50/K49/K36/K43/K32/K33/K30/K38/K2D/K31/K48 /K50/K49/K36/K43/K32/K33/K30/K38/K2D/K31/K2C/K32/K2C/K33/K2C/K34/K2C/K36

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1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI6C2308 3.3V Zero Delay Buffer Electrical Characteristics for Commercial Temperature Devices retemaraPn oitpircseDs noitidnoCtseT. niM. xaMs tinU V LI egatloVWOLtupnI )4(  8.0 V V HI egatloVHGIHtupnI )4(  0.2  I LI tnerruCWOLtupnIV NI =V0  05 µA I HI tnerruCHGIHtupnIV NI =V DD  001 V LO egatloVWOLtuptuO )5( I LO )6–,4–,3–,2–,1–(Am8= I LO )H1-(Am21=  4.0 V V HO egatloVHGIHtuptuO )5( I HO )6–,4–,3–,2–,1–(Am8–= I HO )H1-(Am21–= 4.2  I DD )edomDP(t nerruCylppuSnwoDrewoPz HM0=FER  21 µA I DD tnerruCylppuS ,zHM66.66,stuptuodedaolnU VtastupnitceleS DD DNGro  93 AmI DD tnerruCylppuS tceleSzHM001stuptuodedaolnU V@stupnI DD DNGro  45 niPl angiSn oitpircseD 1F ER )1( tupnikcolcmurtcepsdaerpsswolla,tupnitnarelotV5,ycneuqerfecnerefertupnI

21 AKLC )2( AknaB,tuptuokcolC

32 AKLC )2( AknaB,tuptuokcolC

4V DD ylppusV3.3 5D NGd nuorG

61 BKLC )2( BknaB,tuptuokcolC

72 BKLC )2( BknaB,tuptuokcolC

82 S )3( 2tib,tupnitceleS

91 S )3( 1tib,tupnitceleS

013 BKLC )2( BknaB,tuptuokcolC

114 BKLC )2( BknaB,tuptuokcolC

31V DD ylppus,V3.3

413 AKLC )2( AknaB,tuptuokcolC

514 AKLC )2( AknaB,tuptuokcolC

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1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI6C2308 3.3V Zero Delay Buffer Notes: 1. Weak pull-down. 2. Weak pull-down on all outputs. 3. Weak pull-ups on these inputs. 4. REF and FBK inputs have a threshhold voltage of V DD/2. 5. For definition of t 1-8, see Switching Waveforms on page 8. sretemaraPe maNs noitidnoCtseT. niM. pyT. xaMs tinU t1 ycneuqerFtuptuOd aolFp03otFp510 14 31z HM elcyCytuD )5( t= 2 ÷ t1 )H1-8032(t uptuoevirdhgihrof,V4.1taderusaeM5 40 55 5 %t=elcyCytuD 2 ÷ t1 )6-,4-,3-,2-,1-8032( tuptuoevirdlamronrof,V4.1taderusaeM0 40 50 6 emiTesiR )4( Fp03@ V0.2dnaV8.0neewtebderusaeM 2.2 sn emiTesiR )4( Fp51@ 5.1 emiTesiR )4( )H1–(Fp03@ 5.1 emiTllaF )4( Fp03@ 2.2 emiTllaF )4( Fp51@ 5.1 emiTllaF )4( )H1–(Fp03@ 52.1 wekStuptuOottuptuO )4( emasno )6–,4–,3–,2–,H1–,1–8032(knab V,dedaolyllauqestuptuollA DD 2/0 02 sp BknaBtuptuOotAknaBtuptuO wekS 4( )4–,H1–,1–8032() V,dedaolyllauqestuptuollA DD 2/0 02 BknaBtuptuOotAknaBtuptuO wekS 4( )6–,3–,2–8032() V,dedaolyllauqestuptuollA DD 2/0 04 esahP( )rorrE egdEgnisiRFER,yaleDtuptuOottupnI egdEgnisiRKBFot )4( VtaderusaeM DD 2/0 0 02– t7 wekSeciveDoteciveD )4( VtaderusaeM DD ehtno2/ secivedfosnipKBF 00 06 t8 etaRwelStuptuO )4( -noV0.2dnaV8.0neewtebderusaeM gnisuecivedH1 2#tiucriCtseT 1s n/V tJ rettiJelcyC-ot-elcyC )4( )4–,H1–,1–8032( ,zHM76.66taderusaeM stuptuoFp03dedaol 002 sp,zHM331taderusaeM stuptuoFp51dedaol 001 tJ rettiJelcyC-ot-elcyC )4( )6–,3–,2–8032( ,zHM6.66taderusaeM stuptuoFp03dedaol 004 t KCOL emiTkcoLLLP )4( skcolcdilav,ylppusrewopelbatS snipKBFdnaFERnodetneserp 0.1s m Switching Characteristics(5) for Commercial Temperature Device

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1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI6C2308 3.3V Zero Delay Buffer retemaraPn oitpircseD. niM. xaMs tinU V DD egatloVylppuS0 .36 .3V TA )erutarepmeTtneibmA(erutarepmeTgnitarepO0 4–5 8C ” CL zHM001woleb,ecnaticapaCdaoL 03 FpzHM331otzHM001morf,ecnaticapaCdaoL 51 C NI ecnaticapaCtupnI 7 Operating Conditions for Industrial Temperature Devices retemaraPn oitpircseDs noitidnoCtseT. niM. xaMs tinU V LI egatloVWOLtupnI 8.0 V V HI egatloVHGIHtupnI 0.2 I LI tnerruCWOLtupnIV NI V0=0 .05 Aµ I HI tnerruCHGIHtupnIV NI V= DD 0.001 V LO egatloVWOLtuptuO )4( I LO )6–,4–,3–,2–,1–(Am8= I LO )H1–(Am21= 4.0 V V HO egatloVHGIHtuptuO )4( I LO )6–,4–,3–,2–,1–(Am8= I LO )H1–(Am21= 4.2 I DD )edomDP(t nerruCylppuSnwoDrewoPz HM0=FER0 .52 µA I DD tnerruCylppuS ,zHM001,stuptuodedaolnU VtastupnitceleS DD DNGro 0.45 Am )H1–(0.07 )H1–(tpecxe,FER,zHM66,stuptuodedaolnU0 .93 )H1–(tpecxe,FER,zHM33,stuptuodedaolnU0 .02 Electrical Characteristics For Industrial Temperature Devices

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1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI6C2308 3.3V Zero Delay Buffer Switching Characteristics for Industrial Temperature Devices(5) retemaraPe maNs noitidnoCtseT. niM. pyT. xaMs tinU t1 ycneuqerFtuptuO secivedllA,daolFp03 001 zHM,daolFp02H 1–s ecived4 31 ,daolFp516 –,4–,3–,2–,1–s ecived4 31 elcyCytuD )4( t= 2 t÷ 1 F,V4.1taderusaeM TUO daolFp03zHM66.66< 0.04 0.05 0.06 F,V4.1taderusaeM TUO daolFp51zHM331< F,V4.1taderusaeM TUO daolFp51zHM54<0 .54 0.55 elcyCytuD )4( t= 2 t÷ 1 )H1–( F,V4.1taderusaeM TUO daolFp03zHM66.66<0 .54 F,V4.1taderusaeM TUO daolFp51zHM331<0 .040 .06 F,V4.1taderusaeM TUO daolFp03zHM54<0 .540 .55 emiTesiR )4( )4–,3–,2–,1–( daolFp03,V0.2dnaV8.0neewtebderusaeM 2.2 sn daolFp51,V0.2dnaV8.0neewtebderusaeM0 5.1 emiTesiR )4( )H1–(d aolFp03,V0.2dnaV8.0neewtebderusaeM0 5.1 emiTllaF )4( )4–,3–,2–,1–( daolFp03,V0.2dnaV8.0neewtebderusaeM0 5.2 daolFp51,V0.2dnaV8.0neewtebderusaeM0 5.1 emiTllaF )4( )H1–(d aolFp03,V0.2dnaV8.0neewtebderusaeM5 2.1 emasnowekStuptuOottuptuO dedaolyllauqestuptuollA 002 sp BknaBtuptuOotAknaBtuptuO )4–,H1–,1–(wekS BknaBtuptuOotAknaBtuptuO )6–,3–,2–(wekS 004 KBFotegdEgnisiRFER,yaleD egdEgnisiR )4( VtaderusaeM DD 2/0 0 02– t7 wekSeciveDoteciveD )4( VtaderusaeM DD secivedfosnipKBFehtno,zHM2/0 06 t8 etaRwelStuptuO )4( tseTgnisuecived5–,H1noV0.2&V8.0xwtderusaeM 2#trC 1s n/V tJ rettiJelcyCotelcyC )4( , )4–,H1–,1–( daoLFp03,stuptuodedaol,zHM76.66taderusaeM0 02 spdaoLFp51,stuptuodedaol,zHM331taderusaeM0 01 rettiJelcyCotelcyC )4( , )6–,3–,2–( daoLFp03,stuptuodedaol,zHM76.66taderusaeM0 04 t KCOL emiTkcoLLLP )4( &FERnodetneserpskcolcdilav,ylppusrewopelbatS snipKBF 0.1s m Notes: 1. Weak pull-down. 2. Weak pull-down on all outputs. 3. Weak pull-ups on these inputs. 4. REF and FBK inputs have a threshhold voltage of V DD/2. 5. For definition of t 1-8, see Switching Waveforms on page 8.

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1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI6C2308 3.3V Zero Delay Buffer VDD C LOAD VDD GND GND CLK outOUTPUTS 0.1/K6DF 0.1/K6DF Test Circuit for all parameters except t8 VDD 10pF VDD GND GND CLK outOUTPUTS 0.1/K6DF 0.1/K6DF Test Circuit for t8 ,Output slew rate on -1H device 1k/K57 1k/K57 Switching Waveforms Test Circuit #2Test Circuit #1 /K74/K32 /K74/K31 /K31/K2E/K34/K56 /K31/K2E/K34/K56 /K31/K2E/K34/K56 /K74/K34/K74/K33 /K30/K2E/K38/K56 /K32/K2E/K30/K56 /K30/K2E/K38/K56 /K32/K2E/K30/K56 /K4F/K55/K54/K50/K55/K54 /K30/K56 /K33/K2E/K33/K56 /K31/K2E/K34/K56 /K74/K35 /K4F/K55/K54/K50/K55/K54 /K31/K2E/K34/K56/K4F/K55/K54/K50/K55/K54 /K56/K44/K44/K2F/K32 /K74/K36 /K49/K4E/K50/K55/K54 /K56/K44/K44/K2F/K32/K46/K42/K4B /K56/K44/K44/K2F/K32 /K74/K37 /K46/K42/K4B /K44/K65/K76/K69/K63/K65 /K31 /K56/K44/K44/K2F/K32/K46/K42/K4B /K44/K65/K76/K69/K63/K65 /K32 /K44/K75/K74/K79 /K43/K79/K63/K6C/K65 /K54/K69/K6D/K69/K6E/K67 /K41/K6C/K6C /K4F/K75/K74/K70/K75/K74/K73 /K52/K69/K73/K65/K2F/K46/K61/K6C/K6C /K54/K69/K6D/K65 /K4F/K75/K74/K70/K75/K74/K2D/K4F/K75/K74/K70/K75/K74 /K53/K6B/K65/K77 /K49/K6E/K70/K75/K74/K2D/K4F/K75/K74/K70/K75/K74 /K50/K72/K6F/K70/K61/K67/K61/K74/K69/K6F/K6E /K44/K65/K6C/K61/K79 /K44/K65/K76/K69/K63/K65/K2D/K44/K65/K76/K69/K63/K65 /K53/K6B/K65/K77

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1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI6C2308 3.3V Zero Delay Buffer 16-Pin SOIC (W) Note: Controlling dimensions in millimeters. Ref: JEDEC MS - 012 AC 16-Pin TSSOP (L) SEATING PLANE .050 BSC 0-8˚ .149 .157 X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS 3.78 3.99.386 .393 9.80 10.00 1.27 .053 .068 1.35 1.75 .2284 .2440 5.80 6.20 .0040 .0098 0.10 0.25 .013 .020 .0155 .0260 0.330 0.508 0.393 0.660 .0075 .0098 0.25 0.50 .0099 .0196 x 45˚ 0.19 0.25 .016 .050 0.41 1.27REF .193 .201 .047 max. .002 .006 SEATING PLANE .0256 BSC .018 .030 .004 .008 .252 BSC .169 .177 X.XX X.XX DENOTES CONTROLLING DIMENSIONS IN MILLIMETERS 0.05 0.15 6.4 0.45 0.75 0.09 0.20 4.3 4.5 1.20 4.9 5.1 0.65 0.19 0.30 .007 .012

10 PS8384D 06/26/01

1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI6C2308 3.3V Zero Delay Buffer Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com edoCgniredrOe maNegakcaPe pyTegakcaPe gnaRgnitarepO W1-8032C6IP 61WC IOSlim-051nip-61 laicremmoC WH1-8032C6IP W2-8032C6IP W3-8032C6IP W4-8032C6IP W6-8032C6IP L1-8032C6IP 61LP OSSTnip-61 LH1-8032C6IP Ordering Information (Commercial Temperature Device) edoCgniredrOe maNegakcaPe pyTegakcaPe gnaRgnitarepO IW1-8032C6IP 61WC IOSlim-051nip-61 lairtsudnI IWH1-8032C6IP IW2-8032C6IP IW3-8032C6IP IW4-8032C6IP IW6-8032C6IP IL1-8032C6IP 61LP OSSTnip-61 ILH1-8032C6IP Ordering Information (Industrial Temperature Device)